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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: dmu_cmu_rcm_schrcd_q.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module dmu_cmu_rcm_schrcd_q ( | |
36 | clk, | |
37 | rst_l, | |
38 | enq, | |
39 | rcd_in, | |
40 | deq, | |
41 | typ, | |
42 | len, | |
43 | dwbe, | |
44 | addr, | |
45 | addr_err, | |
46 | dptr, | |
47 | sbd_tag, | |
48 | full, | |
49 | empty, | |
50 | overflow, | |
51 | underflow | |
52 | ); | |
53 | ||
54 | //************************************************ | |
55 | // PARAMETERS | |
56 | //************************************************ | |
57 | ||
58 | parameter DEPTH = 4; | |
59 | ||
60 | // Ingress Schedule Record Fields | |
61 | // parameter MM2CM_WDTH = `FIRE_DLC_ISR_REC_WDTH; //79 | |
62 | parameter SRMSB = `FIRE_DLC_ISR_MSB; // MM2CM_WDTH -1 | |
63 | ||
64 | parameter SRTYP_WDTH = `FIRE_DLC_ISR_TYP_WDTH, // 7 | |
65 | SRLEN_WDTH = `FIRE_DLC_ISR_LEN_WDTH, //10 | |
66 | SRDWBE_WDTH = `FIRE_DLC_ISR_DWBE_WDTH, // 8 | |
67 | SRADDR_WDTH = `FIRE_DLC_ISR_ADDR_WDTH, //41 | |
68 | // SRADDERR_WDTH = `FIRE_DLC_ISR_ADDRERR_WDTH, // 1 | |
69 | SRDPTR_WDTH = `FIRE_DLC_ISR_DPTR_WDTH, // 7 | |
70 | SRSBDTAG_WDTH = `FIRE_DLC_ISR_SBDTAG_WDTH; // 5 | |
71 | ||
72 | parameter SRTYPMSB = SRTYP_WDTH -1, | |
73 | SRLENMSB = SRLEN_WDTH -1, | |
74 | SRDWBEMSB = SRDWBE_WDTH -1, | |
75 | SRADDRMSB = SRADDR_WDTH -1, | |
76 | // SRADDRERRMSB = 1, | |
77 | SRDPTRMSB = SRDPTR_WDTH -1, | |
78 | SRSBDTAGMSB = SRSBDTAG_WDTH -1; | |
79 | ||
80 | parameter SBDTAGLSB = 0, | |
81 | SBDTAGMSB = `FIRE_DLC_ISR_SBDTAG_MSB, | |
82 | DPTRLSB = `FIRE_DLC_ISR_DPTR_LSB, | |
83 | DPTRMSB = `FIRE_DLC_ISR_DPTR_MSB, | |
84 | // ADDRERRLSB = `FIRE_DLC_ISR_ADDRERR_LSB, | |
85 | ADDRERRMSB = `FIRE_DLC_ISR_ADDRERR_MSB, | |
86 | ADDRLSB = `FIRE_DLC_ISR_ADDR_LSB, | |
87 | ADDRMSB = `FIRE_DLC_ISR_ADDR_MSB, | |
88 | DWBELSB = `FIRE_DLC_ISR_DWBE_LSB, | |
89 | DWBEMSB = `FIRE_DLC_ISR_DWBE_MSB, | |
90 | LENLSB = `FIRE_DLC_ISR_LEN_LSB, | |
91 | LENMSB = `FIRE_DLC_ISR_LEN_MSB, | |
92 | TYPLSB = `FIRE_DLC_ISR_TYP_LSB, | |
93 | TYPMSB = `FIRE_DLC_ISR_TYP_MSB; | |
94 | ||
95 | ||
96 | //************************************************ | |
97 | // PORTS | |
98 | //************************************************ | |
99 | ||
100 | input clk; // The input clock | |
101 | input rst_l; // The fifo rst_l | |
102 | ||
103 | input [SRMSB :0] rcd_in; // Schedule record in | |
104 | input enq; // enqueue to schrcd_q | |
105 | input deq; // local dequeue for packet fifo | |
106 | ||
107 | output [SRTYPMSB : 0] typ; | |
108 | output [SRLENMSB : 0] len; | |
109 | output [SRDWBEMSB : 0] dwbe; | |
110 | output [SRADDRMSB : 0] addr; | |
111 | output addr_err; | |
112 | output [SRDPTRMSB : 0] dptr; | |
113 | output [SRSBDTAGMSB : 0] sbd_tag; | |
114 | ||
115 | output full; // schrcd_q is full | |
116 | output overflow; // schrcd_q overflow | |
117 | output underflow; // schrcd_q underflow | |
118 | output empty; // fifo empty exported | |
119 | ||
120 | //************************************************ | |
121 | // SIGNALS | |
122 | //************************************************ | |
123 | ||
124 | wire clk; | |
125 | wire rst_l; | |
126 | ||
127 | wire typ_full, typ_empty, typ_overflow, typ_underflow; | |
128 | wire len_empty, len_overflow, len_underflow; | |
129 | wire dwbe_empty, dwbe_overflow, dwbe_underflow; | |
130 | wire addr_empty, addr_overflow, addr_underflow; | |
131 | wire dptr_empty, dptr_overflow, dptr_underflow; | |
132 | wire sbdtag_empty, sbdtag_overflow, sbdtag_underflow; | |
133 | ||
134 | wire [SRTYPMSB : 0] rcd_typ; | |
135 | wire [SRLENMSB : 0] rcd_len; | |
136 | wire [SRDWBEMSB : 0] rcd_dwbe; | |
137 | wire [SRADDRMSB : 0] rcd_addr; | |
138 | wire rcd_addrerr; | |
139 | wire [SRDPTRMSB : 0] rcd_dptr; | |
140 | wire [SRSBDTAGMSB : 0] rcd_sbdtag; | |
141 | ||
142 | // Schedule Record field assignments to RCM signals | |
143 | assign rcd_typ[SRTYPMSB : 0] = rcd_in[TYPMSB : TYPLSB ]; | |
144 | assign rcd_len[SRLENMSB : 0] = rcd_in[LENMSB : LENLSB]; | |
145 | assign rcd_dwbe[SRDWBEMSB : 0] = rcd_in[DWBEMSB : DWBELSB]; | |
146 | assign rcd_addr[SRADDRMSB : 0] = rcd_in[ADDRMSB : ADDRLSB]; | |
147 | assign rcd_addrerr = rcd_in[ADDRERRMSB]; | |
148 | assign rcd_dptr[SRDPTRMSB : 0] = rcd_in[DPTRMSB : DPTRLSB]; | |
149 | assign rcd_sbdtag[SRSBDTAGMSB : 0] = rcd_in[SBDTAGMSB : SBDTAGLSB]; | |
150 | ||
151 | ||
152 | //************************************************ | |
153 | // Modules | |
154 | //************************************************ | |
155 | ||
156 | fire_dmc_common_srfifo #(SRTYP_WDTH, DEPTH) typ_srfifo ( | |
157 | .clk (clk), | |
158 | .rst_l (rst_l), | |
159 | .enq (enq), | |
160 | .data_in (rcd_typ), | |
161 | .deq (deq), | |
162 | .data_out (typ), | |
163 | .full (typ_full), | |
164 | .empty (typ_empty), | |
165 | .overflow(typ_overflow), | |
166 | .underflow(typ_underflow) | |
167 | ); | |
168 | ||
169 | fire_dmc_common_srfifo #(SRLEN_WDTH, DEPTH) len_srfifo ( | |
170 | .clk (clk), | |
171 | .rst_l (rst_l), | |
172 | .enq (enq), | |
173 | .data_in (rcd_len), | |
174 | .deq (deq), | |
175 | .data_out (len), | |
176 | .full (), | |
177 | .empty (len_empty), | |
178 | .overflow(len_overflow), | |
179 | .underflow(len_underflow) | |
180 | ); | |
181 | ||
182 | fire_dmc_common_srfifo #(SRDWBE_WDTH, DEPTH) dwbe_srfifo ( | |
183 | .clk (clk), | |
184 | .rst_l (rst_l), | |
185 | .enq (enq), | |
186 | .data_in (rcd_dwbe), | |
187 | .deq (deq), | |
188 | .data_out (dwbe), | |
189 | .full (), | |
190 | .empty (dwbe_empty), | |
191 | .overflow(dwbe_overflow), | |
192 | .underflow(dwbe_underflow) | |
193 | ); | |
194 | ||
195 | // address and addrerr carried in addr_srfifo | |
196 | fire_dmc_common_srfifo #(SRADDR_WDTH +1, DEPTH) addr_srfifo ( | |
197 | .clk (clk), | |
198 | .rst_l (rst_l), | |
199 | .enq (enq), | |
200 | .data_in ({rcd_addr, rcd_addrerr}), | |
201 | .deq (deq), | |
202 | .data_out ({addr, addr_err}), | |
203 | .full (), | |
204 | .empty (addr_empty), | |
205 | .overflow(addr_overflow), | |
206 | .underflow(addr_underflow) | |
207 | ); | |
208 | ||
209 | fire_dmc_common_srfifo #(SRDPTR_WDTH, DEPTH) dptr_srfifo ( | |
210 | .clk (clk), | |
211 | .rst_l (rst_l), | |
212 | .enq (enq), | |
213 | .data_in (rcd_dptr), | |
214 | .deq (deq), | |
215 | .data_out (dptr), | |
216 | .full (), | |
217 | .empty (dptr_empty), | |
218 | .overflow(dptr_overflow), | |
219 | .underflow(dptr_underflow) | |
220 | ); | |
221 | ||
222 | fire_dmc_common_srfifo #(SRSBDTAG_WDTH, DEPTH) sbdtag_srfifo ( | |
223 | .clk (clk), | |
224 | .rst_l (rst_l), | |
225 | .enq (enq), | |
226 | .data_in (rcd_sbdtag), | |
227 | .deq (deq), | |
228 | .data_out (sbd_tag), | |
229 | .full (), | |
230 | .empty (sbdtag_empty), | |
231 | .overflow(sbdtag_overflow), | |
232 | .underflow(sbdtag_underflow) | |
233 | ); | |
234 | ||
235 | ||
236 | ||
237 | //assign full = (typ_full | len_full | dwbe_full | | |
238 | // addr_full | dptr_full | sbdtag_full); | |
239 | ||
240 | assign full = typ_full; // since all fifos are in lock step, single fifo full | |
241 | // can be exported | |
242 | ||
243 | assign overflow = (typ_overflow | len_overflow | dwbe_overflow | | |
244 | addr_overflow | dptr_overflow | sbdtag_overflow); | |
245 | ||
246 | assign underflow = (typ_underflow | len_underflow | dwbe_underflow | | |
247 | addr_underflow | dptr_underflow | sbdtag_underflow); | |
248 | ||
249 | assign empty = (typ_empty & len_empty & dwbe_empty & | |
250 | addr_empty & dptr_empty & sbdtag_empty); | |
251 | ||
252 | endmodule |