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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: dmu_ilu_cib_csrpipe_6.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module dmu_ilu_cib_csrpipe_6 | |
36 | ( | |
37 | clk, | |
38 | rst_l, | |
39 | reg_in, | |
40 | reg_out, | |
41 | data0, | |
42 | data1, | |
43 | data2, | |
44 | data3, | |
45 | data4, | |
46 | data5, | |
47 | sel0, | |
48 | sel1, | |
49 | sel2, | |
50 | sel3, | |
51 | sel4, | |
52 | sel5, | |
53 | out | |
54 | ); | |
55 | ||
56 | //==================================================================== | |
57 | // Polarity declarations | |
58 | //==================================================================== | |
59 | input clk; // Clock signal | |
60 | input rst_l; // Reset signal | |
61 | input reg_in; // Set to constant. 0: sel* non-reg 1: sel* reg | |
62 | input reg_out; // Set to constant. 0: out non-reg 1: out registered | |
63 | input [`FIRE_CSRBUS_DATA_WIDTH-1:0] data0; // Read data | |
64 | input [`FIRE_CSRBUS_DATA_WIDTH-1:0] data1; // Read data | |
65 | input [`FIRE_CSRBUS_DATA_WIDTH-1:0] data2; // Read data | |
66 | input [`FIRE_CSRBUS_DATA_WIDTH-1:0] data3; // Read data | |
67 | input [`FIRE_CSRBUS_DATA_WIDTH-1:0] data4; // Read data | |
68 | input [`FIRE_CSRBUS_DATA_WIDTH-1:0] data5; // Read data | |
69 | input sel0; // Set to 1 if reg_in==0 | |
70 | input sel1; // Set to 1 if reg_in==0 | |
71 | input sel2; // Set to 1 if reg_in==0 | |
72 | input sel3; // Set to 1 if reg_in==0 | |
73 | input sel4; // Set to 1 if reg_in==0 | |
74 | input sel5; // Set to 1 if reg_in==0 | |
75 | output [`FIRE_CSRBUS_DATA_WIDTH-1:0] out; // Read data out | |
76 | ||
77 | //==================================================================== | |
78 | // Type declarations | |
79 | //==================================================================== | |
80 | wire clk; // Clock signal | |
81 | wire rst_l; // Reset signal | |
82 | wire reg_in; // Set to constant. 0: sel* non-reg 1: sel* reg | |
83 | wire reg_out; // Set to constant. 0: out non-reg 1: out registered | |
84 | wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] data0; // Read data | |
85 | wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] data1; // Read data | |
86 | wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] data2; // Read data | |
87 | wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] data3; // Read data | |
88 | wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] data4; // Read data | |
89 | wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] data5; // Read data | |
90 | wire sel0; // Set to 1 if reg_in==0 | |
91 | wire sel1; // Set to 1 if reg_in==0 | |
92 | wire sel2; // Set to 1 if reg_in==0 | |
93 | wire sel3; // Set to 1 if reg_in==0 | |
94 | wire sel4; // Set to 1 if reg_in==0 | |
95 | wire sel5; // Set to 1 if reg_in==0 | |
96 | wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] out; // Read data out | |
97 | ||
98 | //==================================================================== | |
99 | // Local variables | |
100 | //==================================================================== | |
101 | reg [`FIRE_CSRBUS_DATA_WIDTH-1:0] out_p1; | |
102 | reg sel0_p1; | |
103 | reg sel1_p1; | |
104 | reg sel2_p1; | |
105 | reg sel3_p1; | |
106 | reg sel4_p1; | |
107 | reg sel5_p1; | |
108 | ||
109 | //==================================================================== | |
110 | // Logic | |
111 | //==================================================================== | |
112 | //select required ? | |
113 | wire sel0_int=reg_in?sel0_p1:sel0; | |
114 | wire sel1_int=reg_in?sel1_p1:sel1; | |
115 | wire sel2_int=reg_in?sel2_p1:sel2; | |
116 | wire sel3_int=reg_in?sel3_p1:sel3; | |
117 | wire sel4_int=reg_in?sel4_p1:sel4; | |
118 | wire sel5_int=reg_in?sel5_p1:sel5; | |
119 | ||
120 | //generate AND/OR | |
121 | wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] out_d = | |
122 | {`FIRE_CSRBUS_DATA_WIDTH { sel0_int } } & data0 | | |
123 | {`FIRE_CSRBUS_DATA_WIDTH { sel1_int } } & data1 | | |
124 | {`FIRE_CSRBUS_DATA_WIDTH { sel2_int } } & data2 | | |
125 | {`FIRE_CSRBUS_DATA_WIDTH { sel3_int } } & data3 | | |
126 | {`FIRE_CSRBUS_DATA_WIDTH { sel4_int } } & data4 | | |
127 | {`FIRE_CSRBUS_DATA_WIDTH { sel5_int } } & data5; | |
128 | ||
129 | //reg out or combo | |
130 | assign out=reg_out?out_p1:out_d; | |
131 | ||
132 | //pipe control/data | |
133 | always @(posedge clk) | |
134 | begin | |
135 | if(~rst_l) | |
136 | begin | |
137 | sel0_p1<=1'b0; | |
138 | sel1_p1<=1'b0; | |
139 | sel2_p1<=1'b0; | |
140 | sel3_p1<=1'b0; | |
141 | sel4_p1<=1'b0; | |
142 | sel5_p1<=1'b0; | |
143 | out_p1<=`FIRE_CSRBUS_DATA_WIDTH'b0; | |
144 | end | |
145 | else | |
146 | begin | |
147 | sel0_p1<=sel0; | |
148 | sel1_p1<=sel1; | |
149 | sel2_p1<=sel2; | |
150 | sel3_p1<=sel3; | |
151 | sel4_p1<=sel4; | |
152 | sel5_p1<=sel5; | |
153 | out_p1<=out_d; | |
154 | end | |
155 | end | |
156 | ||
157 | endmodule // dmu_ilu_cib_csrpipe_6 |