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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: dmu_ilu_iil_rcdbldr.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module dmu_ilu_iil_rcdbldr ( | |
36 | clk, | |
37 | rst_l, | |
38 | ||
39 | p2d_ihb_data, | |
40 | y2k_rcd, | |
41 | ||
42 | iil2isb_tag, | |
43 | isb2iil_low_addr, | |
44 | ||
45 | ihb_rcd_is_cpl, | |
46 | credit_type, | |
47 | ||
48 | is_ihb_rcd, | |
49 | is_cto_rcd, | |
50 | pio_tag_gen, | |
51 | ||
52 | in_ihb_rcd); | |
53 | ||
54 | // >>>>>>>>>>>>>>>>>>>>>>>>> Parameter Declarations <<<<<<<<<<<<<<<<<<<<<<<<< | |
55 | ||
56 | // rcd type | |
57 | parameter DMA_MRD = 7'b0z00000, | |
58 | DMA_MRDLK = 7'b0z00001, | |
59 | DMA_MWR = 7'b1z00000, | |
60 | DMA_IORD = 7'b0000010, | |
61 | DMA_IOWR = 7'b1000010, | |
62 | DMA_CFGRD = 7'b000010z, | |
63 | DMA_CFGWR = 7'b100010z, | |
64 | DMA_MSG = 7'b0110zzz, | |
65 | PIO_CPL = 7'b0001010, | |
66 | PIO_CPLD = 7'b1001010; | |
67 | ||
68 | // >>>>>>>>>>>>>>>>>>>>>>>>> Port Declarations <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
69 | ||
70 | //--------------------------------------------------------------------- | |
71 | // Clock and Reset Signals | |
72 | //--------------------------------------------------------------------- | |
73 | input clk; // input clock | |
74 | input rst_l; // synchronous reset | |
75 | ||
76 | //--------------------------------------------------------------------- | |
77 | // IHB and IHB management interface | |
78 | //--------------------------------------------------------------------- | |
79 | input [`FIRE_IHB_REC_WDTH-1:0] p2d_ihb_data; // TLP header record | |
80 | ||
81 | //--------------------------------------------------------------------- | |
82 | // record interface to TMU | |
83 | //--------------------------------------------------------------------- | |
84 | output [`FIRE_DLC_IPE_REC_WDTH-1:0] y2k_rcd; // ingress PEC record | |
85 | ||
86 | //--------------------------------------------------------------------- | |
87 | // sub-block to sub-block interface | |
88 | //--------------------------------------------------------------------- | |
89 | output [4:0] iil2isb_tag; | |
90 | input [3:2] isb2iil_low_addr; | |
91 | ||
92 | //--------------------------------------------------------------------- | |
93 | // type decoder outputs | |
94 | //--------------------------------------------------------------------- | |
95 | output ihb_rcd_is_cpl; // to *_xfrfsm.v | |
96 | output [1:0] credit_type; // header type, to *_crdtcnt.v | |
97 | ||
98 | //--------------------------------------------------------------------- | |
99 | // info from *_xfrfsm.v | |
100 | //--------------------------------------------------------------------- | |
101 | input is_ihb_rcd; // in-process rcd a ihb rcd, from *_xfrfsm.v | |
102 | input is_cto_rcd; // in-process rcd a CTO rcd, from *_xfrfsm.v | |
103 | input [4:0] pio_tag_gen; // pio_tag for cpl generator, from *_xfrfsm.v | |
104 | ||
105 | //--------------------------------------------------------------------- | |
106 | // talk to parchk | |
107 | //--------------------------------------------------------------------- | |
108 | output [`FIRE_IHB_REC_WDTH-1:0] in_ihb_rcd; | |
109 | ||
110 | // >>>>>>>>>>>>>>>>>>>>>>>>> Data Type Declarations <<<<<<<<<<<<<<<<<<<<<<<<< | |
111 | ||
112 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
113 | reg [`FIRE_IHB_REC_WDTH-1:0] in_ihb_rcd; | |
114 | reg [`FIRE_DLC_IPE_REC_WDTH-1:0] y2k_rcd; | |
115 | ||
116 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - NON-FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~ | |
117 | reg ihb_rcd_is_cpl; | |
118 | reg is_unsupported_req; | |
119 | reg [1:0] credit_type; | |
120 | ||
121 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ NETS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
122 | wire [`FIRE_DLC_IPE_REC_WDTH-1:0] n_y2k_rcd; | |
123 | ||
124 | //--------------------------------------------------------------------- | |
125 | // In record (IHB) fields | |
126 | //--------------------------------------------------------------------- | |
127 | wire [`FIRE_IHB_2DWH_WDTH-1:0] in_rcd_2dwh; | |
128 | wire [`FIRE_IHB_3DWH_WDTH-1:0] in_rcd_3dwh; | |
129 | wire [`FIRE_IHB_4DWH_WDTH-1:2] in_rcd_4dwh; // strip off 2-LSB | |
130 | ||
131 | //--------------------------------------------------------------------- | |
132 | // Out record (ingress PEC) fields | |
133 | //--------------------------------------------------------------------- | |
134 | wire [`FIRE_DLC_IPE_ADDR_WDTH-1:30] out_rcd_addr_hi; // shared | |
135 | ||
136 | wire [29:0] out_ihb_rcd_addr_lo; // to be muxed | |
137 | ||
138 | wire [`FIRE_DLC_IPE_LEN_WDTH-1:0] out_rcd_len; // shared | |
139 | wire [`FIRE_DLC_IPE_ATR_WDTH-1:0] out_rcd_atr; // shared | |
140 | wire [`FIRE_DLC_IPE_TC_WDTH-1:0] out_rcd_tc; // shared | |
141 | ||
142 | wire [`FIRE_DLC_IPE_TYPE_WDTH-1:0] out_ihb_rcd_type; // to be muxed | |
143 | wire [`FIRE_DLC_IPE_F_WDTH-1:0] out_ihb_rcd_f; // to be muxed | |
144 | wire [2:0] out_ihb_cpl_status; // to be muxed | |
145 | ||
146 | wire [5:2] align_addr; | |
147 | ||
148 | //--------------------------------------------------------------------- | |
149 | // new generated PIO cpl rcd | |
150 | //--------------------------------------------------------------------- | |
151 | wire [2:0] gen_cpl_rcd_status; | |
152 | wire [29:0] gen_cpl_rcd_addr_lo; | |
153 | ||
154 | //--------------------------------------------------------------------- | |
155 | // type decoder | |
156 | //--------------------------------------------------------------------- | |
157 | wire [6:0] in_rcd_type; | |
158 | wire [2:0] in_rcd_cpl_status; | |
159 | wire [4:0] in_rcd_pio_tag; | |
160 | ||
161 | wire is_successful_pio_cpl; | |
162 | ||
163 | // >>>>>>>>>>>>>>>>>>>>>>>>> Zero In Checkers <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
164 | ||
165 | // 0in known_driven -var is_ihb_rcd | |
166 | // 0in known_driven -var is_cto_rcd | |
167 | // 0in bits_on -var credit_type -max 1 -active is_ihb_rcd -message "illegal credit_type" | |
168 | // 0in bits_on -var {ihb_rcd_is_cpl, is_unsupported_req} -max 1 -active is_ihb_rcd | |
169 | ||
170 | // >>>>>>>>>>>>>>>>>>>>>>>>> RTL/Behavioral Model <<<<<<<<<<<<<<<<<<<<<<<<<<< | |
171 | ||
172 | //--------------------------------------------------------------------- | |
173 | // In record fields | |
174 | //--------------------------------------------------------------------- | |
175 | assign in_rcd_2dwh = in_ihb_rcd[`FIRE_IHB_2DWH_MSB:`FIRE_IHB_2DWH_LSB]; | |
176 | assign in_rcd_3dwh = in_ihb_rcd[`FIRE_IHB_3DWH_MSB:`FIRE_IHB_3DWH_LSB]; | |
177 | assign in_rcd_4dwh = in_ihb_rcd[`FIRE_IHB_4DWH_MSB:`FIRE_IHB_4DWH_LSB+2]; | |
178 | ||
179 | //--------------------------------------------------------------------- | |
180 | // type decoder | |
181 | //--------------------------------------------------------------------- | |
182 | ||
183 | assign in_rcd_type = in_ihb_rcd[`FIRE_IHB_1DWH_MSB-1:`FIRE_IHB_1DWH_MSB-7]; | |
184 | ||
185 | assign in_rcd_cpl_status = in_rcd_2dwh[15:13]; | |
186 | assign in_rcd_pio_tag = in_rcd_3dwh[12:8]; | |
187 | assign is_successful_pio_cpl = ~(|in_rcd_cpl_status); | |
188 | assign iil2isb_tag = is_ihb_rcd ? in_rcd_pio_tag : pio_tag_gen; | |
189 | ||
190 | always @ (in_rcd_type) | |
191 | begin | |
192 | ihb_rcd_is_cpl = 1'b0; | |
193 | is_unsupported_req = 1'b0; | |
194 | credit_type = 2'b0; | |
195 | ||
196 | casez (in_rcd_type) // 0in < case -parallel -full -active is_ihb_rcd | |
197 | DMA_MRD, | |
198 | DMA_MRDLK: credit_type = 2'b10; | |
199 | ||
200 | DMA_MWR, | |
201 | DMA_MSG: credit_type = 2'b01; | |
202 | ||
203 | DMA_IORD, | |
204 | DMA_CFGRD, | |
205 | DMA_IOWR, | |
206 | DMA_CFGWR: | |
207 | begin | |
208 | is_unsupported_req = 1'b1; | |
209 | credit_type = 2'b10; | |
210 | end | |
211 | ||
212 | PIO_CPL, | |
213 | PIO_CPLD: | |
214 | begin | |
215 | ihb_rcd_is_cpl = 1'b1; | |
216 | end | |
217 | endcase // casez(in_rcd_type) | |
218 | end | |
219 | ||
220 | ||
221 | //--------------------------------------------------------------------- | |
222 | // new rcd fields based on IHB rcd | |
223 | //--------------------------------------------------------------------- | |
224 | ||
225 | assign out_ihb_rcd_f = is_unsupported_req ? | |
226 | 2'b00 : in_rcd_type[6:5]; | |
227 | assign out_ihb_rcd_type = is_unsupported_req ? 5'b01001 : in_rcd_type[4:0]; | |
228 | ||
229 | assign out_rcd_tc = in_ihb_rcd[`FIRE_IHB_1DWH_LSB+22:`FIRE_IHB_1DWH_LSB+20]; | |
230 | ||
231 | assign out_rcd_atr = in_ihb_rcd[`FIRE_IHB_1DWH_LSB+13:`FIRE_IHB_1DWH_LSB+12]; | |
232 | assign out_rcd_len = in_ihb_rcd[`FIRE_IHB_1DWH_LSB+9:`FIRE_IHB_1DWH_LSB]; | |
233 | ||
234 | assign out_rcd_addr_hi = in_rcd_type[5] ? in_rcd_3dwh : 32'b0; | |
235 | ||
236 | assign align_addr = ihb_rcd_is_cpl ? {2'b0, isb2iil_low_addr[3:2]} : in_rcd_3dwh[5:2]; | |
237 | ||
238 | assign out_ihb_rcd_addr_lo = in_rcd_type[5] ? in_rcd_4dwh : | |
239 | {in_rcd_3dwh[31:6], align_addr}; | |
240 | ||
241 | // -------------------------------------------------------------------------- | |
242 | // According to the PCI-Express spec, all reserved status values | |
243 | // (i.e. 011, 101, 110, and 111) must be treated as "Unsupported Request". | |
244 | // Moreover, CLU maps the two unreserved status (unsupported request and | |
245 | // completer abort) to JBUS bus error. Therefore, ILU traps PIO Cpl with | |
246 | // configuration retry status (TLU takes care of it); converts PIO Cpl with | |
247 | // status other that succesful to unsupported request status | |
248 | // -------------------------------------------------------------------------- | |
249 | assign out_ihb_cpl_status = is_successful_pio_cpl ? in_rcd_cpl_status : 3'b001; | |
250 | ||
251 | //--------------------------------------------------------------------- | |
252 | // IIL sourced PIO Cpl rcd fields - new generated PIO cpl rcd, status is | |
253 | // "UR" (3'b001) if it is in drain state, | |
254 | // "TO" (3'b111 FIRE internal value) if it serves a CTO request from TLU | |
255 | //--------------------------------------------------------------------- | |
256 | assign gen_cpl_rcd_status = is_cto_rcd ? 3'b111 : 3'b001; | |
257 | ||
258 | assign gen_cpl_rcd_addr_lo = {{`FIRE_DLC_IPE_REQID_WDTH{1'b0}}, | |
259 | {3'b0, pio_tag_gen}, | |
260 | pio_tag_gen, pio_tag_gen[0]}; | |
261 | // pio_tag_gen is used to fill rsv fields on the last line above | |
262 | ||
263 | //--------------------------------------------------------------------- | |
264 | // n_y2k_rcd | |
265 | //--------------------------------------------------------------------- | |
266 | assign n_y2k_rcd = {(is_ihb_rcd ? {out_ihb_rcd_f, out_ihb_rcd_type} : 7'b0001010), | |
267 | out_rcd_tc, | |
268 | out_rcd_atr, | |
269 | out_rcd_len, | |
270 | in_rcd_2dwh[31:16], // req_id | |
271 | (is_ihb_rcd ? (ihb_rcd_is_cpl ? out_ihb_cpl_status : | |
272 | in_rcd_2dwh[15:13]) : | |
273 | gen_cpl_rcd_status), | |
274 | in_rcd_2dwh[12:0], | |
275 | out_rcd_addr_hi, | |
276 | (is_ihb_rcd ? out_ihb_rcd_addr_lo : gen_cpl_rcd_addr_lo) }; | |
277 | ||
278 | always @ (posedge clk) | |
279 | if(~rst_l) begin | |
280 | in_ihb_rcd <= {`FIRE_IHB_REC_WDTH{1'b0}}; | |
281 | y2k_rcd <= {`FIRE_DLC_IPE_REC_WDTH{1'b0}}; | |
282 | end | |
283 | else begin | |
284 | in_ihb_rcd <= p2d_ihb_data; | |
285 | y2k_rcd <= n_y2k_rcd; | |
286 | end | |
287 | ||
288 | // >>>>>>>>>>>>>>>>>>>>>>>>> Instantiations <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< | |
289 | ||
290 | endmodule // dmu_ilu_iil_rcdbldr | |
291 |