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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / dmu / rtl / dmu_imu_iss_stage_mux_only.v
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: dmu_imu_iss_stage_mux_only.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35module dmu_imu_iss_stage_mux_only
36 (
37 clk,
38 read_data_0,
39 interrupt_mapping_20_select_pulse,
40 interrupt_mapping_20_select_pulse_out,
41 interrupt_mapping_21_select_pulse,
42 interrupt_mapping_21_select_pulse_out,
43 interrupt_mapping_22_select_pulse,
44 interrupt_mapping_22_select_pulse_out,
45 interrupt_mapping_23_select_pulse,
46 interrupt_mapping_23_select_pulse_out,
47 interrupt_mapping_24_select_pulse,
48 interrupt_mapping_24_select_pulse_out,
49 interrupt_mapping_25_select_pulse,
50 interrupt_mapping_25_select_pulse_out,
51 interrupt_mapping_26_select_pulse,
52 interrupt_mapping_26_select_pulse_out,
53 interrupt_mapping_27_select_pulse,
54 interrupt_mapping_27_select_pulse_out,
55 interrupt_mapping_28_select_pulse,
56 interrupt_mapping_28_select_pulse_out,
57 interrupt_mapping_29_select_pulse,
58 interrupt_mapping_29_select_pulse_out,
59 interrupt_mapping_30_select_pulse,
60 interrupt_mapping_30_select_pulse_out,
61 interrupt_mapping_31_select_pulse,
62 interrupt_mapping_31_select_pulse_out,
63 interrupt_mapping_32_select_pulse,
64 interrupt_mapping_32_select_pulse_out,
65 interrupt_mapping_33_select_pulse,
66 interrupt_mapping_33_select_pulse_out,
67 interrupt_mapping_34_select_pulse,
68 interrupt_mapping_34_select_pulse_out,
69 interrupt_mapping_35_select_pulse,
70 interrupt_mapping_35_select_pulse_out,
71 interrupt_mapping_36_select_pulse,
72 interrupt_mapping_36_select_pulse_out,
73 interrupt_mapping_37_select_pulse,
74 interrupt_mapping_37_select_pulse_out,
75 interrupt_mapping_38_select_pulse,
76 interrupt_mapping_38_select_pulse_out,
77 interrupt_mapping_39_select_pulse,
78 interrupt_mapping_39_select_pulse_out,
79 interrupt_mapping_40_select_pulse,
80 interrupt_mapping_40_select_pulse_out,
81 interrupt_mapping_41_select_pulse,
82 interrupt_mapping_41_select_pulse_out,
83 interrupt_mapping_42_select_pulse,
84 interrupt_mapping_42_select_pulse_out,
85 interrupt_mapping_43_select_pulse,
86 interrupt_mapping_43_select_pulse_out,
87 interrupt_mapping_44_select_pulse,
88 interrupt_mapping_44_select_pulse_out,
89 interrupt_mapping_45_select_pulse,
90 interrupt_mapping_45_select_pulse_out,
91 interrupt_mapping_46_select_pulse,
92 interrupt_mapping_46_select_pulse_out,
93 interrupt_mapping_47_select_pulse,
94 interrupt_mapping_47_select_pulse_out,
95 interrupt_mapping_48_select_pulse,
96 interrupt_mapping_48_select_pulse_out,
97 interrupt_mapping_49_select_pulse,
98 interrupt_mapping_49_select_pulse_out,
99 interrupt_mapping_50_select_pulse,
100 interrupt_mapping_50_select_pulse_out,
101 interrupt_mapping_51_select_pulse,
102 interrupt_mapping_51_select_pulse_out,
103 interrupt_mapping_52_select_pulse,
104 interrupt_mapping_52_select_pulse_out,
105 interrupt_mapping_53_select_pulse,
106 interrupt_mapping_53_select_pulse_out,
107 interrupt_mapping_54_select_pulse,
108 interrupt_mapping_54_select_pulse_out,
109 interrupt_mapping_55_select_pulse,
110 interrupt_mapping_55_select_pulse_out,
111 interrupt_mapping_56_select_pulse,
112 interrupt_mapping_56_select_pulse_out,
113 interrupt_mapping_57_select_pulse,
114 interrupt_mapping_57_select_pulse_out,
115 interrupt_mapping_58_select_pulse,
116 interrupt_mapping_58_select_pulse_out,
117 interrupt_mapping_59_select_pulse,
118 interrupt_mapping_59_select_pulse_out,
119 interrupt_mapping_62_select_pulse,
120 interrupt_mapping_62_select_pulse_out,
121 interrupt_mapping_63_select_pulse,
122 interrupt_mapping_63_select_pulse_out,
123 clr_int_reg_20_select,
124 clr_int_reg_20_select_out,
125 clr_int_reg_21_select,
126 clr_int_reg_21_select_out,
127 clr_int_reg_22_select,
128 clr_int_reg_22_select_out,
129 clr_int_reg_23_select,
130 clr_int_reg_23_select_out,
131 clr_int_reg_24_select,
132 clr_int_reg_24_select_out,
133 clr_int_reg_25_select,
134 clr_int_reg_25_select_out,
135 clr_int_reg_26_select,
136 clr_int_reg_26_select_out,
137 clr_int_reg_27_select,
138 clr_int_reg_27_select_out,
139 clr_int_reg_28_select,
140 clr_int_reg_28_select_out,
141 clr_int_reg_29_select,
142 clr_int_reg_29_select_out,
143 clr_int_reg_30_select,
144 clr_int_reg_30_select_out,
145 clr_int_reg_31_select,
146 clr_int_reg_31_select_out,
147 clr_int_reg_32_select,
148 clr_int_reg_32_select_out,
149 clr_int_reg_33_select,
150 clr_int_reg_33_select_out,
151 clr_int_reg_34_select,
152 clr_int_reg_34_select_out,
153 clr_int_reg_35_select,
154 clr_int_reg_35_select_out,
155 clr_int_reg_36_select,
156 clr_int_reg_36_select_out,
157 clr_int_reg_37_select,
158 clr_int_reg_37_select_out,
159 clr_int_reg_38_select,
160 clr_int_reg_38_select_out,
161 clr_int_reg_39_select,
162 clr_int_reg_39_select_out,
163 clr_int_reg_40_select,
164 clr_int_reg_40_select_out,
165 clr_int_reg_41_select,
166 clr_int_reg_41_select_out,
167 clr_int_reg_42_select,
168 clr_int_reg_42_select_out,
169 clr_int_reg_43_select,
170 clr_int_reg_43_select_out,
171 clr_int_reg_44_select,
172 clr_int_reg_44_select_out,
173 clr_int_reg_45_select,
174 clr_int_reg_45_select_out,
175 clr_int_reg_46_select,
176 clr_int_reg_46_select_out,
177 clr_int_reg_47_select,
178 clr_int_reg_47_select_out,
179 clr_int_reg_48_select,
180 clr_int_reg_48_select_out,
181 clr_int_reg_49_select,
182 clr_int_reg_49_select_out,
183 clr_int_reg_50_select,
184 clr_int_reg_50_select_out,
185 clr_int_reg_51_select,
186 clr_int_reg_51_select_out,
187 clr_int_reg_52_select,
188 clr_int_reg_52_select_out,
189 clr_int_reg_53_select,
190 clr_int_reg_53_select_out,
191 clr_int_reg_54_select,
192 clr_int_reg_54_select_out,
193 clr_int_reg_55_select,
194 clr_int_reg_55_select_out,
195 clr_int_reg_56_select,
196 clr_int_reg_56_select_out,
197 clr_int_reg_57_select,
198 clr_int_reg_57_select_out,
199 clr_int_reg_58_select,
200 clr_int_reg_58_select_out,
201 clr_int_reg_59_select,
202 clr_int_reg_59_select_out,
203 clr_int_reg_62_select,
204 clr_int_reg_62_select_out,
205 clr_int_reg_63_select,
206 clr_int_reg_63_select_out,
207 interrupt_retry_timer_select_pulse,
208 interrupt_retry_timer_select_pulse_out,
209 interrupt_state_status_1_select,
210 interrupt_state_status_1_select_out,
211 interrupt_state_status_2_select,
212 interrupt_state_status_2_select_out,
213 daemon_csrbus_wr_in,
214 daemon_csrbus_wr_out,
215 daemon_csrbus_wr_data_in,
216 daemon_csrbus_wr_data_out,
217 read_data_0_out,
218 rst_l,
219 rst_l_out
220 );
221
222//====================================================
223// Polarity declarations
224//====================================================
225input clk; // Clock signal
226input [`FIRE_CSRBUS_DATA_WIDTH - 1:0] read_data_0; // Read Data
227input interrupt_mapping_20_select_pulse; // select
228output interrupt_mapping_20_select_pulse_out; // select
229input interrupt_mapping_21_select_pulse; // select
230output interrupt_mapping_21_select_pulse_out; // select
231input interrupt_mapping_22_select_pulse; // select
232output interrupt_mapping_22_select_pulse_out; // select
233input interrupt_mapping_23_select_pulse; // select
234output interrupt_mapping_23_select_pulse_out; // select
235input interrupt_mapping_24_select_pulse; // select
236output interrupt_mapping_24_select_pulse_out; // select
237input interrupt_mapping_25_select_pulse; // select
238output interrupt_mapping_25_select_pulse_out; // select
239input interrupt_mapping_26_select_pulse; // select
240output interrupt_mapping_26_select_pulse_out; // select
241input interrupt_mapping_27_select_pulse; // select
242output interrupt_mapping_27_select_pulse_out; // select
243input interrupt_mapping_28_select_pulse; // select
244output interrupt_mapping_28_select_pulse_out; // select
245input interrupt_mapping_29_select_pulse; // select
246output interrupt_mapping_29_select_pulse_out; // select
247input interrupt_mapping_30_select_pulse; // select
248output interrupt_mapping_30_select_pulse_out; // select
249input interrupt_mapping_31_select_pulse; // select
250output interrupt_mapping_31_select_pulse_out; // select
251input interrupt_mapping_32_select_pulse; // select
252output interrupt_mapping_32_select_pulse_out; // select
253input interrupt_mapping_33_select_pulse; // select
254output interrupt_mapping_33_select_pulse_out; // select
255input interrupt_mapping_34_select_pulse; // select
256output interrupt_mapping_34_select_pulse_out; // select
257input interrupt_mapping_35_select_pulse; // select
258output interrupt_mapping_35_select_pulse_out; // select
259input interrupt_mapping_36_select_pulse; // select
260output interrupt_mapping_36_select_pulse_out; // select
261input interrupt_mapping_37_select_pulse; // select
262output interrupt_mapping_37_select_pulse_out; // select
263input interrupt_mapping_38_select_pulse; // select
264output interrupt_mapping_38_select_pulse_out; // select
265input interrupt_mapping_39_select_pulse; // select
266output interrupt_mapping_39_select_pulse_out; // select
267input interrupt_mapping_40_select_pulse; // select
268output interrupt_mapping_40_select_pulse_out; // select
269input interrupt_mapping_41_select_pulse; // select
270output interrupt_mapping_41_select_pulse_out; // select
271input interrupt_mapping_42_select_pulse; // select
272output interrupt_mapping_42_select_pulse_out; // select
273input interrupt_mapping_43_select_pulse; // select
274output interrupt_mapping_43_select_pulse_out; // select
275input interrupt_mapping_44_select_pulse; // select
276output interrupt_mapping_44_select_pulse_out; // select
277input interrupt_mapping_45_select_pulse; // select
278output interrupt_mapping_45_select_pulse_out; // select
279input interrupt_mapping_46_select_pulse; // select
280output interrupt_mapping_46_select_pulse_out; // select
281input interrupt_mapping_47_select_pulse; // select
282output interrupt_mapping_47_select_pulse_out; // select
283input interrupt_mapping_48_select_pulse; // select
284output interrupt_mapping_48_select_pulse_out; // select
285input interrupt_mapping_49_select_pulse; // select
286output interrupt_mapping_49_select_pulse_out; // select
287input interrupt_mapping_50_select_pulse; // select
288output interrupt_mapping_50_select_pulse_out; // select
289input interrupt_mapping_51_select_pulse; // select
290output interrupt_mapping_51_select_pulse_out; // select
291input interrupt_mapping_52_select_pulse; // select
292output interrupt_mapping_52_select_pulse_out; // select
293input interrupt_mapping_53_select_pulse; // select
294output interrupt_mapping_53_select_pulse_out; // select
295input interrupt_mapping_54_select_pulse; // select
296output interrupt_mapping_54_select_pulse_out; // select
297input interrupt_mapping_55_select_pulse; // select
298output interrupt_mapping_55_select_pulse_out; // select
299input interrupt_mapping_56_select_pulse; // select
300output interrupt_mapping_56_select_pulse_out; // select
301input interrupt_mapping_57_select_pulse; // select
302output interrupt_mapping_57_select_pulse_out; // select
303input interrupt_mapping_58_select_pulse; // select
304output interrupt_mapping_58_select_pulse_out; // select
305input interrupt_mapping_59_select_pulse; // select
306output interrupt_mapping_59_select_pulse_out; // select
307input interrupt_mapping_62_select_pulse; // select
308output interrupt_mapping_62_select_pulse_out; // select
309input interrupt_mapping_63_select_pulse; // select
310output interrupt_mapping_63_select_pulse_out; // select
311input clr_int_reg_20_select; // select
312output clr_int_reg_20_select_out; // select
313input clr_int_reg_21_select; // select
314output clr_int_reg_21_select_out; // select
315input clr_int_reg_22_select; // select
316output clr_int_reg_22_select_out; // select
317input clr_int_reg_23_select; // select
318output clr_int_reg_23_select_out; // select
319input clr_int_reg_24_select; // select
320output clr_int_reg_24_select_out; // select
321input clr_int_reg_25_select; // select
322output clr_int_reg_25_select_out; // select
323input clr_int_reg_26_select; // select
324output clr_int_reg_26_select_out; // select
325input clr_int_reg_27_select; // select
326output clr_int_reg_27_select_out; // select
327input clr_int_reg_28_select; // select
328output clr_int_reg_28_select_out; // select
329input clr_int_reg_29_select; // select
330output clr_int_reg_29_select_out; // select
331input clr_int_reg_30_select; // select
332output clr_int_reg_30_select_out; // select
333input clr_int_reg_31_select; // select
334output clr_int_reg_31_select_out; // select
335input clr_int_reg_32_select; // select
336output clr_int_reg_32_select_out; // select
337input clr_int_reg_33_select; // select
338output clr_int_reg_33_select_out; // select
339input clr_int_reg_34_select; // select
340output clr_int_reg_34_select_out; // select
341input clr_int_reg_35_select; // select
342output clr_int_reg_35_select_out; // select
343input clr_int_reg_36_select; // select
344output clr_int_reg_36_select_out; // select
345input clr_int_reg_37_select; // select
346output clr_int_reg_37_select_out; // select
347input clr_int_reg_38_select; // select
348output clr_int_reg_38_select_out; // select
349input clr_int_reg_39_select; // select
350output clr_int_reg_39_select_out; // select
351input clr_int_reg_40_select; // select
352output clr_int_reg_40_select_out; // select
353input clr_int_reg_41_select; // select
354output clr_int_reg_41_select_out; // select
355input clr_int_reg_42_select; // select
356output clr_int_reg_42_select_out; // select
357input clr_int_reg_43_select; // select
358output clr_int_reg_43_select_out; // select
359input clr_int_reg_44_select; // select
360output clr_int_reg_44_select_out; // select
361input clr_int_reg_45_select; // select
362output clr_int_reg_45_select_out; // select
363input clr_int_reg_46_select; // select
364output clr_int_reg_46_select_out; // select
365input clr_int_reg_47_select; // select
366output clr_int_reg_47_select_out; // select
367input clr_int_reg_48_select; // select
368output clr_int_reg_48_select_out; // select
369input clr_int_reg_49_select; // select
370output clr_int_reg_49_select_out; // select
371input clr_int_reg_50_select; // select
372output clr_int_reg_50_select_out; // select
373input clr_int_reg_51_select; // select
374output clr_int_reg_51_select_out; // select
375input clr_int_reg_52_select; // select
376output clr_int_reg_52_select_out; // select
377input clr_int_reg_53_select; // select
378output clr_int_reg_53_select_out; // select
379input clr_int_reg_54_select; // select
380output clr_int_reg_54_select_out; // select
381input clr_int_reg_55_select; // select
382output clr_int_reg_55_select_out; // select
383input clr_int_reg_56_select; // select
384output clr_int_reg_56_select_out; // select
385input clr_int_reg_57_select; // select
386output clr_int_reg_57_select_out; // select
387input clr_int_reg_58_select; // select
388output clr_int_reg_58_select_out; // select
389input clr_int_reg_59_select; // select
390output clr_int_reg_59_select_out; // select
391input clr_int_reg_62_select; // select
392output clr_int_reg_62_select_out; // select
393input clr_int_reg_63_select; // select
394output clr_int_reg_63_select_out; // select
395input interrupt_retry_timer_select_pulse; // select
396output interrupt_retry_timer_select_pulse_out; // select
397input interrupt_state_status_1_select; // select
398output interrupt_state_status_1_select_out; // select
399input interrupt_state_status_2_select; // select
400output interrupt_state_status_2_select_out; // select
401input daemon_csrbus_wr_in; // csrbus_wr
402output daemon_csrbus_wr_out; // csrbus_wr
403input [`FIRE_CSRBUS_DATA_WIDTH-1:0] daemon_csrbus_wr_data_in; // SW write data
404output [`FIRE_CSRBUS_DATA_WIDTH-1:0] daemon_csrbus_wr_data_out; // SW write
405 // data
406output [`FIRE_CSRBUS_DATA_WIDTH - 1:0] read_data_0_out; // Read Data
407input rst_l; // HW reset
408output rst_l_out; // HW reset
409
410//====================================================
411// Type declarations
412//====================================================
413wire clk; // Clock signal
414wire [`FIRE_CSRBUS_DATA_WIDTH - 1:0] read_data_0; // Read Data
415wire interrupt_mapping_20_select_pulse; // select
416wire interrupt_mapping_20_select_pulse_out; // select
417wire interrupt_mapping_21_select_pulse; // select
418wire interrupt_mapping_21_select_pulse_out; // select
419wire interrupt_mapping_22_select_pulse; // select
420wire interrupt_mapping_22_select_pulse_out; // select
421wire interrupt_mapping_23_select_pulse; // select
422wire interrupt_mapping_23_select_pulse_out; // select
423wire interrupt_mapping_24_select_pulse; // select
424wire interrupt_mapping_24_select_pulse_out; // select
425wire interrupt_mapping_25_select_pulse; // select
426wire interrupt_mapping_25_select_pulse_out; // select
427wire interrupt_mapping_26_select_pulse; // select
428wire interrupt_mapping_26_select_pulse_out; // select
429wire interrupt_mapping_27_select_pulse; // select
430wire interrupt_mapping_27_select_pulse_out; // select
431wire interrupt_mapping_28_select_pulse; // select
432wire interrupt_mapping_28_select_pulse_out; // select
433wire interrupt_mapping_29_select_pulse; // select
434wire interrupt_mapping_29_select_pulse_out; // select
435wire interrupt_mapping_30_select_pulse; // select
436wire interrupt_mapping_30_select_pulse_out; // select
437wire interrupt_mapping_31_select_pulse; // select
438wire interrupt_mapping_31_select_pulse_out; // select
439wire interrupt_mapping_32_select_pulse; // select
440wire interrupt_mapping_32_select_pulse_out; // select
441wire interrupt_mapping_33_select_pulse; // select
442wire interrupt_mapping_33_select_pulse_out; // select
443wire interrupt_mapping_34_select_pulse; // select
444wire interrupt_mapping_34_select_pulse_out; // select
445wire interrupt_mapping_35_select_pulse; // select
446wire interrupt_mapping_35_select_pulse_out; // select
447wire interrupt_mapping_36_select_pulse; // select
448wire interrupt_mapping_36_select_pulse_out; // select
449wire interrupt_mapping_37_select_pulse; // select
450wire interrupt_mapping_37_select_pulse_out; // select
451wire interrupt_mapping_38_select_pulse; // select
452wire interrupt_mapping_38_select_pulse_out; // select
453wire interrupt_mapping_39_select_pulse; // select
454wire interrupt_mapping_39_select_pulse_out; // select
455wire interrupt_mapping_40_select_pulse; // select
456wire interrupt_mapping_40_select_pulse_out; // select
457wire interrupt_mapping_41_select_pulse; // select
458wire interrupt_mapping_41_select_pulse_out; // select
459wire interrupt_mapping_42_select_pulse; // select
460wire interrupt_mapping_42_select_pulse_out; // select
461wire interrupt_mapping_43_select_pulse; // select
462wire interrupt_mapping_43_select_pulse_out; // select
463wire interrupt_mapping_44_select_pulse; // select
464wire interrupt_mapping_44_select_pulse_out; // select
465wire interrupt_mapping_45_select_pulse; // select
466wire interrupt_mapping_45_select_pulse_out; // select
467wire interrupt_mapping_46_select_pulse; // select
468wire interrupt_mapping_46_select_pulse_out; // select
469wire interrupt_mapping_47_select_pulse; // select
470wire interrupt_mapping_47_select_pulse_out; // select
471wire interrupt_mapping_48_select_pulse; // select
472wire interrupt_mapping_48_select_pulse_out; // select
473wire interrupt_mapping_49_select_pulse; // select
474wire interrupt_mapping_49_select_pulse_out; // select
475wire interrupt_mapping_50_select_pulse; // select
476wire interrupt_mapping_50_select_pulse_out; // select
477wire interrupt_mapping_51_select_pulse; // select
478wire interrupt_mapping_51_select_pulse_out; // select
479wire interrupt_mapping_52_select_pulse; // select
480wire interrupt_mapping_52_select_pulse_out; // select
481wire interrupt_mapping_53_select_pulse; // select
482wire interrupt_mapping_53_select_pulse_out; // select
483wire interrupt_mapping_54_select_pulse; // select
484wire interrupt_mapping_54_select_pulse_out; // select
485wire interrupt_mapping_55_select_pulse; // select
486wire interrupt_mapping_55_select_pulse_out; // select
487wire interrupt_mapping_56_select_pulse; // select
488wire interrupt_mapping_56_select_pulse_out; // select
489wire interrupt_mapping_57_select_pulse; // select
490wire interrupt_mapping_57_select_pulse_out; // select
491wire interrupt_mapping_58_select_pulse; // select
492wire interrupt_mapping_58_select_pulse_out; // select
493wire interrupt_mapping_59_select_pulse; // select
494wire interrupt_mapping_59_select_pulse_out; // select
495wire interrupt_mapping_62_select_pulse; // select
496wire interrupt_mapping_62_select_pulse_out; // select
497wire interrupt_mapping_63_select_pulse; // select
498wire interrupt_mapping_63_select_pulse_out; // select
499wire clr_int_reg_20_select; // select
500wire clr_int_reg_20_select_out; // select
501wire clr_int_reg_21_select; // select
502wire clr_int_reg_21_select_out; // select
503wire clr_int_reg_22_select; // select
504wire clr_int_reg_22_select_out; // select
505wire clr_int_reg_23_select; // select
506wire clr_int_reg_23_select_out; // select
507wire clr_int_reg_24_select; // select
508wire clr_int_reg_24_select_out; // select
509wire clr_int_reg_25_select; // select
510wire clr_int_reg_25_select_out; // select
511wire clr_int_reg_26_select; // select
512wire clr_int_reg_26_select_out; // select
513wire clr_int_reg_27_select; // select
514wire clr_int_reg_27_select_out; // select
515wire clr_int_reg_28_select; // select
516wire clr_int_reg_28_select_out; // select
517wire clr_int_reg_29_select; // select
518wire clr_int_reg_29_select_out; // select
519wire clr_int_reg_30_select; // select
520wire clr_int_reg_30_select_out; // select
521wire clr_int_reg_31_select; // select
522wire clr_int_reg_31_select_out; // select
523wire clr_int_reg_32_select; // select
524wire clr_int_reg_32_select_out; // select
525wire clr_int_reg_33_select; // select
526wire clr_int_reg_33_select_out; // select
527wire clr_int_reg_34_select; // select
528wire clr_int_reg_34_select_out; // select
529wire clr_int_reg_35_select; // select
530wire clr_int_reg_35_select_out; // select
531wire clr_int_reg_36_select; // select
532wire clr_int_reg_36_select_out; // select
533wire clr_int_reg_37_select; // select
534wire clr_int_reg_37_select_out; // select
535wire clr_int_reg_38_select; // select
536wire clr_int_reg_38_select_out; // select
537wire clr_int_reg_39_select; // select
538wire clr_int_reg_39_select_out; // select
539wire clr_int_reg_40_select; // select
540wire clr_int_reg_40_select_out; // select
541wire clr_int_reg_41_select; // select
542wire clr_int_reg_41_select_out; // select
543wire clr_int_reg_42_select; // select
544wire clr_int_reg_42_select_out; // select
545wire clr_int_reg_43_select; // select
546wire clr_int_reg_43_select_out; // select
547wire clr_int_reg_44_select; // select
548wire clr_int_reg_44_select_out; // select
549wire clr_int_reg_45_select; // select
550wire clr_int_reg_45_select_out; // select
551wire clr_int_reg_46_select; // select
552wire clr_int_reg_46_select_out; // select
553wire clr_int_reg_47_select; // select
554wire clr_int_reg_47_select_out; // select
555wire clr_int_reg_48_select; // select
556wire clr_int_reg_48_select_out; // select
557wire clr_int_reg_49_select; // select
558wire clr_int_reg_49_select_out; // select
559wire clr_int_reg_50_select; // select
560wire clr_int_reg_50_select_out; // select
561wire clr_int_reg_51_select; // select
562wire clr_int_reg_51_select_out; // select
563wire clr_int_reg_52_select; // select
564wire clr_int_reg_52_select_out; // select
565wire clr_int_reg_53_select; // select
566wire clr_int_reg_53_select_out; // select
567wire clr_int_reg_54_select; // select
568wire clr_int_reg_54_select_out; // select
569wire clr_int_reg_55_select; // select
570wire clr_int_reg_55_select_out; // select
571wire clr_int_reg_56_select; // select
572wire clr_int_reg_56_select_out; // select
573wire clr_int_reg_57_select; // select
574wire clr_int_reg_57_select_out; // select
575wire clr_int_reg_58_select; // select
576wire clr_int_reg_58_select_out; // select
577wire clr_int_reg_59_select; // select
578wire clr_int_reg_59_select_out; // select
579wire clr_int_reg_62_select; // select
580wire clr_int_reg_62_select_out; // select
581wire clr_int_reg_63_select; // select
582wire clr_int_reg_63_select_out; // select
583wire interrupt_retry_timer_select_pulse; // select
584wire interrupt_retry_timer_select_pulse_out; // select
585wire interrupt_state_status_1_select; // select
586wire interrupt_state_status_1_select_out; // select
587wire interrupt_state_status_2_select; // select
588wire interrupt_state_status_2_select_out; // select
589wire daemon_csrbus_wr_in; // csrbus_wr
590wire daemon_csrbus_wr_out; // csrbus_wr
591wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] daemon_csrbus_wr_data_in; // SW write data
592wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] daemon_csrbus_wr_data_out; // SW write data
593wire [`FIRE_CSRBUS_DATA_WIDTH - 1:0] read_data_0_out; // Read Data
594wire rst_l; // HW reset
595wire rst_l_out; // HW reset
596
597
598//====================================================
599// Assignments only
600//====================================================
601assign interrupt_mapping_20_select_pulse_out = interrupt_mapping_20_select_pulse;
602assign interrupt_mapping_21_select_pulse_out = interrupt_mapping_21_select_pulse;
603assign interrupt_mapping_22_select_pulse_out = interrupt_mapping_22_select_pulse;
604assign interrupt_mapping_23_select_pulse_out = interrupt_mapping_23_select_pulse;
605assign interrupt_mapping_24_select_pulse_out = interrupt_mapping_24_select_pulse;
606assign interrupt_mapping_25_select_pulse_out = interrupt_mapping_25_select_pulse;
607assign interrupt_mapping_26_select_pulse_out = interrupt_mapping_26_select_pulse;
608assign interrupt_mapping_27_select_pulse_out = interrupt_mapping_27_select_pulse;
609assign interrupt_mapping_28_select_pulse_out = interrupt_mapping_28_select_pulse;
610assign interrupt_mapping_29_select_pulse_out = interrupt_mapping_29_select_pulse;
611assign interrupt_mapping_30_select_pulse_out = interrupt_mapping_30_select_pulse;
612assign interrupt_mapping_31_select_pulse_out = interrupt_mapping_31_select_pulse;
613assign interrupt_mapping_32_select_pulse_out = interrupt_mapping_32_select_pulse;
614assign interrupt_mapping_33_select_pulse_out = interrupt_mapping_33_select_pulse;
615assign interrupt_mapping_34_select_pulse_out = interrupt_mapping_34_select_pulse;
616assign interrupt_mapping_35_select_pulse_out = interrupt_mapping_35_select_pulse;
617assign interrupt_mapping_36_select_pulse_out = interrupt_mapping_36_select_pulse;
618assign interrupt_mapping_37_select_pulse_out = interrupt_mapping_37_select_pulse;
619assign interrupt_mapping_38_select_pulse_out = interrupt_mapping_38_select_pulse;
620assign interrupt_mapping_39_select_pulse_out = interrupt_mapping_39_select_pulse;
621assign interrupt_mapping_40_select_pulse_out = interrupt_mapping_40_select_pulse;
622assign interrupt_mapping_41_select_pulse_out = interrupt_mapping_41_select_pulse;
623assign interrupt_mapping_42_select_pulse_out = interrupt_mapping_42_select_pulse;
624assign interrupt_mapping_43_select_pulse_out = interrupt_mapping_43_select_pulse;
625assign interrupt_mapping_44_select_pulse_out = interrupt_mapping_44_select_pulse;
626assign interrupt_mapping_45_select_pulse_out = interrupt_mapping_45_select_pulse;
627assign interrupt_mapping_46_select_pulse_out = interrupt_mapping_46_select_pulse;
628assign interrupt_mapping_47_select_pulse_out = interrupt_mapping_47_select_pulse;
629assign interrupt_mapping_48_select_pulse_out = interrupt_mapping_48_select_pulse;
630assign interrupt_mapping_49_select_pulse_out = interrupt_mapping_49_select_pulse;
631assign interrupt_mapping_50_select_pulse_out = interrupt_mapping_50_select_pulse;
632assign interrupt_mapping_51_select_pulse_out = interrupt_mapping_51_select_pulse;
633assign interrupt_mapping_52_select_pulse_out = interrupt_mapping_52_select_pulse;
634assign interrupt_mapping_53_select_pulse_out = interrupt_mapping_53_select_pulse;
635assign interrupt_mapping_54_select_pulse_out = interrupt_mapping_54_select_pulse;
636assign interrupt_mapping_55_select_pulse_out = interrupt_mapping_55_select_pulse;
637assign interrupt_mapping_56_select_pulse_out = interrupt_mapping_56_select_pulse;
638assign interrupt_mapping_57_select_pulse_out = interrupt_mapping_57_select_pulse;
639assign interrupt_mapping_58_select_pulse_out = interrupt_mapping_58_select_pulse;
640assign interrupt_mapping_59_select_pulse_out = interrupt_mapping_59_select_pulse;
641assign interrupt_mapping_62_select_pulse_out = interrupt_mapping_62_select_pulse;
642assign interrupt_mapping_63_select_pulse_out = interrupt_mapping_63_select_pulse;
643assign clr_int_reg_20_select_out = clr_int_reg_20_select;
644assign clr_int_reg_21_select_out = clr_int_reg_21_select;
645assign clr_int_reg_22_select_out = clr_int_reg_22_select;
646assign clr_int_reg_23_select_out = clr_int_reg_23_select;
647assign clr_int_reg_24_select_out = clr_int_reg_24_select;
648assign clr_int_reg_25_select_out = clr_int_reg_25_select;
649assign clr_int_reg_26_select_out = clr_int_reg_26_select;
650assign clr_int_reg_27_select_out = clr_int_reg_27_select;
651assign clr_int_reg_28_select_out = clr_int_reg_28_select;
652assign clr_int_reg_29_select_out = clr_int_reg_29_select;
653assign clr_int_reg_30_select_out = clr_int_reg_30_select;
654assign clr_int_reg_31_select_out = clr_int_reg_31_select;
655assign clr_int_reg_32_select_out = clr_int_reg_32_select;
656assign clr_int_reg_33_select_out = clr_int_reg_33_select;
657assign clr_int_reg_34_select_out = clr_int_reg_34_select;
658assign clr_int_reg_35_select_out = clr_int_reg_35_select;
659assign clr_int_reg_36_select_out = clr_int_reg_36_select;
660assign clr_int_reg_37_select_out = clr_int_reg_37_select;
661assign clr_int_reg_38_select_out = clr_int_reg_38_select;
662assign clr_int_reg_39_select_out = clr_int_reg_39_select;
663assign clr_int_reg_40_select_out = clr_int_reg_40_select;
664assign clr_int_reg_41_select_out = clr_int_reg_41_select;
665assign clr_int_reg_42_select_out = clr_int_reg_42_select;
666assign clr_int_reg_43_select_out = clr_int_reg_43_select;
667assign clr_int_reg_44_select_out = clr_int_reg_44_select;
668assign clr_int_reg_45_select_out = clr_int_reg_45_select;
669assign clr_int_reg_46_select_out = clr_int_reg_46_select;
670assign clr_int_reg_47_select_out = clr_int_reg_47_select;
671assign clr_int_reg_48_select_out = clr_int_reg_48_select;
672assign clr_int_reg_49_select_out = clr_int_reg_49_select;
673assign clr_int_reg_50_select_out = clr_int_reg_50_select;
674assign clr_int_reg_51_select_out = clr_int_reg_51_select;
675assign clr_int_reg_52_select_out = clr_int_reg_52_select;
676assign clr_int_reg_53_select_out = clr_int_reg_53_select;
677assign clr_int_reg_54_select_out = clr_int_reg_54_select;
678assign clr_int_reg_55_select_out = clr_int_reg_55_select;
679assign clr_int_reg_56_select_out = clr_int_reg_56_select;
680assign clr_int_reg_57_select_out = clr_int_reg_57_select;
681assign clr_int_reg_58_select_out = clr_int_reg_58_select;
682assign clr_int_reg_59_select_out = clr_int_reg_59_select;
683assign clr_int_reg_62_select_out = clr_int_reg_62_select;
684assign clr_int_reg_63_select_out = clr_int_reg_63_select;
685assign interrupt_retry_timer_select_pulse_out = interrupt_retry_timer_select_pulse;
686assign interrupt_state_status_1_select_out = interrupt_state_status_1_select;
687assign interrupt_state_status_2_select_out = interrupt_state_status_2_select;
688assign rst_l_out = rst_l;
689assign daemon_csrbus_wr_out = daemon_csrbus_wr_in;
690assign daemon_csrbus_wr_data_out = daemon_csrbus_wr_data_in;
691
692
693//=====================================================
694// OUTPUT: read_data_out
695//=====================================================
696dmu_imu_iss_csrpipe_5 dmu_imu_iss_csrpipe_5_inst_1
697 (
698 .clk (clk),
699 .rst_l (rst_l),
700 .reg_in (1'b0),
701 .reg_out (1'b0),
702 .data0 (read_data_0),
703 .sel0 (1'b1),
704 .data1 (64'b0),
705 .sel1 (1'b1),
706 .data2 (64'b0),
707 .sel2 (1'b1),
708 .data3 (64'b0),
709 .sel3 (1'b1),
710 .data4 (64'b0),
711 .sel4 (1'b1),
712 .out (read_data_0_out)
713 );
714
715endmodule // dmu_imu_iss_stage_mux_only
Full OpenSPARC design & verification tarball including full HDL.