Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / dmu / rtl / dmu_imu_rds_mondo.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: dmu_imu_rds_mondo.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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34// ========== Copyright Header End ============================================
35module dmu_imu_rds_mondo (
36
37 // Clock and Reset
38
39 clk,
40 rst_l,
41
42 // Static ID for IMU for Mondo's
43
44 j2d_jid,
45 j2d_instance_id,
46
47 // Pipeline Input Select
48
49 pipe_select_in,
50
51 // Pipeline Output Select and Outputs
52
53 pipe_select_out,
54 mondo_d_ptr,
55 mondo_jid
56
57 );
58
59
60//############################################################################
61// PORT DECLARATIONS
62//############################################################################
63
64 //------------------------------------------------------------------------
65 // Clock and Reset Signals
66 //------------------------------------------------------------------------
67 input clk;
68 input rst_l;
69
70
71 //------------------------------------------------------------------------
72 // Static ID for IMU for Mondo's
73 //------------------------------------------------------------------------
74 input [`FIRE_J2D_JID_WDTH-1:0] j2d_jid;
75 input [`FIRE_J2D_INSTANCE_ID_WDTH-1:0] j2d_instance_id;
76
77
78 //------------------------------------------------------------------------
79 // Pipeline Input Select
80 //------------------------------------------------------------------------
81 input pipe_select_in;
82
83 //------------------------------------------------------------------------
84 // Pipeline Output Select and Outputs
85 //------------------------------------------------------------------------
86 output pipe_select_out;
87 output [3:0] mondo_d_ptr;
88 output [4:0] mondo_jid;
89
90
91
92
93//############################################################################
94// PARAMETERS
95//############################################################################
96
97 parameter MONDO_FIRST_DPTR = 4'b1100;
98 parameter MONDO_LAST_DPTR = 4'b1111;
99
100
101
102
103//############################################################################
104// SIGNAL DECLARATIONS
105//############################################################################
106
107
108//**************************************************
109// Wire
110//**************************************************
111
112//**************************************************
113// Registers that Are Not Flops
114//**************************************************
115 reg [4:0] jid;
116
117
118//**************************************************
119// Registers that Are Flops
120//**************************************************
121 reg pipe_select_out;
122 reg [3:0] mondo_d_ptr;
123 reg [4:0] mondo_jid;
124 reg [3:0] dptr;
125
126//############################################################################
127// ZERO IN CHECKERS
128//############################################################################
129 //---------------------------------------------------------------------
130 // Range Checkers
131 //---------------------------------------------------------------------
132
133 //0in range -var dptr -min MONDO_FIRST_DPTR -max MONDO_LAST_DPTR
134 //0in range -var jid -min 5'h1c -max 5'h1f
135
136
137
138//############################################################################
139// COMBINATIONAL LOGIC
140//############################################################################
141
142//--------------------------------------------------------------------------
143// Use the ID from the JBC Core to select which ID to use for the Mondo
144//--------------------------------------------------------------------------
145
146always @(j2d_jid or j2d_instance_id)
147 begin
148 case ({j2d_jid,j2d_instance_id}) // synopsys parallel_case full_case infer_mux
149 2'b00: jid = 5'h1c;
150 2'b01: jid = 5'h1d;
151 2'b10: jid = 5'h1e;
152 2'b11: jid = 5'h1f;
153 endcase
154 end
155
156
157//############################################################################
158// SEQUENTIAL LOGIC
159//############################################################################
160
161//--------------------------------------------------------------------------
162// ALLOCATION of the DPTR for the MSI DIU RAM
163//
164// - The RAM is 1K with 64 rows and holds 16 cachelines of data
165// - Space is alloctaed on cachline boundry
166// - 16 lines is 4 bits
167// - C-F are dedicated to the Mondo (1100-1111)
168// - Also need three other bits
169// - upper 2 MSB are to identify ram type in DIU
170// - 00 TLP
171// - 01 PIO
172// - 10 MSI/Mondo RAM
173// - 1 extra bit to unify the read address space as TLP is 2K
174//
175//
176// - Reset the value to the first RAM location
177//
178// - If new requests comes in advance the dptr in cicular fashion
179// - If no new request hold the value.
180//
181//--------------------------------------------------------------------------
182
183always @ (posedge clk)
184 if (!rst_l)
185 dptr <= MONDO_FIRST_DPTR;
186 else if (pipe_select_in)
187 begin
188 if(dptr == MONDO_LAST_DPTR)
189 dptr <= MONDO_FIRST_DPTR;
190 else
191 dptr <= dptr + 1;
192 end
193 else
194 dptr <= dptr;
195
196//--------------------------------------------------------------------------
197// FLOP THE OUTPUTS
198//
199//--------------------------------------------------------------------------
200
201always @ (posedge clk)
202 if (!rst_l)
203 begin // At reset reset all of them to zero.
204 pipe_select_out <= 1'b0;
205 mondo_jid <= 5'h0;
206 mondo_d_ptr <= 4'h0;
207 end
208 else
209 begin
210 pipe_select_out <= pipe_select_in;
211 mondo_jid <= jid;
212 mondo_d_ptr <= dptr;
213 end
214
215
216
217//############################################################################
218// MODULE INSTANTIATIONS
219//############################################################################
220
221
222endmodule