projects / OpenSPARC-T2-DV / blame
? search:
summary | tags | clone url | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / dmu / rtl / dmu_mmu.v
CommitLineData
86530b38
AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: dmu_mmu.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35module dmu_mmu
36 (
37 l2clk, // clock for rams
38 clk, // clock
39 por_l, // power-on reset
40 rst_l, // reset
41 scan_in,
42 tcu_array_bypass,
43 tcu_scan_en,
44 tcu_se_scancollar_in,
45 tcu_array_wr_inhibit,
46 tcu_pce_ov,
47 tcu_aclk,
48 tcu_bclk,
49 scan_out,
50 j2d_instance_id, // jbc instance id
51 j2d_mmu_addr, // jbc snoop address
52 j2d_mmu_addr_vld, // jbc snoop address valid
53 cl2mm_tcr_ack, // clu tcr acknowledge
54 cm2mm_rcd_full, // cmu isr queue full
55 cr2mm_csrbus_addr, // cru csr addr
56 cr2mm_csrbus_src_bus, // cru scr source bus
57 cr2mm_csrbus_valid, // cru csr valid
58 cr2mm_csrbus_wr, // cru csr write
59 cr2mm_csrbus_wr_data, // cru csr write data
60 cr2mm_dbg_sel_a, // cru debug select a
61 cr2mm_dbg_sel_b, // cru debug select b
62 cl2mm_tdr_rcd, // clu tdr record
63 cl2mm_tdr_vld, // clu tdr valid
64 rm2mm_rcd, // rmu srm record
65 rm2mm_rcd_enq, // rmu srm record enqueue
66// d2j_tsb_base, // jbc tsb snoop enable
67// d2j_tsb_enable, // jbc tsb base address
68// d2j_tsb_size, // jbc tsb size
69 mm2cl_tcr_rcd, // clu tcr record
70 mm2cl_tcr_req, // clu tcr request
71 mm2cm_rcd, // cmu isr record
72 mm2cm_rcd_enq, // cmu isr record enqueue
73 mm2cr_csrbus_acc_vio, // cru csr access violation
74 mm2cr_csrbus_done, // cru csr done
75 mm2cr_csrbus_mapped, // cru csr mapped
76 mm2cr_csrbus_read_data, // cru csr read data
77 mm2cr_dbg_a, // cru debug port a
78 mm2cr_dbg_b, // cru debug port b
79 mm2im_int, // imu interrupt
80 mm2rm_rcd_full, // rmu srm queue full
81 dsn_dmc_iei, // NCU forces parity error on iotsb and tdb rams for test
82 dmu_cb0_run,
83 dmu_cb0_addr,
84 dmu_cb0_wdata_key,
85 dmu_cb0_mmu_ptb_wr_en,
86 dmu_cb0_mmu_ptb_rd_en,
87 dmu_cb0_mmu_ptb_lkup_en,
88 mmu_ptb_hit,
89 dmu_cb0_mmu_vtb_wr_en,
90 dmu_cb0_mmu_vtb_rd_en,
91 dmu_cb0_mmu_vtb_lkup_en,
92 dmu_cb0_hld,
93 mmu_vtb_hit,
94 vtb_dout_4msb,
95 ptb2csr_rd2,
96 vtb2csr_rd,
97 dev_iotsb2csr_rd,
98 dmu_mb0_run,
99 dmu_mb0_addr,
100 dmu_mb0_wdata,
101 dmu_mb0_dev_wr_en,
102 dmu_mb0_dev_rd_en,
103 dmu_mb0_tsb_wr_en,
104 dmu_mb0_tsb_rd_en,
105 dmu_mb0_tdb_wr_en,
106 dmu_mb0_tdb_rd_en,
107 tdb_dout_8msb,
108 tdb2csr_rd,
109// efu wires
110 efu_dmu_data, // input efu to devtsb
111 efu_dmu_xfer_en, // input efu to devtsb
112 efu_dmu_clr , // input efu to devtsb
113 dmu_efu_data, // output of devtsb to efu
114 dmu_efu_xfer_en, // output of devtsb to efu
115 csr_sun4v_en // csr bit to enable sun4v mode
116
117 );
118
119// ----------------------------------------------------------------------------
120// Ports
121// ----------------------------------------------------------------------------
122 input l2clk;
123 input clk;
124 input por_l;
125 input rst_l;
126
127 input scan_in;
128 input tcu_array_bypass;
129 input tcu_scan_en;
130 input tcu_se_scancollar_in;
131 input tcu_array_wr_inhibit;
132 input tcu_pce_ov;
133 input tcu_aclk;
134 input tcu_bclk;
135 output scan_out;
136
137 input [`FIRE_J2D_INSTANCE_ID_BITS] j2d_instance_id;
138 input [`FIRE_J2D_MMU_ADDR_BITS] j2d_mmu_addr;
139 input j2d_mmu_addr_vld;
140 input cl2mm_tcr_ack;
141 input cm2mm_rcd_full;
142 input [`FIRE_CSR_ADDR_BITS] cr2mm_csrbus_addr;
143 input [`FIRE_CSR_SRCB_BITS] cr2mm_csrbus_src_bus;
144 input cr2mm_csrbus_valid;
145 input cr2mm_csrbus_wr;
146 input [`FIRE_CSR_DATA_BITS] cr2mm_csrbus_wr_data;
147 input [`FIRE_DLC_DBG_SEL_BITS] cr2mm_dbg_sel_a;
148 input [`FIRE_DLC_DBG_SEL_BITS] cr2mm_dbg_sel_b;
149 input [`FIRE_DLC_TDR_BITS] cl2mm_tdr_rcd;
150 input cl2mm_tdr_vld;
151 input [`FIRE_DLC_SRM_BITS] rm2mm_rcd;
152 input rm2mm_rcd_enq;
153
154// output d2j_tsb_enable;
155// output [`FIRE_D2J_TSB_BASE_BITS] d2j_tsb_base;
156// output [`FIRE_D2J_TSB_SIZE_BITS] d2j_tsb_size;
157 output [`FIRE_DLC_TCR_BITS] mm2cl_tcr_rcd;
158 output mm2cl_tcr_req;
159 output [`FIRE_DLC_ISR_BITS] mm2cm_rcd;
160 output mm2cm_rcd_enq;
161 output mm2cr_csrbus_acc_vio;
162 output mm2cr_csrbus_done;
163 output mm2cr_csrbus_mapped;
164 output [`FIRE_CSR_DATA_BITS] mm2cr_csrbus_read_data;
165 output [`FIRE_DBG_DATA_BITS] mm2cr_dbg_a;
166 output [`FIRE_DBG_DATA_BITS] mm2cr_dbg_b;
167 output mm2im_int;
168 output mm2rm_rcd_full;
169 input dsn_dmc_iei;
170
171 input dmu_cb0_run;
172 input [5:0] dmu_cb0_addr;
173 input [32:0] dmu_cb0_wdata_key;
174 input dmu_cb0_mmu_ptb_wr_en;
175 input dmu_cb0_mmu_ptb_rd_en;
176 input dmu_cb0_mmu_ptb_lkup_en;
177 output [63:0] mmu_ptb_hit;
178 input dmu_cb0_mmu_vtb_wr_en;
179 input dmu_cb0_mmu_vtb_rd_en;
180 input dmu_cb0_mmu_vtb_lkup_en;
181 input dmu_cb0_hld;
182 output [63:0] mmu_vtb_hit;
183 output [3:0] vtb_dout_4msb;
184 output [32:0] ptb2csr_rd2;
185 output [`FIRE_DLC_MMU_VTR_BITS] vtb2csr_rd;
186
187 output [`FIRE_CSR_DATA_BITS] dev_iotsb2csr_rd;
188 input dmu_mb0_run;
189 input [8:0] dmu_mb0_addr;
190 input [7:0] dmu_mb0_wdata;
191 input dmu_mb0_dev_wr_en;
192 input dmu_mb0_dev_rd_en;
193 input dmu_mb0_tsb_wr_en;
194 input dmu_mb0_tsb_rd_en;
195 input dmu_mb0_tdb_wr_en;
196 input dmu_mb0_tdb_rd_en;
197 output [7:0] tdb_dout_8msb;
198 output [`FIRE_DLC_MMU_TDR_BITS] tdb2csr_rd;
199//efu wires
200 input efu_dmu_data ; // input efu to devtsb
201 input efu_dmu_xfer_en; // input efu to devtsb
202 input efu_dmu_clr; // input efu to devtsb
203 output dmu_efu_data; // output of devtsb to efu
204 output dmu_efu_xfer_en ; // output of devtsb to efu
205 output csr_sun4v_en ; // csr bit to enable sun4v mode
206
207
208
209// ----------------------------------------------------------------------------
210// Variables
211// ----------------------------------------------------------------------------
212// wire d2j_tsb_enable;
213// wire [`FIRE_D2J_TSB_BASE_BITS] d2j_tsb_base;
214// wire [`FIRE_D2J_TSB_SIZE_BITS] d2j_tsb_size;
215 wire [`FIRE_DLC_TCR_BITS] mm2cl_tcr_rcd;
216 wire mm2cl_tcr_req;
217 wire [`FIRE_DLC_ISR_BITS] mm2cm_rcd;
218 wire mm2cm_rcd_enq;
219 wire mm2cr_csrbus_acc_vio;
220 wire mm2cr_csrbus_done;
221 wire mm2cr_csrbus_mapped;
222 wire [`FIRE_CSR_DATA_BITS] mm2cr_csrbus_read_data;
223 wire [`FIRE_DBG_DATA_BITS] mm2cr_dbg_a;
224 wire [`FIRE_DBG_DATA_BITS] mm2cr_dbg_b;
225 wire mm2im_int;
226 wire mm2rm_rcd_full;
227
228 wire [`FIRE_DBG_DATA_BITS] crb2csr_dbg_a;
229 wire [`FIRE_DBG_DATA_BITS] crb2csr_dbg_b;
230 wire [`FIRE_DLC_MMU_VTC_BITS] crb2csr_rd;
231 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] crb2tcb_tag;
232 wire [`FIRE_DLC_MMU_CSR_DS_BITS] csr2crb_ds_a;
233 wire [`FIRE_DLC_MMU_CSR_DS_BITS] csr2crb_ds_b;
234 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] csr2crb_ra;
235 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] csr2crb_wa;
236 wire [`FIRE_DLC_MMU_VTC_BITS] csr2crb_wd;
237 wire csr2crb_we;
238 wire csr2pab_ps;
239 wire csr2ptb_inv;
240 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] csr2ptb_ra;
241 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] csr2ptb_wa;
242 wire [`FIRE_CSR_DATA_BITS] csr2ptb_wd;
243 wire csr2ptb_we;
244 wire [`FIRE_DLC_MMU_CSR_DS_BITS] csr2qcb_ds_a;
245 wire [`FIRE_DLC_MMU_CSR_DS_BITS] csr2qcb_ds_b;
246 wire csr2rcb_se;
247// wire [`FIRE_DLC_MMU_CSR_TB_BITS] csr2rcb_tb;
248// wire [`FIRE_DLC_MMU_CSR_TS_BITS] csr2rcb_ts;
249 wire csr2tcb_av;
250 wire csr2tcb_be;
251 wire [`FIRE_DLC_MMU_CSR_CM_BITS] csr2tcb_cm;
252 wire [`FIRE_DLC_MMU_CSR_DS_BITS] csr2tcb_ds_a;
253 wire [`FIRE_DLC_MMU_CSR_DS_BITS] csr2tcb_ds_b;
254 wire csr2tcb_pd;
255 wire csr2tcb_te;
256 wire [`FIRE_DLC_MMU_TDB_PTR_BITS] csr2tdb_ra;
257 wire [`FIRE_DLC_MMU_TDB_PTR_BITS] csr2tdb_wa;
258 wire [`FIRE_DLC_MMU_TDR_BITS] csr2tdb_wd;
259 wire csr2tdb_we;
260 wire csr2tlb_ps;
261 wire [`FIRE_DLC_MMU_CSR_TB_BITS] csr2tlb_tb;
262 wire [`FIRE_DLC_MMU_CSR_TS_BITS] csr2tlb_ts;
263 wire csr2vab_ps;
264 wire [`FIRE_DLC_MMU_CSR_TS_BITS] csr2vab_ts;
265 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] csr2vtb_ra;
266 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] csr2vtb_wa;
267 wire [`FIRE_DLC_MMU_VTR_BITS] csr2vtb_wd;
268 wire csr2vtb_we;
269 wire irb2qcb_enq;
270 wire [`FIRE_DLC_MMU_RDR_BITS] irb2rdq_rcd;
271 wire [`FIRE_DLC_MMU_VAR_BITS] irb2vaq_rcd;
272 wire orb2qcb_full;
273 wire [`FIRE_DLC_MMU_PAR_BITS] pab2paq_rcd;
274 wire [`FIRE_DLC_MMU_PAB_ERR_BITS] pab2tcb_err;
275 wire [`FIRE_DLC_MMU_PAR_BITS] paq2orb_rcd;
276 wire [24:0] ptb2csr_rd1;
277 wire [5:0] ptb2csr_rd3;
278 wire ptb2tcb_hit;
279 wire [`FIRE_DLC_MMU_TAG_BITS] ptb2vtb_inv;
280 wire [`FIRE_DBG_DATA_BITS] qcb2csr_dbg_a;
281 wire [`FIRE_DBG_DATA_BITS] qcb2csr_dbg_b;
282 wire qcb2csr_paq;
283 wire qcb2csr_vaq;
284 wire qcb2irb_full;
285 wire qcb2orb_enq;
286 wire [`FIRE_DLC_MMU_PAQ_DPTH-1:0] qcb2paq_ld;
287 wire [`FIRE_DLC_MMU_PAQ_DPTH-2:0] qcb2paq_ds;
288 wire [`FIRE_DLC_MMU_RDQ_DPTH-1:0] qcb2rdq_ld;
289 wire [`FIRE_DLC_MMU_RDQ_DPTH-2:0] qcb2rdq_ds;
290 wire qcb2tcb_hld;
291 wire qcb2tcb_vld;
292 wire [`FIRE_DLC_MMU_VAQ_DPTH-1:0] qcb2vaq_ld;
293 wire [`FIRE_DLC_MMU_VAQ_DPTH-2:0] qcb2vaq_ds;
294 wire [`FIRE_DLC_MMU_PTD_TAG_BITS] rcb2ptb_addr;
295 wire rcb2ptb_vld;
296 wire rcb2tcb_ack;
297 wire [`FIRE_DLC_MMU_RCB_ERR_BITS] rcb2tcb_err;
298 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] rcb2tcb_tag;
299 wire rcb2tcb_vld;
300 wire [`FIRE_DLC_MMU_TDR_DATA_BITS] rcb2tlb_dhi;
301 wire [`FIRE_DLC_MMU_TDR_DATA_BITS] rcb2tlb_dlo;
302 wire [`FIRE_DLC_MMU_RDR_BITS] rdq2orb_rcd;
303 wire tcb2crb_req;
304 wire [`FIRE_DBG_DATA_BITS] tcb2csr_dbg_a;
305 wire [`FIRE_DBG_DATA_BITS] tcb2csr_dbg_b;
306 wire [`FIRE_DLC_MMU_CSR_ERR_BITS] tcb2csr_err;
307 wire [`FIRE_DLC_MMU_TCB_PRF_BITS] tcb2csr_prf;
308 wire [`FIRE_DLC_MMU_CSR_CM_BITS] tcb2csr_tcm;
309 wire tcb2csr_tip;
310 wire tcb2csr_tpl;
311 wire tcb2pab_err;
312 wire tcb2pab_sel;
313 wire tcb2ptb_sel;
314 wire tcb2ptb_vld;
315 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] tcb2ptb_wa;
316 wire tcb2ptb_we;
317 wire tcb2qcb_hld;
318 wire [`FIRE_DLC_MMU_PLS_DPTH:1] tcb2qcb_vld;
319 wire tcb2rcb_req;
320 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] tcb2rcb_tag;
321 wire tcb2tdb_sel;
322 wire [`FIRE_DLC_MMU_TDB_PTR_BITS] tcb2tdb_wa;
323 wire tcb2tdb_we;
324 wire tcb2tlb_dld;
325 wire tcb2tlb_hld;
326 wire [`FILE_DLC_MMU_TTE_CNT_BITS] tcb2tlb_ra;
327 wire tcb2tlb_ras;
328 wire tcb2tlb_sel;
329 wire tcb2tlb_tld;
330 wire tcb2vab_hld;
331 wire tcb2vtb_hld;
332 wire tcb2vtb_sel;
333 wire tcb2vtb_tmv;
334 wire tcb2vtb_vld;
335 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] tcb2vtb_wa;
336 wire tcb2vtb_we;
337 wire [`FIRE_DLC_MMU_TDR_BITS] tdb2csr_rd;
338 wire [`FIRE_DLC_MMU_TDD_PAR_BITS] tdb2pab_par;
339 wire [`FIRE_DLC_MMU_TDD_PPN_BITS] tdb2pab_ppn;
340 wire tdb2pab_vld;
341 wire tdb2pab_wrt;
342 wire [`FIRE_DLC_MMU_VA_ADDR_BITS] tlb2csr_addr;
343 wire [`FIRE_DLC_MMU_TDB_PTR_BITS] tlb2csr_dbra;
344 wire [`FIRE_DLC_MMU_VA_RQID_BITS] tlb2csr_rqid;
345 wire [`FIRE_DLC_MMU_VA_TYPE_BITS] tlb2csr_type;
346 wire [`FIRE_DLC_MMU_PA_ADDR_BITS] tlb2pab_addr;
347 wire [`FIRE_DLC_MMU_PA_TYPE_BITS] tlb2pab_type;
348 wire tlb2pab_vld;
349 wire tlb2pab_wrt;
350 wire [`FIRE_DLC_MMU_PTD_TAG_BITS] tlb2ptb_addr;
351 wire [`FIRE_DLC_MMU_PTD_TAG_BITS] tlb2rcb_addr;
352 wire tlb2tcb_hit;
353 wire [`FIRE_DLC_MMU_TDR_MINUS_PAR_BITS] tlb2tdb_data;
354 wire [`FIRE_DLC_MMU_VTD_VPN_BITS] tlb2vtb_addr;
355 wire [`FIRE_DLC_MMU_VAB_ERR_BITS] vab2tcb_err;
356 wire [`FIRE_DLC_MMU_VAB_VLD_BITS] vab2tcb_vld;
357 wire [`FIRE_DLC_MMU_VA_ADDR_BITS] vab2tlb_addr;
358 wire [`FIRE_DLC_MMU_VA_RQID_BITS] vab2tlb_rqid;
359 wire [`FIRE_DLC_MMU_VA_TYPE_BITS] vab2tlb_type;
360 wire [`FIRE_DLC_MMU_VAR_IOTSB_BITS] vab2tlb_iotsbno;
361 wire [`FIRE_DLC_MMU_VTD_VPN_BITS] vab2vtb_addr;
362 wire [`FILE_DLC_MMU_TTE_CNT_BITS] vab2vtb_dbra;
363 wire [`FIRE_DLC_MMU_VAR_BITS] vaq2vab_rcd;
364 wire [`FIRE_DLC_MMU_TAG_BITS] vtb2crb_hit;
365 wire vtb2crb_inv;
366 wire [`FIRE_DLC_MMU_TAG_PTR_BITS] vtb2crb_tag;
367 wire [`FIRE_DLC_MMU_TAG_BITS] vtb2crb_vld;
368 wire vtb2csr_prf;
369 wire [`FIRE_DLC_MMU_VTR_BITS] vtb2csr_rd;
370 wire vtb2tcb_hit;
371 wire [`FIRE_DLC_MMU_TDB_PTR_BITS] vtb2tdb_dbra;
372 wire [`FIRE_DLC_MMU_TDB_PTR_BITS] vtb2tlb_dbra;
373//N2 wire statements
374 wire [`FIRE_DLC_MMU_VAR_IOTSB_BITS] vaq2vab_iotsbno;
375 wire [`FIRE_DLC_MMU_IOTSB_BSPA_BITS] vaq2vab_tsbbpa;
376 wire [`FIRE_DLC_MMU_VAR_IOTSB_BITS] vab2vtb_iotsbno;
377 wire [`FIRE_DLC_MMU_IOTSB_BSPA_BITS] vab2tlb_tsbbpa;
378 wire [2:0] vab2tlb_sun4v_pgsz;
379 wire [`FIRE_DLC_MMU_VAR_IOTSB_BITS] tlb2vtb_iotsbno;
380 wire [`FIRE_CSR_DATA_BITS] csr2dev_iotsb_wd;
381 wire csr2dev2iotsb_we;
382 wire csr2dev2iotsb_re;
383 wire csr2IotsbDesc_we;
384 wire csr2IotsbDesc_re;
385 wire [4:0] csr2dev_iotsb_rwa;
386 wire [`FIRE_CSR_DATA_BITS] dev_iotsb2csr_rd;
387 wire csr_busid_sel;
388 wire csr_sun4v_en;
389 wire csr_done;
390 wire vaq2tcb_deq_en;
391 wire tdb2pab_keyvld;
392 wire [`FIRE_DLC_MMU_TDD_FNM_BITS] tdb2pab_fnm;
393 wire [`FIRE_DLC_MMU_TDD_KEY_BITS] tdb2pab_key;
394
395 wire [3:0] srq2vab_np;
396 wire [27:0] srq2vab_adva;
397 wire vab2tcb_4vor;
398 wire vab2tcb_s4uf;
399 wire [`FIRE_DLC_MMU_VA_RQID_BITS] tlb2tdb_rqid;
400 wire tdb2tmc_kerr;
401 wire tlb2tmc_kerr;
402 wire srq2tmc_ipe;
403 wire srq2tmc_ivld;
404 wire [2:0] srq2vab_sun4v_pgsz;
405 wire [2:0] tlb2pab_sun4v_pgsz;
406 wire [27:0] vab2tlb_sun4v_pgnmb;
407 wire srq2vab_sun4v_byp_ps0,vab2tcb_sun4v_va_oor,srq2tmc_sun4v_pgsz_err;
408 wire vab2tlb_sun4v_byp_ps1,tlb2pab_byp_ps2;
409// ----------------------------------------------------------------------------
410// Zero In Checkers
411// ----------------------------------------------------------------------------
412
413
414// ----------------------------------------------------------------------------
415// Instantiations
416// ----------------------------------------------------------------------------
417
418 dmu_mmu_crb crb
419 (
420 .clk (clk),
421 .rst_l (rst_l),
422 .csr2crb_ds_a (csr2crb_ds_a),
423 .csr2crb_ds_b (csr2crb_ds_b),
424 .csr2crb_ra (csr2crb_ra),
425 .csr2crb_wa (csr2crb_wa),
426 .csr2crb_wd (csr2crb_wd),
427 .csr2crb_we (csr2crb_we),
428 .tcb2crb_req (tcb2crb_req),
429 .vtb2crb_hit (vtb2crb_hit),
430 .vtb2crb_inv (vtb2crb_inv),
431 .vtb2crb_tag (vtb2crb_tag),
432 .vtb2crb_vld (vtb2crb_vld),
433 .crb2csr_dbg_a (crb2csr_dbg_a),
434 .crb2csr_dbg_b (crb2csr_dbg_b),
435 .crb2csr_rd (crb2csr_rd),
436 .crb2tcb_tag (crb2tcb_tag)
437 );
438
439 dmu_mmu_csr csr
440 (
441 .clk (clk),
442 .por_l (por_l),
443 .rst_l (rst_l),
444 .j2d_instance_id (j2d_instance_id),
445 .cr2mm_csrbus_addr (cr2mm_csrbus_addr),
446 .cr2mm_csrbus_src_bus (cr2mm_csrbus_src_bus),
447 .cr2mm_csrbus_valid (cr2mm_csrbus_valid),
448 .cr2mm_csrbus_wr (cr2mm_csrbus_wr),
449 .cr2mm_csrbus_wr_data (cr2mm_csrbus_wr_data),
450 .cr2mm_dbg_sel_a (cr2mm_dbg_sel_a),
451 .cr2mm_dbg_sel_b (cr2mm_dbg_sel_b),
452 .crb2csr_dbg_a (crb2csr_dbg_a),
453 .crb2csr_dbg_b (crb2csr_dbg_b),
454 .crb2csr_rd (crb2csr_rd),
455 .ptb2csr_rd ({ptb2csr_rd1,ptb2csr_rd2,ptb2csr_rd3}),
456 .qcb2csr_dbg_a (qcb2csr_dbg_a),
457 .qcb2csr_dbg_b (qcb2csr_dbg_b),
458 .qcb2csr_paq (qcb2csr_paq),
459 .qcb2csr_vaq (qcb2csr_vaq),
460 .tcb2csr_dbg_a (tcb2csr_dbg_a),
461 .tcb2csr_dbg_b (tcb2csr_dbg_b),
462 .tcb2csr_err (tcb2csr_err),
463 .tcb2csr_prf (tcb2csr_prf),
464 .tcb2csr_tcm (tcb2csr_tcm),
465 .tcb2csr_tip (tcb2csr_tip),
466 .tcb2csr_tpl (tcb2csr_tpl),
467 .tdb2csr_rd (tdb2csr_rd),
468 .tlb2csr_addr (tlb2csr_addr),
469 .tlb2csr_dbra (tlb2csr_dbra),
470 .tlb2csr_rqid (tlb2csr_rqid),
471 .tlb2csr_type (tlb2csr_type),
472 .vtb2csr_prf (vtb2csr_prf),
473 .vtb2csr_rd (vtb2csr_rd),
474 .mm2cr_csrbus_acc_vio (mm2cr_csrbus_acc_vio),
475 .mm2cr_csrbus_done (mm2cr_csrbus_done),
476 .mm2cr_csrbus_mapped (mm2cr_csrbus_mapped),
477 .mm2cr_csrbus_read_data (mm2cr_csrbus_read_data),
478 .mm2cr_dbg_a (mm2cr_dbg_a),
479 .mm2cr_dbg_b (mm2cr_dbg_b),
480 .mm2im_int (mm2im_int),
481 .csr2crb_ds_a (csr2crb_ds_a),
482 .csr2crb_ds_b (csr2crb_ds_b),
483 .csr2crb_ra (csr2crb_ra),
484 .csr2crb_wa (csr2crb_wa),
485 .csr2crb_wd (csr2crb_wd),
486 .csr2crb_we (csr2crb_we),
487 .csr2pab_ps (csr2pab_ps),
488 .csr2ptb_inv (csr2ptb_inv),
489 .csr2ptb_ra (csr2ptb_ra),
490 .csr2ptb_wa (csr2ptb_wa),
491 .csr2ptb_wd (csr2ptb_wd),
492 .csr2ptb_we (csr2ptb_we),
493 .csr2qcb_ds_a (csr2qcb_ds_a),
494 .csr2qcb_ds_b (csr2qcb_ds_b),
495 .csr2rcb_se (csr2rcb_se),
496// .csr2rcb_tb (csr2rcb_tb),
497// .csr2rcb_ts (csr2rcb_ts),
498 .csr2tcb_av (csr2tcb_av),
499 .csr2tcb_be (csr2tcb_be),
500 .csr2tcb_cm (csr2tcb_cm),
501 .csr2tcb_ds_a (csr2tcb_ds_a),
502 .csr2tcb_ds_b (csr2tcb_ds_b),
503 .csr2tcb_pd (csr2tcb_pd),
504 .csr2tcb_te (csr2tcb_te),
505 .csr2tdb_ra (csr2tdb_ra),
506 .csr2tdb_wa (csr2tdb_wa),
507 .csr2tdb_wd (csr2tdb_wd),
508 .csr2tdb_we (csr2tdb_we),
509 .csr2tlb_ps (csr2tlb_ps),
510 .csr2tlb_tb (csr2tlb_tb),
511 .csr2tlb_ts (csr2tlb_ts),
512 .csr2vab_ps (csr2vab_ps),
513 .csr2vab_ts (csr2vab_ts),
514 .csr2vtb_ra (csr2vtb_ra),
515 .csr2vtb_wa (csr2vtb_wa),
516 .csr2vtb_wd (csr2vtb_wd),
517 .csr2vtb_we (csr2vtb_we),
518 .csr2dev_iotsb_wd (csr2dev_iotsb_wd),
519 .dev_iotsb2csr_rd (dev_iotsb2csr_rd),
520 .csr2dev2iotsb_we (csr2dev2iotsb_we),
521 .csr2dev2iotsb_re (csr2dev2iotsb_re),
522 .csr2IotsbDesc_we (csr2IotsbDesc_we),
523 .csr2IotsbDesc_re (csr2IotsbDesc_re),
524 .csr2dev_iotsb_rwa (csr2dev_iotsb_rwa),
525 .dev_iotsb_ext_done (csr_done),
526 .ctl_busid_sel_hw_read (csr_busid_sel),
527 .ctl_sun4v_en_hw_read (csr_sun4v_en)
528 );
529
530 dmu_mmu_irb irb
531 (
532 .rm2mm_rcd (rm2mm_rcd),
533 .rm2mm_rcd_enq (rm2mm_rcd_enq),
534 .qcb2irb_full (qcb2irb_full),
535 .mm2rm_rcd_full (mm2rm_rcd_full),
536 .irb2qcb_enq (irb2qcb_enq),
537 .irb2rdq_rcd (irb2rdq_rcd),
538 .irb2vaq_rcd (irb2vaq_rcd)
539 );
540
541 dmu_mmu_orb orb
542 (
543 .cm2mm_rcd_full (cm2mm_rcd_full),
544 .qcb2orb_enq (qcb2orb_enq),
545 .rdq2orb_rcd (rdq2orb_rcd),
546 .paq2orb_rcd (paq2orb_rcd),
547 .mm2cm_rcd (mm2cm_rcd),
548 .mm2cm_rcd_enq (mm2cm_rcd_enq),
549 .orb2qcb_full (orb2qcb_full)
550 );
551
552 dmu_mmu_pab pab
553 (
554 .clk (clk),
555 .rst_l (rst_l),
556 .csr2pab_ps (csr2pab_ps),
557 .tcb2pab_err (tcb2pab_err),
558 .tcb2pab_sel (tcb2pab_sel),
559 .tdb2pab_par (tdb2pab_par),
560 .tdb2pab_ppn (tdb2pab_ppn),
561 .tdb2pab_wrt (tdb2pab_wrt),
562 .tdb2pab_vld (tdb2pab_vld),
563 .tdb2pab_keyvld (tdb2pab_keyvld),
564 .tdb2pab_fnm (tdb2pab_fnm),
565 .tdb2pab_key (tdb2pab_key),
566 .tlb2pab_addr (tlb2pab_addr),
567 .tlb2pab_type (tlb2pab_type),
568 .tlb2pab_vld (tlb2pab_vld),
569 .tlb2pab_wrt (tlb2pab_wrt),
570 .pab2paq_rcd (pab2paq_rcd),
571 .pab2tcb_err (pab2tcb_err),
572 .tlb2pab_sun4v_pgsz (tlb2pab_sun4v_pgsz[2:0]),
573 .sun4v_mode (csr_sun4v_en),
574 .tlb2pab_byp_ps2 (tlb2pab_byp_ps2)
575 );
576
577 dmu_mmu_ptb ptb
578 (
579 .l2clk (l2clk),
580 .clk (clk),
581 .rst_l (rst_l),
582 .scan_in (scan_in),
583 .tcu_array_bypass (tcu_array_bypass),
584 .tcu_se_scancollar_in (tcu_se_scancollar_in),
585 .tcu_scan_en (tcu_scan_en),
586 .tcu_array_wr_inhibit (tcu_array_wr_inhibit),
587 .tcu_pce_ov (tcu_pce_ov),
588 .tcu_aclk (tcu_aclk),
589 .tcu_bclk (tcu_bclk),
590 .scan_out (scan_out),
591
592 .csr2ptb_inv (csr2ptb_inv),
593 .csr2ptb_ra (csr2ptb_ra),
594 .csr2ptb_wa (csr2ptb_wa),
595 .csr2ptb_wd (csr2ptb_wd),
596 .csr2ptb_we (csr2ptb_we),
597 .rcb2ptb_addr (rcb2ptb_addr),
598 .rcb2ptb_vld (rcb2ptb_vld),
599 .tcb2ptb_sel (tcb2ptb_sel),
600 .tcb2ptb_vld (tcb2ptb_vld),
601 .tcb2ptb_wa (tcb2ptb_wa),
602 .tcb2ptb_we (tcb2ptb_we),
603 .tlb2ptb_addr (tlb2ptb_addr),
604 .ptb2csr_rd ({ptb2csr_rd1,ptb2csr_rd2,ptb2csr_rd3}),
605 .ptb2tcb_hit (ptb2tcb_hit),
606 .ptb2vtb_inv (ptb2vtb_inv),
607 .dmu_cb0_run (dmu_cb0_run),
608 .dmu_cb0_addr (dmu_cb0_addr),
609 .dmu_cb0_wdata_key (dmu_cb0_wdata_key),
610 .dmu_cb0_mmu_ptb_wr_en (dmu_cb0_mmu_ptb_wr_en),
611 .dmu_cb0_mmu_ptb_rd_en (dmu_cb0_mmu_ptb_rd_en),
612 .dmu_cb0_mmu_ptb_lkup_en (dmu_cb0_mmu_ptb_lkup_en),
613 .mmu_ptb_hit (mmu_ptb_hit)
614
615 );
616
617 dmu_mmu_qcb qcb
618 (
619 .clk (clk),
620 .rst_l (rst_l),
621 .csr2qcb_ds_a (csr2qcb_ds_a),
622 .csr2qcb_ds_b (csr2qcb_ds_b),
623 .irb2qcb_enq (irb2qcb_enq),
624 .orb2qcb_full (orb2qcb_full),
625 .tcb2qcb_hld (tcb2qcb_hld),
626 .tcb2qcb_vld (tcb2qcb_vld),
627 .qcb2csr_dbg_a (qcb2csr_dbg_a),
628 .qcb2csr_dbg_b (qcb2csr_dbg_b),
629 .qcb2csr_paq (qcb2csr_paq),
630 .qcb2csr_vaq (qcb2csr_vaq),
631 .qcb2irb_full (qcb2irb_full),
632 .qcb2orb_enq (qcb2orb_enq),
633 .qcb2paq_ld (qcb2paq_ld),
634 .qcb2paq_ds (qcb2paq_ds),
635 .qcb2rdq_ld (qcb2rdq_ld),
636 .qcb2rdq_ds (qcb2rdq_ds),
637 .qcb2tcb_hld (qcb2tcb_hld),
638 .qcb2tcb_vld (qcb2tcb_vld),
639 .qcb2vaq_ld (qcb2vaq_ld),
640 .qcb2vaq_ds (qcb2vaq_ds)
641 );
642
643 dmu_mmu_rcb rcb
644 (
645 .clk (clk),
646 .rst_l (rst_l),
647 .j2d_mmu_addr (j2d_mmu_addr),
648 .j2d_mmu_addr_vld (j2d_mmu_addr_vld),
649 .cl2mm_tcr_ack (cl2mm_tcr_ack),
650 .cl2mm_tdr_rcd (cl2mm_tdr_rcd),
651 .cl2mm_tdr_vld (cl2mm_tdr_vld),
652 .csr2rcb_se (csr2rcb_se),
653// .csr2rcb_tb (csr2rcb_tb),
654// .csr2rcb_ts (csr2rcb_ts),
655 .tcb2rcb_tag (tcb2rcb_tag),
656 .tcb2rcb_req (tcb2rcb_req),
657 .tlb2rcb_addr (tlb2rcb_addr),
658// .d2j_tsb_enable (d2j_tsb_enable),
659// .d2j_tsb_base (d2j_tsb_base),
660// .d2j_tsb_size (d2j_tsb_size),
661 .mm2cl_tcr_rcd (mm2cl_tcr_rcd),
662 .mm2cl_tcr_req (mm2cl_tcr_req),
663 .rcb2ptb_addr (rcb2ptb_addr),
664 .rcb2ptb_vld (rcb2ptb_vld),
665 .rcb2tcb_ack (rcb2tcb_ack),
666 .rcb2tcb_err (rcb2tcb_err),
667 .rcb2tcb_tag (rcb2tcb_tag),
668 .rcb2tcb_vld (rcb2tcb_vld),
669 .rcb2tlb_dhi (rcb2tlb_dhi),
670 .rcb2tlb_dlo (rcb2tlb_dlo)
671 );
672
673 dmu_mmu_srq #(`FIRE_DLC_MMU_PAQ_DPTH, `FIRE_DLC_MMU_PAR_WDTH) paq
674 (
675 .clk (clk),
676 .rst_l (rst_l),
677 .ld (qcb2paq_ld),
678 .ds (qcb2paq_ds),
679 .di (pab2paq_rcd),
680 .do (paq2orb_rcd)
681 );
682
683 dmu_mmu_srq #(`FIRE_DLC_MMU_RDQ_DPTH, `FIRE_DLC_MMU_RDR_WDTH) rdq
684 (
685 .clk (clk),
686 .rst_l (rst_l),
687 .ld (qcb2rdq_ld),
688 .ds (qcb2rdq_ds),
689 .di (irb2rdq_rcd),
690 .do (rdq2orb_rcd)
691 );
692
693// dmu_mmu_srq #(`FIRE_DLC_MMU_VAQ_DPTH, `FIRE_DLC_MMU_VAR_WDTH) vaq
694 dmu_mmu_srq_iommu #(`FIRE_DLC_MMU_VAQ_DPTH, `FIRE_DLC_MMU_VAR_WDTH) vaq
695 (
696 .l2clk (l2clk),
697 .clk (clk),
698 .rst_l (rst_l),
699 .por_l (por_l),
700 .scan_in (scan_in),
701 .tcu_array_bypass (tcu_array_bypass),
702 .tcu_scan_en (tcu_scan_en),
703 .tcu_se_scancollar_in (tcu_se_scancollar_in),
704 .tcu_array_wr_inhibit (tcu_array_wr_inhibit),
705 .tcu_pce_ov (tcu_pce_ov),
706 .tcu_aclk (tcu_aclk),
707 .tcu_bclk (tcu_bclk),
708 .scan_out (),
709
710 .ld (qcb2vaq_ld),
711 .ds (qcb2vaq_ds),
712 .di (irb2vaq_rcd),
713 .sun4v_mode (csr_sun4v_en),
714 .srq2vab_sun4v_pgsz (srq2vab_sun4v_pgsz[2:0]),
715 .srq2vab_sun4v_byp_ps0 (srq2vab_sun4v_byp_ps0),
716 .srq2tmc_sun4v_pgsz_err (srq2tmc_sun4v_pgsz_err),
717 .do (vaq2vab_rcd),
718 .iotsbno (vaq2vab_iotsbno),
719 .iotsb_basepa (vaq2vab_tsbbpa),
720 .srq2vab_np (srq2vab_np),
721 .srq2vab_adva (srq2vab_adva),
722 .srq2tmc_ipe (srq2tmc_ipe),
723 .srq2tmc_ivld (srq2tmc_ivld),
724 .csr2dev_iotsb_wd (csr2dev_iotsb_wd),
725 .dev_iotsb2csr_rd (dev_iotsb2csr_rd),
726 .csr2dev2iotsb_we (csr2dev2iotsb_we),
727 .csr2dev2iotsb_re (csr2dev2iotsb_re),
728 .csr2IotsbDesc_we (csr2IotsbDesc_we),
729 .csr2IotsbDesc_re (csr2IotsbDesc_re),
730 .csr2dev_iotsb_rwa (csr2dev_iotsb_rwa),
731 .busid_sel (csr_busid_sel),
732 .lkup_deque_en (vaq2tcb_deq_en),
733 .csr_done (csr_done),
734 .dsn_dmc_iei (dsn_dmc_iei),
735 .dmu_mb0_run (dmu_mb0_run),
736 .dmu_mb0_addr (dmu_mb0_addr[4:0]),
737 .dmu_mb0_wdata (dmu_mb0_wdata),
738 .dmu_mb0_dev_wr_en (dmu_mb0_dev_wr_en),
739 .dmu_mb0_dev_rd_en (dmu_mb0_dev_rd_en),
740 .dmu_mb0_tsb_wr_en (dmu_mb0_tsb_wr_en),
741 .dmu_mb0_tsb_rd_en (dmu_mb0_tsb_rd_en),
742// efu wires
743 .efu_dmu_data (efu_dmu_data), // input efu to devtsb
744 .efu_dmu_xfer_en (efu_dmu_xfer_en), // input efu to devtsb
745 .efu_dmu_clr (efu_dmu_clr), // input efu to devtsb
746 .dmu_efu_data (dmu_efu_data), // output of devtsb to efu
747 .dmu_efu_xfer_en (dmu_efu_xfer_en) // output of devtsb to efu
748 );
749
750 dmu_mmu_tcb tcb
751 (
752 .clk (clk),
753 .rst_l (rst_l),
754 .crb2tcb_tag (crb2tcb_tag),
755 .csr2tcb_av (csr2tcb_av),
756 .csr2tcb_be (csr2tcb_be),
757 .csr2tcb_cm (csr2tcb_cm),
758 .csr2tcb_ds_a (csr2tcb_ds_a),
759 .csr2tcb_ds_b (csr2tcb_ds_b),
760 .csr2tcb_pd (csr2tcb_pd),
761 .csr2tcb_te (csr2tcb_te),
762 .pab2tcb_err (pab2tcb_err),
763 .ptb2tcb_hit (ptb2tcb_hit),
764 .rcb2tcb_ack (rcb2tcb_ack),
765 .rcb2tcb_err (rcb2tcb_err),
766 .rcb2tcb_tag (rcb2tcb_tag),
767 .rcb2tcb_vld (rcb2tcb_vld),
768 .tlb2tcb_hit (tlb2tcb_hit),
769 .vab2tcb_err (vab2tcb_err),
770 .vab2tcb_vld (vab2tcb_vld),
771 .vab2tcb_sun4v_va_oor (vab2tcb_sun4v_va_oor),
772 .vab2tcb_4vor (vab2tcb_4vor),
773 .vab2tcb_s4uf (vab2tcb_s4uf),
774 .qcb2tcb_hld (qcb2tcb_hld),
775 .qcb2tcb_vld (qcb2tcb_vld),
776 .vtb2tcb_hit (vtb2tcb_hit),
777 .tcb2crb_req (tcb2crb_req),
778 .tcb2csr_dbg_a (tcb2csr_dbg_a),
779 .tcb2csr_dbg_b (tcb2csr_dbg_b),
780 .tcb2csr_err (tcb2csr_err),
781 .tcb2csr_prf (tcb2csr_prf),
782 .tcb2csr_tcm (tcb2csr_tcm),
783 .tcb2csr_tip (tcb2csr_tip),
784 .tcb2csr_tpl (tcb2csr_tpl),
785 .tcb2pab_err (tcb2pab_err),
786 .tcb2pab_sel (tcb2pab_sel),
787 .tcb2ptb_sel (tcb2ptb_sel),
788 .tcb2ptb_vld (tcb2ptb_vld),
789 .tcb2ptb_wa (tcb2ptb_wa),
790 .tcb2ptb_we (tcb2ptb_we),
791 .tcb2qcb_hld (tcb2qcb_hld),
792 .tcb2qcb_vld (tcb2qcb_vld),
793 .tcb2rcb_req (tcb2rcb_req),
794 .tcb2rcb_tag (tcb2rcb_tag),
795 .tcb2tdb_sel (tcb2tdb_sel),
796 .tcb2tdb_wa (tcb2tdb_wa),
797 .tcb2tdb_we (tcb2tdb_we),
798 .tcb2tlb_dld (tcb2tlb_dld),
799 .tcb2tlb_hld (tcb2tlb_hld),
800 .tcb2tlb_ra (tcb2tlb_ra),
801 .tcb2tlb_ras (tcb2tlb_ras),
802 .tcb2tlb_sel (tcb2tlb_sel),
803 .tcb2tlb_tld (tcb2tlb_tld),
804 .tcb2vab_hld (tcb2vab_hld),
805 .tcb2vtb_hld (tcb2vtb_hld),
806 .tcb2vtb_sel (tcb2vtb_sel),
807 .tcb2vtb_tmv (tcb2vtb_tmv),
808 .tcb2vtb_vld (tcb2vtb_vld),
809 .tcb2vtb_wa (tcb2vtb_wa),
810 .vaq2tcb_deq_en (vaq2tcb_deq_en),
811 .tcb2vtb_we (tcb2vtb_we),
812 .tdb2tmc_kerr (tdb2tmc_kerr),
813 .tlb2tmc_kerr (tlb2tmc_kerr),
814 .srq2tmc_ipe (srq2tmc_ipe),
815 .srq2tmc_ivld (srq2tmc_ivld),
816 .sun4v_mode (csr_sun4v_en),
817 .srq2tmc_sun4v_pgsz_err (srq2tmc_sun4v_pgsz_err)
818 );
819
820 dmu_mmu_tdb tdb
821 (
822 .l2clk (l2clk),
823 .clk (clk),
824 .scan_in (scan_in),
825 .tcu_array_bypass (tcu_array_bypass),
826 .tcu_scan_en (tcu_scan_en),
827 .tcu_se_scancollar_in (tcu_se_scancollar_in),
828 .tcu_array_wr_inhibit (tcu_array_wr_inhibit),
829 .tcu_pce_ov (tcu_pce_ov),
830 .tcu_aclk (tcu_aclk),
831 .tcu_bclk (tcu_bclk),
832 .scan_out (),
833
834 .csr2tdb_ra (csr2tdb_ra),
835 .csr2tdb_wa (csr2tdb_wa),
836 .csr2tdb_wd (csr2tdb_wd),
837 .csr2tdb_we (csr2tdb_we),
838 .tcb2tdb_sel (tcb2tdb_sel),
839 .tcb2tdb_wa (tcb2tdb_wa),
840 .tcb2tdb_we (tcb2tdb_we),
841 .tlb2tdb_data (tlb2tdb_data),
842 .tlb2tdb_rqid (tlb2tdb_rqid),
843 .vtb2tdb_dbra (vtb2tdb_dbra),
844 .tdb2csr_rd (tdb2csr_rd),
845 .tdb2pab_par (tdb2pab_par),
846 .tdb2pab_ppn (tdb2pab_ppn),
847 .tdb2pab_vld (tdb2pab_vld),
848 .tdb2pab_keyvld (tdb2pab_keyvld),
849 .tdb2pab_fnm (tdb2pab_fnm),
850 .tdb2pab_key (tdb2pab_key),
851 .tdb2pab_wrt (tdb2pab_wrt),
852 .tdb2tmc_kerr (tdb2tmc_kerr),
853 .dsn_dmc_iei (dsn_dmc_iei),
854 .tdb_dout_8msb (tdb_dout_8msb),
855 .dmu_mb0_run (dmu_mb0_run),
856 .dmu_mb0_addr (dmu_mb0_addr),
857 .dmu_mb0_wdata (dmu_mb0_wdata),
858 .dmu_mb0_tdb_wr_en (dmu_mb0_tdb_wr_en),
859 .dmu_mb0_tdb_rd_en (dmu_mb0_tdb_rd_en)
860 );
861
862 dmu_mmu_tlb tlb
863 (
864 .clk (clk),
865 .rst_l (rst_l),
866 .csr2tlb_ps (csr2tlb_ps),
867 .csr2tlb_tb (csr2tlb_tb),
868 .csr2tlb_ts (csr2tlb_ts),
869 .rcb2tlb_dhi (rcb2tlb_dhi),
870 .rcb2tlb_dlo (rcb2tlb_dlo),
871 .tcb2tlb_dld (tcb2tlb_dld),
872 .tcb2tlb_hld (tcb2tlb_hld),
873 .tcb2tlb_ra (tcb2tlb_ra),
874 .tcb2tlb_ras (tcb2tlb_ras),
875 .tcb2tlb_sel (tcb2tlb_sel),
876 .tcb2tlb_tld (tcb2tlb_tld),
877 .vab2tlb_addr (vab2tlb_addr),
878 .vab2tlb_rqid (vab2tlb_rqid),
879 .tlb2tdb_rqid (tlb2tdb_rqid),
880 .vab2tlb_type (vab2tlb_type),
881 .vab2tlb_iotsbno (vab2tlb_iotsbno),
882 .vab2tlb_tsbbpa (vab2tlb_tsbbpa),
883 .vab2tlb_sun4v_pgnmb (vab2tlb_sun4v_pgnmb),
884 .vab2tlb_sun4v_pgsz (vab2tlb_sun4v_pgsz),
885 .vtb2tlb_dbra (vtb2tlb_dbra),
886 .tlb2csr_addr (tlb2csr_addr),
887 .tlb2csr_dbra (tlb2csr_dbra),
888 .tlb2csr_rqid (tlb2csr_rqid),
889 .tlb2csr_type (tlb2csr_type),
890 .tlb2pab_addr (tlb2pab_addr),
891 .tlb2pab_sun4v_pgsz (tlb2pab_sun4v_pgsz[2:0]),
892 .tlb2pab_type (tlb2pab_type),
893 .tlb2pab_vld (tlb2pab_vld),
894 .tlb2pab_wrt (tlb2pab_wrt),
895 .tlb2ptb_addr (tlb2ptb_addr),
896 .tlb2rcb_addr (tlb2rcb_addr),
897 .tlb2tcb_hit (tlb2tcb_hit),
898 .tlb2tdb_data (tlb2tdb_data),
899 .tlb2vtb_addr (tlb2vtb_addr),
900 .tlb2vtb_iotsbno (tlb2vtb_iotsbno),
901 .sun4v_mode (csr_sun4v_en),
902 .tlb2tmc_kerr (tlb2tmc_kerr),
903 .tlb2pab_byp_ps2 (tlb2pab_byp_ps2),
904 .vab2tlb_sun4v_byp_ps1 (vab2tlb_sun4v_byp_ps1)
905 );
906
907 dmu_mmu_vab vab
908 (
909 .clk (clk),
910 .rst_l (rst_l),
911 .csr2vab_ps (csr2vab_ps),
912 .csr2vab_ts (csr2vab_ts),
913 .tcb2vab_hld (tcb2vab_hld),
914 .vaq2vab_rcd (vaq2vab_rcd),
915 .vaq2vab_iotsbno (vaq2vab_iotsbno),
916 .vaq2vab_tsbbpa (vaq2vab_tsbbpa),
917 .srq2vab_np (srq2vab_np),
918 .srq2vab_adva (srq2vab_adva),
919 .srq2vab_sun4v_pgsz (srq2vab_sun4v_pgsz[2:0]),
920 .srq2vab_sun4v_byp_ps0 (srq2vab_sun4v_byp_ps0),
921 .vab2tcb_err (vab2tcb_err),
922 .vab2tcb_vld (vab2tcb_vld),
923 .vab2tcb_sun4v_va_oor (vab2tcb_sun4v_va_oor),
924 .vab2tcb_4vor (vab2tcb_4vor),
925 .vab2tcb_s4uf (vab2tcb_s4uf),
926 .vab2tlb_addr (vab2tlb_addr),
927 .vab2tlb_rqid (vab2tlb_rqid),
928 .vab2tlb_type (vab2tlb_type),
929 .vab2tlb_iotsbno (vab2tlb_iotsbno),
930 .vab2tlb_tsbbpa (vab2tlb_tsbbpa),
931 .vab2tlb_sun4v_pgnmb (vab2tlb_sun4v_pgnmb),
932 .vab2tlb_sun4v_pgsz (vab2tlb_sun4v_pgsz),
933 .vab2vtb_addr (vab2vtb_addr),
934 .vab2vtb_dbra (vab2vtb_dbra),
935 .vab2vtb_iotsbno (vab2vtb_iotsbno),
936 .sun4v_mode (csr_sun4v_en),
937 .vab2tlb_sun4v_byp_ps1 (vab2tlb_sun4v_byp_ps1)
938 );
939
940 dmu_mmu_vtb vtb
941 (
942 .l2clk (l2clk),
943 .clk (clk),
944 .rst_l (rst_l),
945 .scan_in (scan_in),
946 .tcu_array_bypass (tcu_array_bypass),
947 .tcu_se_scancollar_in (tcu_se_scancollar_in),
948 .tcu_scan_en (tcu_scan_en),
949 .tcu_array_wr_inhibit (tcu_array_wr_inhibit),
950 .tcu_pce_ov (tcu_pce_ov),
951 .tcu_aclk (tcu_aclk),
952 .tcu_bclk (tcu_bclk),
953 .scan_out (),
954
955 .sun4v_mode (csr_sun4v_en),
956 .csr2vtb_ra (csr2vtb_ra),
957 .csr2vtb_wa (csr2vtb_wa),
958 .csr2vtb_wd (csr2vtb_wd),
959 .csr2vtb_we (csr2vtb_we),
960 .ptb2vtb_inv (ptb2vtb_inv),
961 .tcb2vtb_hld (tcb2vtb_hld),
962 .tcb2vtb_sel (tcb2vtb_sel),
963 .tcb2vtb_tmv (tcb2vtb_tmv),
964 .tcb2vtb_vld (tcb2vtb_vld),
965 .tcb2vtb_wa (tcb2vtb_wa),
966 .tcb2vtb_we (tcb2vtb_we),
967 .tlb2vtb_addr (tlb2vtb_addr),
968 .tlb2vtb_iotsbno (tlb2vtb_iotsbno),
969 .vab2vtb_addr (vab2vtb_addr),
970 .vab2vtb_dbra (vab2vtb_dbra),
971 .vab2vtb_iotsbno (vab2vtb_iotsbno),
972 .vtb2crb_hit (vtb2crb_hit),
973 .vtb2crb_inv (vtb2crb_inv),
974 .vtb2crb_tag (vtb2crb_tag),
975 .vtb2crb_vld (vtb2crb_vld),
976 .vtb2csr_prf (vtb2csr_prf),
977 .vtb2csr_rd (vtb2csr_rd),
978 .vtb2tcb_hit (vtb2tcb_hit),
979 .vtb2tdb_dbra (vtb2tdb_dbra),
980 .vtb2tlb_dbra (vtb2tlb_dbra),
981 .dmu_cb0_run (dmu_cb0_run),
982 .dmu_cb0_addr (dmu_cb0_addr),
983 .dmu_cb0_wdata_key (dmu_cb0_wdata_key),
984 .dmu_cb0_mmu_vtb_wr_en (dmu_cb0_mmu_vtb_wr_en),
985 .dmu_cb0_mmu_vtb_rd_en (dmu_cb0_mmu_vtb_rd_en),
986 .dmu_cb0_mmu_vtb_lkup_en (dmu_cb0_mmu_vtb_lkup_en),
987 .dmu_cb0_hld (dmu_cb0_hld),
988 .mmu_vtb_hit (mmu_vtb_hit),
989 .vtb_dout_4msb (vtb_dout_4msb)
990
991
992 );
993
994endmodule // dmu_mmu
Full OpenSPARC design & verification tarball including full HDL.