Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / design / sys / iop / dmu / rtl / dmu_mmu_irb.v

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: dmu_mmu_irb.v
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module dmu_mmu_irb 
  (
   rm2mm_rcd,			// rmu srm record
   rm2mm_rcd_enq,		// rmu srm record enqueue
   qcb2irb_full,		// cmu isr queue full
   mm2rm_rcd_full,		// rmu srm queue full
   irb2qcb_enq,			// qcb enqueue
   irb2rdq_rcd,			// rdq rdr record
   irb2vaq_rcd			// vaq var record
   );
     
// ----------------------------------------------------------------------------
// Ports
// ----------------------------------------------------------------------------
  input  [`FIRE_DLC_SRM_BITS]		rm2mm_rcd;
  input 				rm2mm_rcd_enq;
  input 				qcb2irb_full;

  output				mm2rm_rcd_full;
  output				irb2qcb_enq;
  output [`FIRE_DLC_MMU_RDR_BITS]	irb2rdq_rcd;
  output [`FIRE_DLC_MMU_VAR_BITS]	irb2vaq_rcd;

// ----------------------------------------------------------------------------
// Variables
// ----------------------------------------------------------------------------
  wire					mm2rm_rcd_full;
  wire					irb2qcb_enq;
  wire [`FIRE_DLC_MMU_RDR_BITS] 	irb2rdq_rcd;
  wire [`FIRE_DLC_MMU_VAR_BITS] 	irb2vaq_rcd;

// ----------------------------------------------------------------------------
// Combinational
// ----------------------------------------------------------------------------
  assign mm2rm_rcd_full = qcb2irb_full;
  assign irb2qcb_enq    = rm2mm_rcd_enq;

  assign irb2rdq_rcd[`FIRE_DLC_MMU_RDR_STAG_BITS] = rm2mm_rcd[`FIRE_DLC_SRM_SBDTAG_BITS];
  assign irb2rdq_rcd[`FIRE_DLC_MMU_RDR_DPTR_BITS] = rm2mm_rcd[`FIRE_DLC_SRM_DPTR_BITS];
  assign irb2rdq_rcd[`FIRE_DLC_MMU_RDR_DWBE_BITS] = rm2mm_rcd[`FIRE_DLC_SRM_DWBE_BITS];
  assign irb2rdq_rcd[`FIRE_DLC_MMU_RDR_LGTH_BITS] = rm2mm_rcd[`FIRE_DLC_SRM_LEN_BITS];

  assign irb2vaq_rcd[`FIRE_DLC_MMU_VAR_ADDR_BITS] = rm2mm_rcd[`FIRE_DLC_SRM_ADDR_BITS];
  assign irb2vaq_rcd[`FIRE_DLC_MMU_VAR_RQID_BITS] = rm2mm_rcd[`FIRE_DLC_SRM_REQID_BITS];
  assign irb2vaq_rcd[`FIRE_DLC_MMU_VAR_TYPE_BITS] = rm2mm_rcd[`FIRE_DLC_SRM_TYPE_BITS];

endmodule // dmu_mmu_irb