projects / OpenSPARC-T2-DV / blame
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1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: dmu_mmu_orb.v | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | module dmu_mmu_orb | |
| 36 | ( | |
| 37 | cm2mm_rcd_full, // cmu isr queue full | |
| 38 | qcb2orb_enq, // qcb enqueue | |
| 39 | rdq2orb_rcd, // rdq rcr record | |
| 40 | paq2orb_rcd, // paq par record | |
| 41 | mm2cm_rcd, // cmu isr record | |
| 42 | mm2cm_rcd_enq, // cmu isr record enqueue | |
| 43 | orb2qcb_full // qcb queue full | |
| 44 | ); | |
| 45 | ||
| 46 | // ---------------------------------------------------------------------------- | |
| 47 | // Ports | |
| 48 | // ---------------------------------------------------------------------------- | |
| 49 | input cm2mm_rcd_full; | |
| 50 | input qcb2orb_enq; | |
| 51 | input [`FIRE_DLC_MMU_RDR_BITS] rdq2orb_rcd; | |
| 52 | input [`FIRE_DLC_MMU_PAR_BITS] paq2orb_rcd; | |
| 53 | ||
| 54 | output [`FIRE_DLC_ISR_BITS] mm2cm_rcd; | |
| 55 | output mm2cm_rcd_enq; | |
| 56 | output orb2qcb_full; | |
| 57 | ||
| 58 | // ---------------------------------------------------------------------------- | |
| 59 | // Variables | |
| 60 | // ---------------------------------------------------------------------------- | |
| 61 | wire mm2cm_rcd_enq; | |
| 62 | wire orb2qcb_full; | |
| 63 | wire [`FIRE_DLC_ISR_BITS] mm2cm_rcd; | |
| 64 | ||
| 65 | // ---------------------------------------------------------------------------- | |
| 66 | // Combinational | |
| 67 | // ---------------------------------------------------------------------------- | |
| 68 | assign mm2cm_rcd_enq = qcb2orb_enq; | |
| 69 | assign orb2qcb_full = cm2mm_rcd_full; | |
| 70 | ||
| 71 | assign mm2cm_rcd[`FIRE_DLC_ISR_SBDTAG_BITS] = rdq2orb_rcd[`FIRE_DLC_MMU_RDR_STAG_BITS]; | |
| 72 | assign mm2cm_rcd[`FIRE_DLC_ISR_DPTR_BITS] = rdq2orb_rcd[`FIRE_DLC_MMU_RDR_DPTR_BITS]; | |
| 73 | assign mm2cm_rcd[`FIRE_DLC_ISR_ADDRERR_BITS] = paq2orb_rcd[`FIRE_DLC_MMU_PAR_AERR_BITS]; | |
| 74 | assign mm2cm_rcd[`FIRE_DLC_ISR_ADDR_BITS] = paq2orb_rcd[`FIRE_DLC_MMU_PAR_ADDR_BITS]; | |
| 75 | assign mm2cm_rcd[`FIRE_DLC_ISR_DWBE_BITS] = rdq2orb_rcd[`FIRE_DLC_MMU_RDR_DWBE_BITS]; | |
| 76 | assign mm2cm_rcd[`FIRE_DLC_ISR_LEN_BITS] = rdq2orb_rcd[`FIRE_DLC_MMU_RDR_LGTH_BITS]; | |
| 77 | assign mm2cm_rcd[`FIRE_DLC_ISR_TYP_BITS] = paq2orb_rcd[`FIRE_DLC_MMU_PAR_TYPE_BITS]; | |
| 78 | ||
| 79 | endmodule // dmu_mmu_orb |