Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / efu / rtl / efu_spare_ctl_macro__num_4.v
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3// OpenSPARC T2 Processor File: efu_spare_ctl_macro__num_4.v
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35module efu_spare_ctl_macro__num_4 (
36 l1clk,
37 scan_in,
38 siclk,
39 soclk,
40 scan_out);
41wire si_0;
42wire so_0;
43wire spare0_flop_unused;
44wire spare0_buf_32x_unused;
45wire spare0_nand3_8x_unused;
46wire spare0_inv_8x_unused;
47wire spare0_aoi22_4x_unused;
48wire spare0_buf_8x_unused;
49wire spare0_oai22_4x_unused;
50wire spare0_inv_16x_unused;
51wire spare0_nand2_16x_unused;
52wire spare0_nor3_4x_unused;
53wire spare0_nand2_8x_unused;
54wire spare0_buf_16x_unused;
55wire spare0_nor2_16x_unused;
56wire spare0_inv_32x_unused;
57wire si_1;
58wire so_1;
59wire spare1_flop_unused;
60wire spare1_buf_32x_unused;
61wire spare1_nand3_8x_unused;
62wire spare1_inv_8x_unused;
63wire spare1_aoi22_4x_unused;
64wire spare1_buf_8x_unused;
65wire spare1_oai22_4x_unused;
66wire spare1_inv_16x_unused;
67wire spare1_nand2_16x_unused;
68wire spare1_nor3_4x_unused;
69wire spare1_nand2_8x_unused;
70wire spare1_buf_16x_unused;
71wire spare1_nor2_16x_unused;
72wire spare1_inv_32x_unused;
73wire si_2;
74wire so_2;
75wire spare2_flop_unused;
76wire spare2_buf_32x_unused;
77wire spare2_nand3_8x_unused;
78wire spare2_inv_8x_unused;
79wire spare2_aoi22_4x_unused;
80wire spare2_buf_8x_unused;
81wire spare2_oai22_4x_unused;
82wire spare2_inv_16x_unused;
83wire spare2_nand2_16x_unused;
84wire spare2_nor3_4x_unused;
85wire spare2_nand2_8x_unused;
86wire spare2_buf_16x_unused;
87wire spare2_nor2_16x_unused;
88wire spare2_inv_32x_unused;
89wire si_3;
90wire so_3;
91wire spare3_flop_unused;
92wire spare3_buf_32x_unused;
93wire spare3_nand3_8x_unused;
94wire spare3_inv_8x_unused;
95wire spare3_aoi22_4x_unused;
96wire spare3_buf_8x_unused;
97wire spare3_oai22_4x_unused;
98wire spare3_inv_16x_unused;
99wire spare3_nand2_16x_unused;
100wire spare3_nor3_4x_unused;
101wire spare3_nand2_8x_unused;
102wire spare3_buf_16x_unused;
103wire spare3_nor2_16x_unused;
104wire spare3_inv_32x_unused;
105
106
107input l1clk;
108input scan_in;
109input siclk;
110input soclk;
111output scan_out;
112
113cl_sc1_msff_8x spare0_flop (.l1clk(l1clk),
114 .siclk(siclk),
115 .soclk(soclk),
116 .si(si_0),
117 .so(so_0),
118 .d(1'b0),
119 .q(spare0_flop_unused));
120assign si_0 = scan_in;
121
122cl_u1_buf_32x spare0_buf_32x (.in(1'b1),
123 .out(spare0_buf_32x_unused));
124cl_u1_nand3_8x spare0_nand3_8x (.in0(1'b1),
125 .in1(1'b1),
126 .in2(1'b1),
127 .out(spare0_nand3_8x_unused));
128cl_u1_inv_8x spare0_inv_8x (.in(1'b1),
129 .out(spare0_inv_8x_unused));
130cl_u1_aoi22_4x spare0_aoi22_4x (.in00(1'b1),
131 .in01(1'b1),
132 .in10(1'b1),
133 .in11(1'b1),
134 .out(spare0_aoi22_4x_unused));
135cl_u1_buf_8x spare0_buf_8x (.in(1'b1),
136 .out(spare0_buf_8x_unused));
137cl_u1_oai22_4x spare0_oai22_4x (.in00(1'b1),
138 .in01(1'b1),
139 .in10(1'b1),
140 .in11(1'b1),
141 .out(spare0_oai22_4x_unused));
142cl_u1_inv_16x spare0_inv_16x (.in(1'b1),
143 .out(spare0_inv_16x_unused));
144cl_u1_nand2_16x spare0_nand2_16x (.in0(1'b1),
145 .in1(1'b1),
146 .out(spare0_nand2_16x_unused));
147cl_u1_nor3_4x spare0_nor3_4x (.in0(1'b0),
148 .in1(1'b0),
149 .in2(1'b0),
150 .out(spare0_nor3_4x_unused));
151cl_u1_nand2_8x spare0_nand2_8x (.in0(1'b1),
152 .in1(1'b1),
153 .out(spare0_nand2_8x_unused));
154cl_u1_buf_16x spare0_buf_16x (.in(1'b1),
155 .out(spare0_buf_16x_unused));
156cl_u1_nor2_16x spare0_nor2_16x (.in0(1'b0),
157 .in1(1'b0),
158 .out(spare0_nor2_16x_unused));
159cl_u1_inv_32x spare0_inv_32x (.in(1'b1),
160 .out(spare0_inv_32x_unused));
161
162cl_sc1_msff_8x spare1_flop (.l1clk(l1clk),
163 .siclk(siclk),
164 .soclk(soclk),
165 .si(si_1),
166 .so(so_1),
167 .d(1'b0),
168 .q(spare1_flop_unused));
169assign si_1 = so_0;
170
171cl_u1_buf_32x spare1_buf_32x (.in(1'b1),
172 .out(spare1_buf_32x_unused));
173cl_u1_nand3_8x spare1_nand3_8x (.in0(1'b1),
174 .in1(1'b1),
175 .in2(1'b1),
176 .out(spare1_nand3_8x_unused));
177cl_u1_inv_8x spare1_inv_8x (.in(1'b1),
178 .out(spare1_inv_8x_unused));
179cl_u1_aoi22_4x spare1_aoi22_4x (.in00(1'b1),
180 .in01(1'b1),
181 .in10(1'b1),
182 .in11(1'b1),
183 .out(spare1_aoi22_4x_unused));
184cl_u1_buf_8x spare1_buf_8x (.in(1'b1),
185 .out(spare1_buf_8x_unused));
186cl_u1_oai22_4x spare1_oai22_4x (.in00(1'b1),
187 .in01(1'b1),
188 .in10(1'b1),
189 .in11(1'b1),
190 .out(spare1_oai22_4x_unused));
191cl_u1_inv_16x spare1_inv_16x (.in(1'b1),
192 .out(spare1_inv_16x_unused));
193cl_u1_nand2_16x spare1_nand2_16x (.in0(1'b1),
194 .in1(1'b1),
195 .out(spare1_nand2_16x_unused));
196cl_u1_nor3_4x spare1_nor3_4x (.in0(1'b0),
197 .in1(1'b0),
198 .in2(1'b0),
199 .out(spare1_nor3_4x_unused));
200cl_u1_nand2_8x spare1_nand2_8x (.in0(1'b1),
201 .in1(1'b1),
202 .out(spare1_nand2_8x_unused));
203cl_u1_buf_16x spare1_buf_16x (.in(1'b1),
204 .out(spare1_buf_16x_unused));
205cl_u1_nor2_16x spare1_nor2_16x (.in0(1'b0),
206 .in1(1'b0),
207 .out(spare1_nor2_16x_unused));
208cl_u1_inv_32x spare1_inv_32x (.in(1'b1),
209 .out(spare1_inv_32x_unused));
210
211cl_sc1_msff_8x spare2_flop (.l1clk(l1clk),
212 .siclk(siclk),
213 .soclk(soclk),
214 .si(si_2),
215 .so(so_2),
216 .d(1'b0),
217 .q(spare2_flop_unused));
218assign si_2 = so_1;
219
220cl_u1_buf_32x spare2_buf_32x (.in(1'b1),
221 .out(spare2_buf_32x_unused));
222cl_u1_nand3_8x spare2_nand3_8x (.in0(1'b1),
223 .in1(1'b1),
224 .in2(1'b1),
225 .out(spare2_nand3_8x_unused));
226cl_u1_inv_8x spare2_inv_8x (.in(1'b1),
227 .out(spare2_inv_8x_unused));
228cl_u1_aoi22_4x spare2_aoi22_4x (.in00(1'b1),
229 .in01(1'b1),
230 .in10(1'b1),
231 .in11(1'b1),
232 .out(spare2_aoi22_4x_unused));
233cl_u1_buf_8x spare2_buf_8x (.in(1'b1),
234 .out(spare2_buf_8x_unused));
235cl_u1_oai22_4x spare2_oai22_4x (.in00(1'b1),
236 .in01(1'b1),
237 .in10(1'b1),
238 .in11(1'b1),
239 .out(spare2_oai22_4x_unused));
240cl_u1_inv_16x spare2_inv_16x (.in(1'b1),
241 .out(spare2_inv_16x_unused));
242cl_u1_nand2_16x spare2_nand2_16x (.in0(1'b1),
243 .in1(1'b1),
244 .out(spare2_nand2_16x_unused));
245cl_u1_nor3_4x spare2_nor3_4x (.in0(1'b0),
246 .in1(1'b0),
247 .in2(1'b0),
248 .out(spare2_nor3_4x_unused));
249cl_u1_nand2_8x spare2_nand2_8x (.in0(1'b1),
250 .in1(1'b1),
251 .out(spare2_nand2_8x_unused));
252cl_u1_buf_16x spare2_buf_16x (.in(1'b1),
253 .out(spare2_buf_16x_unused));
254cl_u1_nor2_16x spare2_nor2_16x (.in0(1'b0),
255 .in1(1'b0),
256 .out(spare2_nor2_16x_unused));
257cl_u1_inv_32x spare2_inv_32x (.in(1'b1),
258 .out(spare2_inv_32x_unused));
259
260cl_sc1_msff_8x spare3_flop (.l1clk(l1clk),
261 .siclk(siclk),
262 .soclk(soclk),
263 .si(si_3),
264 .so(so_3),
265 .d(1'b0),
266 .q(spare3_flop_unused));
267assign si_3 = so_2;
268
269cl_u1_buf_32x spare3_buf_32x (.in(1'b1),
270 .out(spare3_buf_32x_unused));
271cl_u1_nand3_8x spare3_nand3_8x (.in0(1'b1),
272 .in1(1'b1),
273 .in2(1'b1),
274 .out(spare3_nand3_8x_unused));
275cl_u1_inv_8x spare3_inv_8x (.in(1'b1),
276 .out(spare3_inv_8x_unused));
277cl_u1_aoi22_4x spare3_aoi22_4x (.in00(1'b1),
278 .in01(1'b1),
279 .in10(1'b1),
280 .in11(1'b1),
281 .out(spare3_aoi22_4x_unused));
282cl_u1_buf_8x spare3_buf_8x (.in(1'b1),
283 .out(spare3_buf_8x_unused));
284cl_u1_oai22_4x spare3_oai22_4x (.in00(1'b1),
285 .in01(1'b1),
286 .in10(1'b1),
287 .in11(1'b1),
288 .out(spare3_oai22_4x_unused));
289cl_u1_inv_16x spare3_inv_16x (.in(1'b1),
290 .out(spare3_inv_16x_unused));
291cl_u1_nand2_16x spare3_nand2_16x (.in0(1'b1),
292 .in1(1'b1),
293 .out(spare3_nand2_16x_unused));
294cl_u1_nor3_4x spare3_nor3_4x (.in0(1'b0),
295 .in1(1'b0),
296 .in2(1'b0),
297 .out(spare3_nor3_4x_unused));
298cl_u1_nand2_8x spare3_nand2_8x (.in0(1'b1),
299 .in1(1'b1),
300 .out(spare3_nand2_8x_unused));
301cl_u1_buf_16x spare3_buf_16x (.in(1'b1),
302 .out(spare3_buf_16x_unused));
303cl_u1_nor2_16x spare3_nor2_16x (.in0(1'b0),
304 .in1(1'b0),
305 .out(spare3_nor2_16x_unused));
306cl_u1_inv_32x spare3_inv_32x (.in(1'b1),
307 .out(spare3_inv_32x_unused));
308assign scan_out = so_3;
309
310
311
312endmodule