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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: l2t_ecc24b_dp.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module l2t_ecc24b_dp ( | |
36 | din, | |
37 | dout, | |
38 | parity); | |
39 | wire p1_10; | |
40 | wire p1_11; | |
41 | wire p1_12; | |
42 | wire p1_13; | |
43 | wire p1_14; | |
44 | wire p1_20; | |
45 | wire p2_10; | |
46 | wire p2_11; | |
47 | wire p2_12; | |
48 | wire p2_13; | |
49 | wire p2_20; | |
50 | wire p4_10; | |
51 | wire p4_11; | |
52 | wire p4_12; | |
53 | wire p4_13; | |
54 | wire p4_20; | |
55 | wire p8_10; | |
56 | wire p8_11; | |
57 | wire p8_12; | |
58 | wire p8_13; | |
59 | wire p8_20; | |
60 | wire p16_10; | |
61 | wire p16_11; | |
62 | wire p16_12; | |
63 | wire p16_13; | |
64 | wire p16_20; | |
65 | wire p30_10; | |
66 | wire p30_11; | |
67 | wire p30_12; | |
68 | wire p30_13; | |
69 | wire p30_14; | |
70 | wire p30_20; | |
71 | ||
72 | ||
73 | // Input Ports | |
74 | input [23:0] din ; | |
75 | ||
76 | // Output Ports | |
77 | output [23:0] dout ; | |
78 | output [5:0] parity ; | |
79 | ||
80 | wire [23:0] dout ; | |
81 | wire [5:0] parity ; | |
82 | ||
83 | // Local Reg and Wires | |
84 | wire p1 ; | |
85 | wire p2 ; | |
86 | wire p4 ; | |
87 | wire p8 ; | |
88 | wire p16 ; | |
89 | wire p30 ; | |
90 | ||
91 | ||
92 | //----|--|--|--|--|--|--|--|--|--|--|--|--|--|--|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| | |
93 | // |1 |2 |3 |4 |5 |6 |7 |8 |9 |10|11|12|13|14|15 |16 |17 |18 |19 |20 |21 |22 |23 |24 |25 |26 |27 |28 |29 |30 | | |
94 | // |P1|P2|D0|P4|D1|D2|D3|P8|D4|D5|D6|D7|D8|D9|D10|P16|D11|D12|D13|D14|D15|D16|D17|D18|D19|D20|D21|D22|D23|P30| | |
95 | //----|--|--|--|--|--|--|--|--|--|--|--|--|--|--|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| | |
96 | //P1 | | |* | |* | |* | |* | |* | |* | | * | | * | | * | | * | | * | | * | | * | | * | | | |
97 | //P2 | | |* | | |* |* | | |* |* | | |* | * | | | * | * | | | * | * | | | * | * | | | | | |
98 | //P4 | | | | |* |* |* | | | | |* |* |* | * | | | | | * | * | * | * | | | | | * | * | | | |
99 | //P8 | | | | | | | | |* |* |* |* |* |* | * | | | | | | | | | * | * | * | * | * | * | | | |
100 | //P16 | | | | | | | | | | | | | | | | | * | * | * | * | * | * | * | * | * | * | * | * | * | | | |
101 | //----|--|--|--|--|--|--|--|--|--|--|--|--|--|--|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| | |
102 | //p30 | | |* | |* |* | | |* |* | |* | | | * | | * | * | | * | | | * | * | | | * | | * | | | |
103 | //----|--|--|--|--|--|--|--|--|--|--|--|--|--|--|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| | |
104 | ||
105 | // | |
106 | //assign p1 = din[0] ^ din[1] ^ din[3] ^ din[4] ^ din[6] ^ din[8] ^ | |
107 | // din[10] ^ din[11] ^ din[13] ^ din[15] ^ din[17] ^ din[19] ^ | |
108 | // din[21] ^ din[23] ; | |
109 | ||
110 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_10 ( | |
111 | .dout (p1_10), | |
112 | .din0 (din[0]), | |
113 | .din1 (din[1]), | |
114 | .din2 (din[3]) | |
115 | ); | |
116 | ||
117 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_11 ( | |
118 | .dout (p1_11), | |
119 | .din0 (din[4]), | |
120 | .din1 (din[6]), | |
121 | .din2 (din[8]) | |
122 | ); | |
123 | ||
124 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_12 ( | |
125 | .dout (p1_12), | |
126 | .din0 (din[10]), | |
127 | .din1 (din[11]), | |
128 | .din2 (din[13]) | |
129 | ); | |
130 | ||
131 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_13 ( | |
132 | .dout (p1_13), | |
133 | .din0 (din[15]), | |
134 | .din1 (din[17]), | |
135 | .din2 (din[19]) | |
136 | ); | |
137 | ||
138 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_2__width_1 p1_slice_14 ( | |
139 | .dout (p1_14), | |
140 | .din0 (din[21]), | |
141 | .din1 (din[23]) | |
142 | ); | |
143 | ||
144 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_20 ( | |
145 | .dout (p1_20), | |
146 | .din0 (p1_10), | |
147 | .din1 (p1_11), | |
148 | .din2 (p1_12) | |
149 | ); | |
150 | ||
151 | l2t_ecc24b_dp_xor_macro__dxor_16x__ports_3__width_1 p1_slice ( | |
152 | .dout (p1), | |
153 | .din0 (p1_20), | |
154 | .din1 (p1_13), | |
155 | .din2 (p1_14) | |
156 | ); | |
157 | ||
158 | ||
159 | ||
160 | //assign p2 = din[0] ^ din[2] ^ din[3] ^ din[5] ^ din[6] ^ din[9] ^ | |
161 | // din[10] ^ din[12] ^ din[13] ^ din[16] ^ din[17] ^ din[20] ^ | |
162 | // din[21] ; | |
163 | ||
164 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_10 ( | |
165 | .dout (p2_10), | |
166 | .din0 (din[0]), | |
167 | .din1 (din[2]), | |
168 | .din2 (din[3]) | |
169 | ); | |
170 | ||
171 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_11 ( | |
172 | .dout (p2_11), | |
173 | .din0 (din[5]), | |
174 | .din1 (din[6]), | |
175 | .din2 (din[9]) | |
176 | ); | |
177 | ||
178 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_12 ( | |
179 | .dout (p2_12), | |
180 | .din0 (din[10]), | |
181 | .din1 (din[12]), | |
182 | .din2 (din[13]) | |
183 | ); | |
184 | ||
185 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_13 ( | |
186 | .dout (p2_13), | |
187 | .din0 (din[16]), | |
188 | .din1 (din[17]), | |
189 | .din2 (din[20]) | |
190 | ); | |
191 | ||
192 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_20 ( | |
193 | .dout (p2_20), | |
194 | .din0 (p2_10), | |
195 | .din1 (p2_11), | |
196 | .din2 (p2_12) | |
197 | ); | |
198 | ||
199 | l2t_ecc24b_dp_xor_macro__dxor_16x__ports_3__width_1 p2_slice ( | |
200 | .dout (p2), | |
201 | .din0 (p2_20), | |
202 | .din1 (p2_13), | |
203 | .din2 (din[21]) | |
204 | ); | |
205 | ||
206 | ||
207 | ||
208 | //assign p4 = din[1] ^ din[2] ^ din[3] ^ din[7] ^ din[8] ^ din[9] ^ | |
209 | // din[10] ^ din[14] ^ din[15] ^ din[16] ^ din[17] ^ din[22] ^ | |
210 | // din[23] ; | |
211 | ||
212 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_10 ( | |
213 | .dout (p4_10), | |
214 | .din0 (din[1]), | |
215 | .din1 (din[2]), | |
216 | .din2 (din[3]) | |
217 | ); | |
218 | ||
219 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_11 ( | |
220 | .dout (p4_11), | |
221 | .din0 (din[7]), | |
222 | .din1 (din[8]), | |
223 | .din2 (din[9]) | |
224 | ); | |
225 | ||
226 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_12 ( | |
227 | .dout (p4_12), | |
228 | .din0 (din[10]), | |
229 | .din1 (din[14]), | |
230 | .din2 (din[15]) | |
231 | ); | |
232 | ||
233 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_13 ( | |
234 | .dout (p4_13), | |
235 | .din0 (din[16]), | |
236 | .din1 (din[17]), | |
237 | .din2 (din[22]) | |
238 | ); | |
239 | ||
240 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_20 ( | |
241 | .dout (p4_20), | |
242 | .din0 (p4_10), | |
243 | .din1 (p4_11), | |
244 | .din2 (p4_12) | |
245 | ); | |
246 | ||
247 | l2t_ecc24b_dp_xor_macro__dxor_16x__ports_3__width_1 p4_slice ( | |
248 | .dout (p4), | |
249 | .din0 (p4_20), | |
250 | .din1 (p4_13), | |
251 | .din2 (din[23]) | |
252 | ); | |
253 | ||
254 | ||
255 | ||
256 | //assign p8 = din[4] ^ din[5] ^ din[6] ^ din[7] ^ din[8] ^ din[9] ^ | |
257 | // din[10] ^ din[18] ^ din[19] ^ din[20] ^ din[21] ^ din[22] ^ | |
258 | // din[23] ; | |
259 | ||
260 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_10 ( | |
261 | .dout (p8_10), | |
262 | .din0 (din[4]), | |
263 | .din1 (din[5]), | |
264 | .din2 (din[6]) | |
265 | ); | |
266 | ||
267 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_11 ( | |
268 | .dout (p8_11), | |
269 | .din0 (din[7]), | |
270 | .din1 (din[8]), | |
271 | .din2 (din[9]) | |
272 | ); | |
273 | ||
274 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_12 ( | |
275 | .dout (p8_12), | |
276 | .din0 (din[10]), | |
277 | .din1 (din[18]), | |
278 | .din2 (din[19]) | |
279 | ); | |
280 | ||
281 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_13 ( | |
282 | .dout (p8_13), | |
283 | .din0 (din[20]), | |
284 | .din1 (din[21]), | |
285 | .din2 (din[22]) | |
286 | ); | |
287 | ||
288 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_20 ( | |
289 | .dout (p8_20), | |
290 | .din0 (p8_10), | |
291 | .din1 (p8_11), | |
292 | .din2 (p8_12) | |
293 | ); | |
294 | ||
295 | l2t_ecc24b_dp_xor_macro__dxor_16x__ports_3__width_1 p8_slice ( | |
296 | .dout (p8), | |
297 | .din0 (p8_20), | |
298 | .din1 (p8_13), | |
299 | .din2 (din[23]) | |
300 | ); | |
301 | ||
302 | ||
303 | ||
304 | //assign p16 = din[11] ^ din[12] ^ din[13] ^ din[14] ^ din[15] ^ din[16] ^ | |
305 | // din[17] ^ din[18] ^ din[19] ^ din[20] ^ din[21] ^ din[22] ^ | |
306 | // din[23] ; | |
307 | ||
308 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_10 ( | |
309 | .dout (p16_10), | |
310 | .din0 (din[11]), | |
311 | .din1 (din[12]), | |
312 | .din2 (din[13]) | |
313 | ); | |
314 | ||
315 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_11 ( | |
316 | .dout (p16_11), | |
317 | .din0 (din[14]), | |
318 | .din1 (din[15]), | |
319 | .din2 (din[16]) | |
320 | ); | |
321 | ||
322 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_12 ( | |
323 | .dout (p16_12), | |
324 | .din0 (din[17]), | |
325 | .din1 (din[18]), | |
326 | .din2 (din[19]) | |
327 | ); | |
328 | ||
329 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_13 ( | |
330 | .dout (p16_13), | |
331 | .din0 (din[20]), | |
332 | .din1 (din[21]), | |
333 | .din2 (din[22]) | |
334 | ); | |
335 | ||
336 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_20 ( | |
337 | .dout (p16_20), | |
338 | .din0 (p16_10), | |
339 | .din1 (p16_11), | |
340 | .din2 (p16_12) | |
341 | ); | |
342 | ||
343 | l2t_ecc24b_dp_xor_macro__dxor_16x__ports_3__width_1 p16_slice ( | |
344 | .dout (p16), | |
345 | .din0 (p16_20), | |
346 | .din1 (p16_13), | |
347 | .din2 (din[23]) | |
348 | ); | |
349 | ||
350 | ||
351 | ||
352 | //assign p30 = din[0] ^ din[1] ^ din[2] ^ din[4] ^ din[5] ^ | |
353 | // din[7] ^ din[10] ^ din[11] ^ din[12] ^ din[14] ^ | |
354 | // din[17] ^ din[18] ^ din[21] ^ din[23] ; | |
355 | ||
356 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p30_slice_10 ( | |
357 | .dout (p30_10), | |
358 | .din0 (din[0]), | |
359 | .din1 (din[1]), | |
360 | .din2 (din[2]) | |
361 | ); | |
362 | ||
363 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p30_slice_11 ( | |
364 | .dout (p30_11), | |
365 | .din0 (din[4]), | |
366 | .din1 (din[5]), | |
367 | .din2 (din[7]) | |
368 | ); | |
369 | ||
370 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p30_slice_12 ( | |
371 | .dout (p30_12), | |
372 | .din0 (din[10]), | |
373 | .din1 (din[11]), | |
374 | .din2 (din[12]) | |
375 | ); | |
376 | ||
377 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p30_slice_13 ( | |
378 | .dout (p30_13), | |
379 | .din0 (din[14]), | |
380 | .din1 (din[17]), | |
381 | .din2 (din[18]) | |
382 | ); | |
383 | ||
384 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_2__width_1 p30_slice_14 ( | |
385 | .dout (p30_14), | |
386 | .din0 (din[21]), | |
387 | .din1 (din[23]) | |
388 | ); | |
389 | ||
390 | l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 p30_slice_20 ( | |
391 | .dout (p30_20), | |
392 | .din0 (p30_10), | |
393 | .din1 (p30_11), | |
394 | .din2 (p30_12) | |
395 | ); | |
396 | ||
397 | l2t_ecc24b_dp_xor_macro__dxor_16x__ports_3__width_1 p30_slice ( | |
398 | .dout (p30), | |
399 | .din0 (p30_20), | |
400 | .din1 (p30_13), | |
401 | .din2 (p30_14) | |
402 | ); | |
403 | ||
404 | ||
405 | ||
406 | assign dout = din[23:0] ; | |
407 | ||
408 | //buff_macro buff_dout (width=24,stack=24r) | |
409 | // ( | |
410 | // .dout (dout[23:0]), | |
411 | // .din (din[23:0]) | |
412 | // ); | |
413 | // | |
414 | assign parity = {p30, p16, p8, p4, p2, p1} ; | |
415 | // | |
416 | //buff_macro buff_parity (width=6,stack=6c) | |
417 | // ( | |
418 | // .dout (parity[5:0]), | |
419 | // .din ({p30, p16, p8, p4, p2, p1}) | |
420 | // ); | |
421 | // | |
422 | ||
423 | endmodule | |
424 | ||
425 | ||
426 | // | |
427 | // xor macro for ports = 2,3 | |
428 | // | |
429 | // | |
430 | ||
431 | ||
432 | ||
433 | ||
434 | ||
435 | module l2t_ecc24b_dp_xor_macro__dxor_8x__ports_3__width_1 ( | |
436 | din0, | |
437 | din1, | |
438 | din2, | |
439 | dout); | |
440 | input [0:0] din0; | |
441 | input [0:0] din1; | |
442 | input [0:0] din2; | |
443 | output [0:0] dout; | |
444 | ||
445 | ||
446 | ||
447 | ||
448 | ||
449 | xor3 #(1) d0_0 ( | |
450 | .in0(din0[0:0]), | |
451 | .in1(din1[0:0]), | |
452 | .in2(din2[0:0]), | |
453 | .out(dout[0:0]) | |
454 | ); | |
455 | ||
456 | ||
457 | ||
458 | ||
459 | ||
460 | ||
461 | ||
462 | ||
463 | endmodule | |
464 | ||
465 | ||
466 | ||
467 | ||
468 | ||
469 | // | |
470 | // xor macro for ports = 2,3 | |
471 | // | |
472 | // | |
473 | ||
474 | ||
475 | ||
476 | ||
477 | ||
478 | module l2t_ecc24b_dp_xor_macro__dxor_8x__ports_2__width_1 ( | |
479 | din0, | |
480 | din1, | |
481 | dout); | |
482 | input [0:0] din0; | |
483 | input [0:0] din1; | |
484 | output [0:0] dout; | |
485 | ||
486 | ||
487 | ||
488 | ||
489 | ||
490 | xor2 #(1) d0_0 ( | |
491 | .in0(din0[0:0]), | |
492 | .in1(din1[0:0]), | |
493 | .out(dout[0:0]) | |
494 | ); | |
495 | ||
496 | ||
497 | ||
498 | ||
499 | ||
500 | ||
501 | ||
502 | ||
503 | endmodule | |
504 | ||
505 | ||
506 | ||
507 | ||
508 | ||
509 | // | |
510 | // xor macro for ports = 2,3 | |
511 | // | |
512 | // | |
513 | ||
514 | ||
515 | ||
516 | ||
517 | ||
518 | module l2t_ecc24b_dp_xor_macro__dxor_16x__ports_3__width_1 ( | |
519 | din0, | |
520 | din1, | |
521 | din2, | |
522 | dout); | |
523 | input [0:0] din0; | |
524 | input [0:0] din1; | |
525 | input [0:0] din2; | |
526 | output [0:0] dout; | |
527 | ||
528 | ||
529 | ||
530 | ||
531 | ||
532 | xor3 #(1) d0_0 ( | |
533 | .in0(din0[0:0]), | |
534 | .in1(din1[0:0]), | |
535 | .in2(din2[0:0]), | |
536 | .out(dout[0:0]) | |
537 | ); | |
538 | ||
539 | ||
540 | ||
541 | ||
542 | ||
543 | ||
544 | ||
545 | ||
546 | endmodule | |
547 | ||
548 | ||
549 | ||
550 |