Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / mcu / mcu_rtl.flist
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: mcu_rtl.flist
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35$DV_ROOT/design/sys/iop/mcu/rtl/mcu.v
36-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_addrdp_dp.v
37-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_adrgen_ctl.v
38-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_adrq_dp.v
39-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_algnbf_dp.v
40-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_bnksm_ctl.v
41-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_bscan_ctl.v
42-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_crcn_ctl.v
43-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_crcnd_ctl.v
44-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_crcndf_ctl.v
45-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_crcs_ctl.v
46-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_crcsc_ctl.v
47-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_crcscf_ctl.v
48-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_crcsd_ctl.v
49-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_crcsdf_ctl.v
50-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_dmmdly_ctl.v
51-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_drif_ctl.v
52-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_drq_ctl.v
53-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_eccgen_dp.v
54-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_errq_ctl.v
55-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_fbd_dp.v
56-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_fbdic_ctl.v
57-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_fbdird_dp.v
58-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_fbdiwr_dp.v
59-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_fbdtm_ctl.v
60-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_fdoklu_ctl.v
61-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_fdout_ctl.v
62-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_frdbuf_dp.v
63-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_ibist_ctl.v
64-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_ibrx_ctl.v
65-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_ibtx_ctl.v
66-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_l2ecc_dp.v
67-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_l2if_ctl.v
68-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_l2rdmx_dp.v
69-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_latq_ctl.v
70-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_lndskw_dp.v
71-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_mbist_ctl.v
72-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_nibcor_dp.v
73-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_otq_ctl.v
74-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_pdmc_ctl.v
75-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_pdmchi_ctl.v
76-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_rdata_ctl.v
77-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_rdpctl_ctl.v
78-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_readdp_dp.v
79-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_reqq_ctl.v
80-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_ucb_ctl.v
81-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_ucbbuf_ctl.v
82-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_ucbin_ctl.v
83-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_ucbout_ctl.v
84-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_woq_ctl.v
85-v $DV_ROOT/design/sys/iop/mcu/rtl/mcu_wrdp_dp.v