Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / mcu / rtl / mcu_eccgen_dp.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: mcu_eccgen_dp.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35module mcu_eccgen_dp (
36 din,
37 adr_parity,
38 ecc0_in,
39 ecc1_in,
40 ecc2_in,
41 ecc3_in,
42 ecc);
43wire [127:0] d;
44wire aparity_0;
45wire aparity_1;
46wire sd0_0_0_0;
47wire sd0_0_0_1;
48wire sd0_0_0_2;
49wire sd0_0_0_3;
50wire sd0_0_0_4;
51wire sd0_0_0_5;
52wire sd0_0_0_6;
53wire sd0_0_0_7;
54wire sd0_0_0_8;
55wire sd0_0_0_9;
56wire sd0_0_0_10;
57wire sd0_0_0_11;
58wire sd0_0_0_12;
59wire sd0_0_0_13;
60wire sd0_0_0_14;
61wire sd0_0_0_15;
62wire sd0_0_0_16;
63wire sd0_0_0_17;
64wire sd0_0_0_18;
65wire sd0_0_0_19;
66wire sd0_0_0_20;
67wire sd0_0_0_21;
68wire sd0_0_1_0;
69wire sd0_0_1_1;
70wire sd0_0_1_2;
71wire sd0_0_1_3;
72wire sd0_0_1_4;
73wire sd0_0_1_5;
74wire sd0_0_1_6;
75wire sd0_0_2_0;
76wire sd0_0_2_1;
77wire sd0_0_2_2;
78wire sd0_1_0_0;
79wire sd0_1_0_1;
80wire sd0_1_0_2;
81wire sd0_1_0_3;
82wire sd0_1_0_4;
83wire sd0_1_0_5;
84wire sd0_1_0_6;
85wire sd0_1_0_7;
86wire sd0_1_0_8;
87wire sd0_1_0_9;
88wire sd0_1_0_10;
89wire sd0_1_0_11;
90wire sd0_1_0_12;
91wire sd0_1_0_13;
92wire sd0_1_0_14;
93wire sd0_1_0_15;
94wire sd0_1_0_16;
95wire sd0_1_0_17;
96wire sd0_1_0_18;
97wire sd0_1_0_19;
98wire sd0_1_0_20;
99wire sd0_1_0_21;
100wire sd0_1_1_0;
101wire sd0_1_1_1;
102wire sd0_1_1_2;
103wire sd0_1_1_3;
104wire sd0_1_1_4;
105wire sd0_1_1_5;
106wire sd0_1_1_6;
107wire sd0_1_2_0;
108wire sd0_1_2_1;
109wire sd0_1_2_2;
110wire sd0_2_0_0;
111wire sd0_2_0_1;
112wire sd0_2_0_2;
113wire sd0_2_0_3;
114wire sd0_2_0_4;
115wire sd0_2_0_5;
116wire sd0_2_0_6;
117wire sd0_2_0_7;
118wire sd0_2_0_8;
119wire sd0_2_0_9;
120wire sd0_2_0_10;
121wire sd0_2_0_11;
122wire sd0_2_0_12;
123wire sd0_2_0_13;
124wire sd0_2_0_14;
125wire sd0_2_0_15;
126wire sd0_2_0_16;
127wire sd0_2_0_17;
128wire sd0_2_0_18;
129wire sd0_2_0_19;
130wire sd0_2_0_20;
131wire sd0_2_0_21;
132wire sd0_2_1_0;
133wire sd0_2_1_1;
134wire sd0_2_1_2;
135wire sd0_2_1_3;
136wire sd0_2_1_4;
137wire sd0_2_1_5;
138wire sd0_2_1_6;
139wire sd0_2_2_0;
140wire sd0_2_2_1;
141wire sd0_2_2_2;
142wire sd0_3_0_0;
143wire sd0_3_0_1;
144wire sd0_3_0_2;
145wire sd0_3_0_3;
146wire sd0_3_0_4;
147wire sd0_3_0_5;
148wire sd0_3_0_6;
149wire sd0_3_0_7;
150wire sd0_3_0_8;
151wire sd0_3_0_9;
152wire sd0_3_0_10;
153wire sd0_3_0_11;
154wire sd0_3_0_12;
155wire sd0_3_0_13;
156wire sd0_3_0_14;
157wire sd0_3_0_15;
158wire sd0_3_0_16;
159wire sd0_3_0_17;
160wire sd0_3_0_18;
161wire sd0_3_0_19;
162wire sd0_3_0_20;
163wire sd0_3_0_21;
164wire sd0_3_1_0;
165wire sd0_3_1_1;
166wire sd0_3_1_2;
167wire sd0_3_1_3;
168wire sd0_3_1_4;
169wire sd0_3_1_5;
170wire sd0_3_1_6;
171wire sd0_3_2_0;
172wire sd0_3_2_1;
173wire sd0_3_2_2;
174wire sd1_0_0_0;
175wire sd1_0_0_1;
176wire sd1_0_0_2;
177wire sd1_0_0_3;
178wire sd1_0_0_4;
179wire sd1_0_0_5;
180wire sd1_0_1_0;
181wire sd1_0_1_1;
182wire sd1_1_0_0;
183wire sd1_1_0_1;
184wire sd1_1_0_2;
185wire sd1_1_0_3;
186wire sd1_1_0_4;
187wire sd1_1_0_5;
188wire sd1_1_1_0;
189wire sd1_1_1_1;
190wire sd1_2_0_0;
191wire sd1_2_0_1;
192wire sd1_2_0_2;
193wire sd1_2_0_3;
194wire sd1_2_0_4;
195wire sd1_2_0_5;
196wire sd1_2_1_0;
197wire sd1_2_1_1;
198wire sd1_3_0_0;
199wire sd1_3_0_1;
200wire sd1_3_0_2;
201wire sd1_3_0_3;
202wire sd1_3_0_4;
203wire sd1_3_0_5;
204wire sd1_3_1_0;
205wire sd1_3_1_1;
206wire sd2_0_0_0;
207wire sd2_0_0_1;
208wire sd2_0_0_2;
209wire sd2_0_0_3;
210wire sd2_0_0_4;
211wire sd2_0_0_5;
212wire sd2_0_1_0;
213wire sd2_0_1_1;
214wire sd2_1_0_0;
215wire sd2_1_0_1;
216wire sd2_1_0_2;
217wire sd2_1_0_3;
218wire sd2_1_0_4;
219wire sd2_1_0_5;
220wire sd2_1_1_0;
221wire sd2_1_1_1;
222wire sd2_2_0_0;
223wire sd2_2_0_1;
224wire sd2_2_0_2;
225wire sd2_2_0_3;
226wire sd2_2_0_4;
227wire sd2_2_0_5;
228wire sd2_2_1_0;
229wire sd2_2_1_1;
230wire sd2_3_0_0;
231wire sd2_3_0_1;
232wire sd2_3_0_2;
233wire sd2_3_0_3;
234wire sd2_3_0_4;
235wire sd2_3_0_5;
236wire sd2_3_1_0;
237wire sd2_3_1_1;
238wire sd3_0_0_0;
239wire sd3_0_0_1;
240wire sd3_0_0_2;
241wire sd3_0_0_3;
242wire sd3_0_0_4;
243wire sd3_0_0_5;
244wire sd3_0_0_6;
245wire sd3_0_0_7;
246wire sd3_0_0_8;
247wire sd3_0_0_9;
248wire sd3_0_0_10;
249wire sd3_0_0_11;
250wire sd3_0_0_12;
251wire sd3_0_0_13;
252wire sd3_0_0_14;
253wire sd3_0_0_15;
254wire sd3_0_0_16;
255wire sd3_0_0_17;
256wire sd3_0_0_18;
257wire sd3_0_0_19;
258wire sd3_0_0_20;
259wire sd3_0_0_21;
260wire sd3_0_1_0;
261wire sd3_0_1_1;
262wire sd3_0_1_2;
263wire sd3_0_1_3;
264wire sd3_0_1_4;
265wire sd3_0_1_5;
266wire sd3_0_1_6;
267wire sd3_0_2_0;
268wire sd3_0_2_1;
269wire sd3_0_2_2;
270wire sd3_1_0_0;
271wire sd3_1_0_1;
272wire sd3_1_0_2;
273wire sd3_1_0_3;
274wire sd3_1_0_4;
275wire sd3_1_0_5;
276wire sd3_1_0_6;
277wire sd3_1_0_7;
278wire sd3_1_0_8;
279wire sd3_1_0_9;
280wire sd3_1_0_10;
281wire sd3_1_0_11;
282wire sd3_1_0_12;
283wire sd3_1_0_13;
284wire sd3_1_0_14;
285wire sd3_1_0_15;
286wire sd3_1_0_16;
287wire sd3_1_0_17;
288wire sd3_1_0_18;
289wire sd3_1_0_19;
290wire sd3_1_0_20;
291wire sd3_1_0_21;
292wire sd3_1_1_0;
293wire sd3_1_1_1;
294wire sd3_1_1_2;
295wire sd3_1_1_3;
296wire sd3_1_1_4;
297wire sd3_1_1_5;
298wire sd3_1_1_6;
299wire sd3_1_2_0;
300wire sd3_1_2_1;
301wire sd3_1_2_2;
302wire sd3_2_0_0;
303wire sd3_2_0_1;
304wire sd3_2_0_2;
305wire sd3_2_0_3;
306wire sd3_2_0_4;
307wire sd3_2_0_5;
308wire sd3_2_0_6;
309wire sd3_2_0_7;
310wire sd3_2_0_8;
311wire sd3_2_0_9;
312wire sd3_2_0_10;
313wire sd3_2_0_11;
314wire sd3_2_0_12;
315wire sd3_2_0_13;
316wire sd3_2_0_14;
317wire sd3_2_0_15;
318wire sd3_2_0_16;
319wire sd3_2_0_17;
320wire sd3_2_0_18;
321wire sd3_2_0_19;
322wire sd3_2_0_20;
323wire sd3_2_0_21;
324wire sd3_2_1_0;
325wire sd3_2_1_1;
326wire sd3_2_1_2;
327wire sd3_2_1_3;
328wire sd3_2_1_4;
329wire sd3_2_1_5;
330wire sd3_2_1_6;
331wire sd3_2_2_0;
332wire sd3_2_2_1;
333wire sd3_2_2_2;
334wire sd3_3_0_0;
335wire sd3_3_0_1;
336wire sd3_3_0_2;
337wire sd3_3_0_3;
338wire sd3_3_0_4;
339wire sd3_3_0_5;
340wire sd3_3_0_6;
341wire sd3_3_0_7;
342wire sd3_3_0_8;
343wire sd3_3_0_9;
344wire sd3_3_0_10;
345wire sd3_3_0_11;
346wire sd3_3_0_12;
347wire sd3_3_0_13;
348wire sd3_3_0_14;
349wire sd3_3_0_15;
350wire sd3_3_0_16;
351wire sd3_3_0_17;
352wire sd3_3_0_18;
353wire sd3_3_0_19;
354wire sd3_3_0_20;
355wire sd3_3_0_21;
356wire sd3_3_1_0;
357wire sd3_3_1_1;
358wire sd3_3_1_2;
359wire sd3_3_1_3;
360wire sd3_3_1_4;
361wire sd3_3_1_5;
362wire sd3_3_1_6;
363wire sd3_3_2_0;
364wire sd3_3_2_1;
365wire sd3_3_2_2;
366
367
368// Input Declarations
369input [127:0] din;
370
371// For write datapath: wire eccX_in ports to "0",
372// wire write address parity to adr_parity port
373//
374// For read datapath: wire eccX_in ports to raw ecc from memory for error detecting
375// wire read address parity to adr_parity port
376
377input adr_parity; // address parity input
378input [3:0] ecc0_in; // ecc data input from memory
379input [3:0] ecc1_in; // ecc data input from memory
380input [3:0] ecc2_in; // ecc data input from memory
381input [3:0] ecc3_in; // ecc data input from memory
382
383// Output Declarations
384output [15:0] ecc;
385
386
387/////////////////////////////////////////////////////////////////////////
388// datain and address parity buffer
389/////////////////////////////////////////////////////////////////////////
390
391mcu_eccgen_dp_buff_macro__stack_64c__width_64 u_buf_din_127_64 (
392 .din ( din[127:64] ),
393 .dout ( d[127:64] ));
394
395mcu_eccgen_dp_buff_macro__stack_64c__width_64 u_buf_din_63_0 (
396 .din ( din[63:0] ),
397 .dout ( d[63:0] ));
398
399mcu_eccgen_dp_buff_macro__stack_2l__width_2 u_buf_adr_parity_1_0 (
400 .din ( { adr_parity, adr_parity } ),
401 .dout ( { aparity_0, aparity_1 } ));
402
403
404/////////////////////////////////////////////////////////////////////////
405// ECC generation logic for the incomming data and address parity
406/////////////////////////////////////////////////////////////////////////
407
408// wire [3:0] partialsum;
409// wire [3:0] p3_partialsum;
410
411wire [3:0] syndrome0;
412wire [3:0] syndrome1;
413wire [3:0] syndrome2;
414wire [3:0] syndrome3;
415
416// partial sum
417
418// assign partialsum[3:0] = pw1 ^ pw2 ^ pw3 ^ pw4 ^ pw5 ^ pw6 ^ pw7 ^
419// pw8 ^ pw9 ^ pw10 ^ pw11 ^ pw12 ^ pw13 ^ pw14 ^
420// pw16 ^ pw17 ^ pw18 ^ pw19 ^ pw20 ^ pw21 ^ pw22 ^
421// pw23 ^ pw24 ^ pw25 ^ pw26 ^ pw27 ^ pw28 ^ pw29 ;
422//
423//
424// assign syndrome0[3:0] = w0 ^ w15 ^ w31 ^ partialsum ^ {4 {aparity_0 }} ^ ecc0_in;
425//
426//
427// assign syndrome0[0] = d[0] ^ d[60] ^ d[124] ^ // w0[0] ^ w15[0] ^ w31[0]
428// d[7] ^ // pw1[0]
429// d[8] ^ d[11] ^ // pw2[0]
430// d[14] ^ // pw3[0]
431// d[18] ^ d[16] ^ // pw4[0]
432// d[22] ^ d[23] ^ // pw5[0]
433// d[26] ^ d[27] ^ d[24] ^ // pw6[0]
434// d[29] ^ // pw7[0]
435// d[33] ^ d[32] ^ // pw8[0]
436// d[37] ^ d[39] ^ // pw9[0]
437// d[41] ^ d[40] ^ d[43] ^ // pw10[0]
438// d[45] ^ d[46] ^ // pw11[0]
439// d[49] ^ d[50] ^ d[48] ^ // pw12[0]
440// d[53] ^ d[54] ^ d[55] ^ // pw13[0]
441// d[57] ^ d[58] ^ d[59] ^ d[56] ^ // pw14[0]
442// d[67] ^ // pw16[0]
443// d[68] ^ d[71] ^ // pw17[0]
444// d[74] ^ // pw18[0]
445// d[78] ^ d[76] ^ // pw19[0]
446// d[82] ^ d[83] ^ // pw20[0]
447// d[86] ^ d[87] ^ d[84] ^ // pw21[0]
448// d[89] ^ // pw22[0]
449// d[93] ^ d[92] ^ // pw23[0]
450// d[97] ^ d[99] ^ // pw24[0]
451// d[101] ^ d[100] ^ d[103] ^ // pw25[0]
452// d[105] ^ d[106] ^ // pw26[0]
453// d[109] ^ d[110] ^ d[108] ^ // pw27[0]
454// d[113] ^ d[114] ^ d[115] ^ // pw28[0]
455// d[117] ^ d[118] ^ d[119] ^ d[116] ^ // pw29[0]
456// aparity_0 ^ ecc0_in[0];
457
458// syndrome0_bitx_levely_grpz
459mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_0 ( .din0 ( d[0] ), .din1 ( d[7] ), .din2 ( d[8] ), .dout ( sd0_0_0_0 ));
460mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_1 ( .din0 ( d[11] ), .din1 ( d[14] ), .din2 ( d[16] ), .dout ( sd0_0_0_1 ));
461mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_2 ( .din0 ( d[18] ), .din1 ( d[22] ), .din2 ( d[23] ), .dout ( sd0_0_0_2 ));
462mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_3 ( .din0 ( d[24] ), .din1 ( d[26] ), .din2 ( d[27] ), .dout ( sd0_0_0_3 ));
463mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_4 ( .din0 ( d[29] ), .din1 ( d[32] ), .din2 ( d[33] ), .dout ( sd0_0_0_4 ));
464mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_5 ( .din0 ( d[37] ), .din1 ( d[39] ), .din2 ( d[40] ), .dout ( sd0_0_0_5 ));
465mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_6 ( .din0 ( d[41] ), .din1 ( d[43] ), .din2 ( d[45] ), .dout ( sd0_0_0_6 ));
466mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_7 ( .din0 ( d[46] ), .din1 ( d[48] ), .din2 ( d[49] ), .dout ( sd0_0_0_7 ));
467mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_8 ( .din0 ( d[50] ), .din1 ( d[53] ), .din2 ( d[54] ), .dout ( sd0_0_0_8 ));
468mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_9 ( .din0 ( d[55] ), .din1 ( d[56] ), .din2 ( d[57] ), .dout ( sd0_0_0_9 ));
469mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_10 ( .din0 ( d[58] ), .din1 ( d[59] ), .din2 ( d[60] ), .dout ( sd0_0_0_10 ));
470mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_11 ( .din0 ( d[67] ), .din1 ( d[68] ), .din2 ( d[71] ), .dout ( sd0_0_0_11 ));
471mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_12 ( .din0 ( d[74] ), .din1 ( d[78] ), .din2 ( d[76] ), .dout ( sd0_0_0_12 ));
472mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_13 ( .din0 ( d[82] ), .din1 ( d[83] ), .din2 ( d[84] ), .dout ( sd0_0_0_13 ));
473mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_14 ( .din0 ( d[86] ), .din1 ( d[87] ), .din2 ( d[89] ), .dout ( sd0_0_0_14 ));
474mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_15 ( .din0 ( d[92] ), .din1 ( d[93] ), .din2 ( d[97] ), .dout ( sd0_0_0_15 ));
475mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_16 ( .din0 ( d[99] ), .din1 ( d[100] ), .din2 ( d[101] ), .dout ( sd0_0_0_16 ));
476mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_17 ( .din0 ( d[103] ), .din1 ( d[105] ), .din2 ( d[106] ), .dout ( sd0_0_0_17 ));
477mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_18 ( .din0 ( d[108] ), .din1 ( d[109] ), .din2 ( d[110] ), .dout ( sd0_0_0_18 ));
478mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_19 ( .din0 ( d[113] ), .din1 ( d[114] ), .din2 ( d[115] ), .dout ( sd0_0_0_19 ));
479mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_20 ( .din0 ( d[116] ), .din1 ( d[117] ), .din2 ( d[118] ), .dout ( sd0_0_0_20 ));
480mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_0_21 ( .din0 ( d[119] ), .din1 ( d[124] ), .din2 ( aparity_0 ), .dout ( sd0_0_0_21 ));
481
482mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_1_0 ( .din0 ( sd0_0_0_0 ), .din1 ( sd0_0_0_1 ), .din2 ( sd0_0_0_2 ), .dout ( sd0_0_1_0 ));
483mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_1_1 ( .din0 ( sd0_0_0_3 ), .din1 ( sd0_0_0_4 ), .din2 ( sd0_0_0_5 ), .dout ( sd0_0_1_1 ));
484mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_1_2 ( .din0 ( sd0_0_0_6 ), .din1 ( sd0_0_0_7 ), .din2 ( sd0_0_0_8 ), .dout ( sd0_0_1_2 ));
485mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_1_3 ( .din0 ( sd0_0_0_9 ), .din1 ( sd0_0_0_10 ), .din2 ( sd0_0_0_11 ), .dout ( sd0_0_1_3 ));
486mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_1_4 ( .din0 ( sd0_0_0_12 ), .din1 ( sd0_0_0_13 ), .din2 ( sd0_0_0_14 ), .dout ( sd0_0_1_4 ));
487mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_1_5 ( .din0 ( sd0_0_0_15 ), .din1 ( sd0_0_0_16 ), .din2 ( sd0_0_0_17 ), .dout ( sd0_0_1_5 ));
488mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_1_6 ( .din0 ( sd0_0_0_18 ), .din1 ( sd0_0_0_19 ), .din2 ( sd0_0_0_20 ), .dout ( sd0_0_1_6 ));
489
490mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_2_0 ( .din0 ( sd0_0_1_0 ), .din1 ( sd0_0_1_1 ), .din2 ( sd0_0_1_2 ), .dout ( sd0_0_2_0 ));
491mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_2_1 ( .din0 ( sd0_0_1_3 ), .din1 ( sd0_0_1_4 ), .din2 ( sd0_0_1_5 ), .dout ( sd0_0_2_1 ));
492mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_2_2 ( .din0 ( sd0_0_0_21 ), .din1 ( sd0_0_1_6 ), .din2 ( ecc0_in[0] ), .dout ( sd0_0_2_2 ));
493
494mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_0_3_0 ( .din0 ( sd0_0_2_0 ), .din1 ( sd0_0_2_1 ), .din2 ( sd0_0_2_2 ), .dout ( syndrome0[0] ));
495
496//
497//
498// assign syndrome0[1] = d[1] ^ d[61] ^ d[125] ^ // w0[1] ^ w15[1] ^ w31[1]
499// d[4] ^ d[7] ^ // pw1[1]
500// d[8] ^ d[11] ^ d[9] ^ // pw2[1]
501// d[15] ^ d[14] ^ // pw3[1]
502// d[19] ^ d[18] ^ d[17] ^ // pw4[1]
503// d[22] ^ d[20] ^ // pw5[1]
504// d[26] ^ d[24] ^ d[25] ^ // pw6[1]
505// d[30] ^ d[29] ^ // pw7[1]
506// d[34] ^ // pw8[1]
507// d[38] ^ d[37] ^ d[36] ^ d[39] ^ // pw9[1]
508// d[42] ^ d[40] ^ d[43] ^ // pw10[1]
509// d[47] ^ d[45] ^ // pw11[1]
510// d[51] ^ // pw12[1]
511// d[53] ^ d[52] ^ // pw13[1]
512// d[56] ^ // pw14[1]
513// d[64] ^ d[67] ^ // pw16[1]
514// d[68] ^ d[71] ^ d[69] ^ // pw17[1]
515// d[75] ^ d[74] ^ // pw18[1]
516// d[79] ^ d[78] ^ d[77] ^ // pw19[1]
517// d[82] ^ d[80] ^ // pw20[1]
518// d[86] ^ d[84] ^ d[85] ^ // pw21[1]
519// d[90] ^ d[89] ^ // pw22[1]
520// d[94] ^ // pw23[1]
521// d[98] ^ d[97] ^ d[96] ^ d[99] ^ // pw24[1]
522// d[102] ^ d[100] ^ d[103] ^ // pw25[1]
523// d[107] ^ d[105] ^ // pw26[1]
524// d[111] ^ // pw27[1]
525// d[113] ^ d[112] ^ // pw28[1]
526// d[116] ^ // pw29[1]
527// aparity_0 ^ ecc0_in[1];
528//
529
530
531mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_0 ( .din0 ( d[1] ), .din1 ( d[4] ), .din2 ( d[7] ), .dout ( sd0_1_0_0 ));
532mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_1 ( .din0 ( d[8] ), .din1 ( d[9] ), .din2 ( d[11] ), .dout ( sd0_1_0_1 ));
533mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_2 ( .din0 ( d[14] ), .din1 ( d[15] ), .din2 ( d[17] ), .dout ( sd0_1_0_2 ));
534mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_3 ( .din0 ( d[18] ), .din1 ( d[19] ), .din2 ( d[20] ), .dout ( sd0_1_0_3 ));
535mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_4 ( .din0 ( d[22] ), .din1 ( d[24] ), .din2 ( d[25] ), .dout ( sd0_1_0_4 ));
536mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_5 ( .din0 ( d[26] ), .din1 ( d[29] ), .din2 ( d[30] ), .dout ( sd0_1_0_5 ));
537mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_6 ( .din0 ( d[34] ), .din1 ( d[36] ), .din2 ( d[38] ), .dout ( sd0_1_0_6 ));
538mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_7 ( .din0 ( d[37] ), .din1 ( d[39] ), .din2 ( d[40] ), .dout ( sd0_1_0_7 ));
539mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_8 ( .din0 ( d[42] ), .din1 ( d[43] ), .din2 ( d[45] ), .dout ( sd0_1_0_8 ));
540mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_9 ( .din0 ( d[47] ), .din1 ( d[51] ), .din2 ( d[52] ), .dout ( sd0_1_0_9 ));
541mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_10 ( .din0 ( d[53] ), .din1 ( d[56] ), .din2 ( d[61] ), .dout ( sd0_1_0_10 ));
542mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_11 ( .din0 ( d[64] ), .din1 ( d[67] ), .din2 ( d[68] ), .dout ( sd0_1_0_11 ));
543mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_12 ( .din0 ( d[69] ), .din1 ( d[71] ), .din2 ( d[74] ), .dout ( sd0_1_0_12 ));
544mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_13 ( .din0 ( d[75] ), .din1 ( d[77] ), .din2 ( d[78] ), .dout ( sd0_1_0_13 ));
545mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_14 ( .din0 ( d[79] ), .din1 ( d[80] ), .din2 ( d[82] ), .dout ( sd0_1_0_14 ));
546mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_15 ( .din0 ( d[84] ), .din1 ( d[85] ), .din2 ( d[86] ), .dout ( sd0_1_0_15 ));
547mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_16 ( .din0 ( d[89] ), .din1 ( d[90] ), .din2 ( d[94] ), .dout ( sd0_1_0_16 ));
548mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_17 ( .din0 ( d[96] ), .din1 ( d[97] ), .din2 ( d[98] ), .dout ( sd0_1_0_17 ));
549mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_18 ( .din0 ( d[99] ), .din1 ( d[100] ), .din2 ( d[102] ), .dout ( sd0_1_0_18 ));
550mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_19 ( .din0 ( d[103] ), .din1 ( d[105] ), .din2 ( d[107] ), .dout ( sd0_1_0_19 ));
551mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_20 ( .din0 ( d[111] ), .din1 ( d[112] ), .din2 ( d[113] ), .dout ( sd0_1_0_20 ));
552mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_0_21 ( .din0 ( d[116] ), .din1 ( d[125] ), .din2 ( aparity_0 ), .dout ( sd0_1_0_21 ));
553
554mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_1_0 ( .din0 ( sd0_1_0_0 ), .din1 ( sd0_1_0_1 ), .din2 ( sd0_1_0_2 ), .dout ( sd0_1_1_0 ));
555mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_1_1 ( .din0 ( sd0_1_0_3 ), .din1 ( sd0_1_0_4 ), .din2 ( sd0_1_0_5 ), .dout ( sd0_1_1_1 ));
556mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_1_2 ( .din0 ( sd0_1_0_6 ), .din1 ( sd0_1_0_7 ), .din2 ( sd0_1_0_8 ), .dout ( sd0_1_1_2 ));
557mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_1_3 ( .din0 ( sd0_1_0_9 ), .din1 ( sd0_1_0_10 ), .din2 ( sd0_1_0_11 ), .dout ( sd0_1_1_3 ));
558mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_1_4 ( .din0 ( sd0_1_0_12 ), .din1 ( sd0_1_0_13 ), .din2 ( sd0_1_0_14 ), .dout ( sd0_1_1_4 ));
559mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_1_5 ( .din0 ( sd0_1_0_15 ), .din1 ( sd0_1_0_16 ), .din2 ( sd0_1_0_17 ), .dout ( sd0_1_1_5 ));
560mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_1_6 ( .din0 ( sd0_1_0_18 ), .din1 ( sd0_1_0_19 ), .din2 ( sd0_1_0_20 ), .dout ( sd0_1_1_6 ));
561
562mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_2_0 ( .din0 ( sd0_1_1_0 ), .din1 ( sd0_1_1_1 ), .din2 ( sd0_1_1_2 ), .dout ( sd0_1_2_0 ));
563mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_2_1 ( .din0 ( sd0_1_1_3 ), .din1 ( sd0_1_1_4 ), .din2 ( sd0_1_1_5 ), .dout ( sd0_1_2_1 ));
564mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_2_2 ( .din0 ( sd0_1_0_21 ), .din1 ( sd0_1_1_6 ), .din2 ( ecc0_in[1] ), .dout ( sd0_1_2_2 ));
565
566mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_1_3_0 ( .din0 ( sd0_1_2_0 ), .din1 ( sd0_1_2_1 ), .din2 ( sd0_1_2_2 ), .dout ( syndrome0[1] ));
567
568
569//
570// assign syndrome0[2] = d[2] ^ d[62] ^ d[126] ^ // w0[2] ^ w15[2] ^ w31[2]
571// d[5] ^ // pw1[2]
572// d[9] ^ d[10] ^ // pw2[2]
573// d[12] ^ d[15] ^ // pw3[2]
574// d[16] ^ d[19] ^ d[18] ^ // pw4[2]
575// d[20] ^ d[23] ^ d[21] ^ // pw5[2]
576// d[24] ^ d[27] ^ d[25] ^ d[26] ^ // pw6[2]
577// d[31] ^ d[30] ^ // pw7[2]
578// d[35] ^ // pw8[2]
579// d[39] ^ d[38] ^ d[37] ^ // pw9[2]
580// d[43] ^ d[41] ^ // pw10[2]
581// d[44] ^ d[46] ^ // pw11[2]
582// d[48] ^ // pw12[2]
583// d[52] ^ d[54] ^ d[53] ^ // pw13[2]
584// d[56] ^ d[57] ^ // pw14[2]
585// d[65] ^ // pw16[2]
586// d[69] ^ d[70] ^ // pw17[2]
587// d[72] ^ d[75] ^ // pw18[2]
588// d[76] ^ d[79] ^ d[78] ^ // pw19[2]
589// d[80] ^ d[83] ^ d[81] ^ // pw20[2]
590// d[84] ^ d[87] ^ d[85] ^ d[86] ^ // pw21[2]
591// d[91] ^ d[90] ^ // pw22[2]
592// d[95] ^ // pw23[2]
593// d[99] ^ d[98] ^ d[97] ^ // pw24[2]
594// d[103] ^ d[101] ^ // pw25[2]
595// d[104] ^ d[106] ^ // pw26[2]
596// d[108] ^ // pw27[2]
597// d[112] ^ d[114] ^ d[113] ^ // pw28[2]
598// d[116] ^ d[117] ^ // pw29[2]
599// aparity_0 ^ ecc0_in[2];
600//
601//
602
603
604mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_0 ( .din0 ( d[2] ), .din1 ( d[5] ), .din2 ( d[9] ), .dout ( sd0_2_0_0 ));
605mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_1 ( .din0 ( d[10] ), .din1 ( d[12] ), .din2 ( d[15] ), .dout ( sd0_2_0_1 ));
606mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_2 ( .din0 ( d[16] ), .din1 ( d[18] ), .din2 ( d[19] ), .dout ( sd0_2_0_2 ));
607mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_3 ( .din0 ( d[20] ), .din1 ( d[21] ), .din2 ( d[23] ), .dout ( sd0_2_0_3 ));
608mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_4 ( .din0 ( d[24] ), .din1 ( d[25] ), .din2 ( d[26] ), .dout ( sd0_2_0_4 ));
609mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_5 ( .din0 ( d[27] ), .din1 ( d[30] ), .din2 ( d[31] ), .dout ( sd0_2_0_5 ));
610mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_6 ( .din0 ( d[35] ), .din1 ( d[37] ), .din2 ( d[38] ), .dout ( sd0_2_0_6 ));
611mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_7 ( .din0 ( d[39] ), .din1 ( d[41] ), .din2 ( d[43] ), .dout ( sd0_2_0_7 ));
612mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_8 ( .din0 ( d[44] ), .din1 ( d[46] ), .din2 ( d[48] ), .dout ( sd0_2_0_8 ));
613mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_9 ( .din0 ( d[52] ), .din1 ( d[53] ), .din2 ( d[54] ), .dout ( sd0_2_0_9 ));
614mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_10 ( .din0 ( d[56] ), .din1 ( d[57] ), .din2 ( d[62] ), .dout ( sd0_2_0_10 ));
615mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_11 ( .din0 ( d[65] ), .din1 ( d[69] ), .din2 ( d[70] ), .dout ( sd0_2_0_11 ));
616mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_12 ( .din0 ( d[72] ), .din1 ( d[75] ), .din2 ( d[76] ), .dout ( sd0_2_0_12 ));
617mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_13 ( .din0 ( d[78] ), .din1 ( d[79] ), .din2 ( d[80] ), .dout ( sd0_2_0_13 ));
618mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_14 ( .din0 ( d[81] ), .din1 ( d[83] ), .din2 ( d[84] ), .dout ( sd0_2_0_14 ));
619mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_15 ( .din0 ( d[85] ), .din1 ( d[86] ), .din2 ( d[87] ), .dout ( sd0_2_0_15 ));
620mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_16 ( .din0 ( d[91] ), .din1 ( d[90] ), .din2 ( d[95] ), .dout ( sd0_2_0_16 ));
621mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_17 ( .din0 ( d[97] ), .din1 ( d[98] ), .din2 ( d[99] ), .dout ( sd0_2_0_17 ));
622mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_18 ( .din0 ( d[101] ), .din1 ( d[103] ), .din2 ( d[104] ), .dout ( sd0_2_0_18 ));
623mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_19 ( .din0 ( d[106] ), .din1 ( d[108] ), .din2 ( d[112] ), .dout ( sd0_2_0_19 ));
624mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_20 ( .din0 ( d[113] ), .din1 ( d[114] ), .din2 ( d[116] ), .dout ( sd0_2_0_20 ));
625mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_0_21 ( .din0 ( d[117] ), .din1 ( d[126] ), .din2 ( aparity_0 ), .dout ( sd0_2_0_21 ));
626
627mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_1_0 ( .din0 ( sd0_2_0_0 ), .din1 ( sd0_2_0_1 ), .din2 ( sd0_2_0_2 ), .dout ( sd0_2_1_0 ));
628mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_1_1 ( .din0 ( sd0_2_0_3 ), .din1 ( sd0_2_0_4 ), .din2 ( sd0_2_0_5 ), .dout ( sd0_2_1_1 ));
629mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_1_2 ( .din0 ( sd0_2_0_6 ), .din1 ( sd0_2_0_7 ), .din2 ( sd0_2_0_8 ), .dout ( sd0_2_1_2 ));
630mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_1_3 ( .din0 ( sd0_2_0_9 ), .din1 ( sd0_2_0_10 ), .din2 ( sd0_2_0_11 ), .dout ( sd0_2_1_3 ));
631mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_1_4 ( .din0 ( sd0_2_0_12 ), .din1 ( sd0_2_0_13 ), .din2 ( sd0_2_0_14 ), .dout ( sd0_2_1_4 ));
632mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_1_5 ( .din0 ( sd0_2_0_15 ), .din1 ( sd0_2_0_16 ), .din2 ( sd0_2_0_17 ), .dout ( sd0_2_1_5 ));
633mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_1_6 ( .din0 ( sd0_2_0_18 ), .din1 ( sd0_2_0_19 ), .din2 ( sd0_2_0_20 ), .dout ( sd0_2_1_6 ));
634
635mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_2_0 ( .din0 ( sd0_2_1_0 ), .din1 ( sd0_2_1_1 ), .din2 ( sd0_2_1_2 ), .dout ( sd0_2_2_0 ));
636mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_2_1 ( .din0 ( sd0_2_1_3 ), .din1 ( sd0_2_1_4 ), .din2 ( sd0_2_1_5 ), .dout ( sd0_2_2_1 ));
637mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_2_2 ( .din0 ( sd0_2_0_21 ), .din1 ( sd0_2_1_6 ), .din2 ( ecc0_in[2] ), .dout ( sd0_2_2_2 ));
638
639mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_2_3_0 ( .din0 ( sd0_2_2_0 ), .din1 ( sd0_2_2_1 ), .din2 ( sd0_2_2_2 ), .dout ( syndrome0[2] ));
640
641
642//
643// assign syndrome0[3] = d[3] ^ d[63] ^ d[127] ^ ^ // w0[3] ^ w15[3] ^ w31[3]
644// d[6] ^ // pw1[3]
645// d[10] ^ d[11] ^ // pw2[3]
646// d[13] ^ // pw3[3]
647// d[17] ^ d[19] ^ // pw4[3]
648// d[21] ^ d[22] ^ // pw5[3]
649// d[25] ^ d[26] ^ d[27] ^ // pw6[3]
650// d[28] ^ d[31] ^ // pw7[3]
651// d[32] ^ // pw8[3]
652// d[36] ^ d[39] ^ d[38] ^ // pw9[3]
653// d[40] ^ d[42] ^ // pw10[3]
654// d[44] ^ d[47] ^ d[45] ^ // pw11[3]
655// d[48] ^ d[49] ^ // pw12[3]
656// d[52] ^ d[55] ^ d[53] ^ d[54] ^ // pw13[3]
657// d[56] ^ d[57] ^ d[58] ^ // pw14[3]
658// d[66] ^ // pw16[3]
659// d[70] ^ d[71] ^ // pw17[3]
660// d[73] ^ // pw18[3]
661// d[77] ^ d[79] ^ // pw19[3]
662// d[81] ^ d[82] ^ // pw20[3]
663// d[85] ^ d[86] ^ d[87] ^ // pw21[3]
664// d[88] ^ d[91] ^ // pw22[3]
665// d[92] ^ // pw23[3]
666// d[96] ^ d[99] ^ d[98] ^ // pw24[3]
667// d[100] ^ d[102] ^ // pw25[3]
668// d[104] ^ d[107] ^ d[105] ^ // pw26[3]
669// d[108] ^ d[109] ^ // pw27[3]
670// d[112] ^ d[115] ^ d[113] ^ d[114] ^ // pw28[3]
671// d[116] ^ d[117] ^ d[118] ^ // pw29[3]
672// aparity_0 ^ ecc0_in[3];
673//
674//
675
676mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_0 ( .din0 ( d[3] ), .din1 ( d[6] ), .din2 ( d[10] ), .dout ( sd0_3_0_0 ));
677mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_1 ( .din0 ( d[11] ), .din1 ( d[13] ), .din2 ( d[17] ), .dout ( sd0_3_0_1 ));
678mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_2 ( .din0 ( d[19] ), .din1 ( d[21] ), .din2 ( d[22] ), .dout ( sd0_3_0_2 ));
679mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_3 ( .din0 ( d[25] ), .din1 ( d[26] ), .din2 ( d[27] ), .dout ( sd0_3_0_3 ));
680mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_4 ( .din0 ( d[28] ), .din1 ( d[31] ), .din2 ( d[32] ), .dout ( sd0_3_0_4 ));
681mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_5 ( .din0 ( d[36] ), .din1 ( d[38] ), .din2 ( d[39] ), .dout ( sd0_3_0_5 ));
682mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_6 ( .din0 ( d[40] ), .din1 ( d[42] ), .din2 ( d[44] ), .dout ( sd0_3_0_6 ));
683mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_7 ( .din0 ( d[45] ), .din1 ( d[47] ), .din2 ( d[48] ), .dout ( sd0_3_0_7 ));
684mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_8 ( .din0 ( d[49] ), .din1 ( d[52] ), .din2 ( d[53] ), .dout ( sd0_3_0_8 ));
685mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_9 ( .din0 ( d[54] ), .din1 ( d[55] ), .din2 ( d[56] ), .dout ( sd0_3_0_9 ));
686mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_10 ( .din0 ( d[57] ), .din1 ( d[58] ), .din2 ( d[63] ), .dout ( sd0_3_0_10 ));
687mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_11 ( .din0 ( d[66] ), .din1 ( d[70] ), .din2 ( d[71] ), .dout ( sd0_3_0_11 ));
688mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_12 ( .din0 ( d[73] ), .din1 ( d[77] ), .din2 ( d[79] ), .dout ( sd0_3_0_12 ));
689mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_13 ( .din0 ( d[81] ), .din1 ( d[82] ), .din2 ( d[85] ), .dout ( sd0_3_0_13 ));
690mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_14 ( .din0 ( d[86] ), .din1 ( d[87] ), .din2 ( d[88] ), .dout ( sd0_3_0_14 ));
691mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_15 ( .din0 ( d[91] ), .din1 ( d[92] ), .din2 ( d[96] ), .dout ( sd0_3_0_15 ));
692mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_16 ( .din0 ( d[99] ), .din1 ( d[98] ), .din2 ( d[100] ), .dout ( sd0_3_0_16 ));
693mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_17 ( .din0 ( d[102] ), .din1 ( d[104] ), .din2 ( d[105] ), .dout ( sd0_3_0_17 ));
694mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_18 ( .din0 ( d[107] ), .din1 ( d[108] ), .din2 ( d[109] ), .dout ( sd0_3_0_18 ));
695mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_19 ( .din0 ( d[112] ), .din1 ( d[113] ), .din2 ( d[114] ), .dout ( sd0_3_0_19 ));
696mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_20 ( .din0 ( d[115] ), .din1 ( d[116] ), .din2 ( d[117] ), .dout ( sd0_3_0_20 ));
697mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_0_21 ( .din0 ( d[118] ), .din1 ( d[127] ), .din2 ( aparity_0 ), .dout ( sd0_3_0_21 ));
698
699mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_1_0 ( .din0 ( sd0_3_0_0 ), .din1 ( sd0_3_0_1 ), .din2 ( sd0_3_0_2 ), .dout ( sd0_3_1_0 ));
700mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_1_1 ( .din0 ( sd0_3_0_3 ), .din1 ( sd0_3_0_4 ), .din2 ( sd0_3_0_5 ), .dout ( sd0_3_1_1 ));
701mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_1_2 ( .din0 ( sd0_3_0_6 ), .din1 ( sd0_3_0_7 ), .din2 ( sd0_3_0_8 ), .dout ( sd0_3_1_2 ));
702mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_1_3 ( .din0 ( sd0_3_0_9 ), .din1 ( sd0_3_0_10 ), .din2 ( sd0_3_0_11 ), .dout ( sd0_3_1_3 ));
703mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_1_4 ( .din0 ( sd0_3_0_12 ), .din1 ( sd0_3_0_13 ), .din2 ( sd0_3_0_14 ), .dout ( sd0_3_1_4 ));
704mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_1_5 ( .din0 ( sd0_3_0_15 ), .din1 ( sd0_3_0_16 ), .din2 ( sd0_3_0_17 ), .dout ( sd0_3_1_5 ));
705mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_1_6 ( .din0 ( sd0_3_0_18 ), .din1 ( sd0_3_0_19 ), .din2 ( sd0_3_0_20 ), .dout ( sd0_3_1_6 ));
706
707mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_2_0 ( .din0 ( sd0_3_1_0 ), .din1 ( sd0_3_1_1 ), .din2 ( sd0_3_1_2 ), .dout ( sd0_3_2_0 ));
708mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_2_1 ( .din0 ( sd0_3_1_3 ), .din1 ( sd0_3_1_4 ), .din2 ( sd0_3_1_5 ), .dout ( sd0_3_2_1 ));
709mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_2_2 ( .din0 ( sd0_3_0_21 ), .din1 ( sd0_3_1_6 ), .din2 ( ecc0_in[3] ), .dout ( sd0_3_2_2 ));
710
711mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd0_3_3_0 ( .din0 ( sd0_3_2_0 ), .din1 ( sd0_3_2_1 ), .din2 ( sd0_3_2_2 ), .dout ( syndrome0[3] ));
712
713
714
715
716
717// assign syndrome1[3:0] = w0 ^ w1 ^ w2 ^ w3 ^ w4 ^ w5 ^ w6 ^ w7 ^
718// w8 ^ w9 ^ w10 ^ w11 ^ w12 ^ w13 ^ w14 ^ w30 ^ w31 ^ {4{aparity}} ^ ecc1_in;
719//
720// assign syndrome1[0] = d[0] ^ // w0
721// d[4] ^ // w1
722// d[8] ^ // w2
723// d[12] ^ // w3
724// d[16] ^ // w4
725// d[20] ^ // w5
726// d[24] ^ // w6
727// d[28] ^ // w7
728// d[32] ^ // w8
729// d[36] ^ // w9
730// d[40] ^ // w10
731// d[44] ^ // w11
732// d[48] ^ // w12
733// d[52] ^ // w13
734// d[56] ^ // w14
735// d[120] ^ // w30
736// d[124] ^ // w31
737// aparity_0 ^
738// ecc1_in[0];
739//
740
741
742mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_0_0_0 ( .din0 ( d[0] ), .din1 ( d[4] ), .din2 ( d[8] ), .dout ( sd1_0_0_0 ));
743mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_0_0_1 ( .din0 ( d[12] ), .din1 ( d[16] ), .din2 ( d[20] ), .dout ( sd1_0_0_1 ));
744mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_0_0_2 ( .din0 ( d[24] ), .din1 ( d[28] ), .din2 ( d[32] ), .dout ( sd1_0_0_2 ));
745mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_0_0_3 ( .din0 ( d[36] ), .din1 ( d[40] ), .din2 ( d[44] ), .dout ( sd1_0_0_3 ));
746mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_0_0_4 ( .din0 ( d[48] ), .din1 ( d[52] ), .din2 ( d[56] ), .dout ( sd1_0_0_4 ));
747mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_0_0_5 ( .din0 ( d[120] ), .din1 ( d[124] ), .din2 ( aparity_0 ), .dout ( sd1_0_0_5 ));
748
749mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_0_1_0 ( .din0 ( sd1_0_0_0 ), .din1 ( sd1_0_0_1 ), .din2 ( sd1_0_0_2 ), .dout ( sd1_0_1_0 ));
750mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_0_1_1 ( .din0 ( sd1_0_0_3 ), .din1 ( sd1_0_0_4 ), .din2 ( sd1_0_0_5 ), .dout ( sd1_0_1_1 ));
751
752mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_0_2_0 ( .din0 ( sd1_0_1_0 ), .din1 ( sd1_0_1_1 ), .din2 ( ecc1_in[0] ), .dout ( syndrome1[0] ));
753
754
755//
756// assign syndrome1[1] = d[1] ^ // w0
757// d[5] ^ // w1
758// d[9] ^ // w2
759// d[13] ^ // w3
760// d[17] ^ // w4
761// d[21] ^ // w5
762// d[25] ^ // w6
763// d[29] ^ // w7
764// d[33] ^ // w8
765// d[37] ^ // w9
766// d[41] ^ // w10
767// d[45] ^ // w11
768// d[49] ^ // w12
769// d[53] ^ // w13
770// d[57] ^ // w14
771// d[121] ^ // w30
772// d[125] ^ // w31
773// aparity_0 ^
774// ecc1_in[1];
775//
776
777
778mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_1_0_0 ( .din0 ( d[1] ), .din1 ( d[5] ), .din2 ( d[9] ), .dout ( sd1_1_0_0 ));
779mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_1_0_1 ( .din0 ( d[13] ), .din1 ( d[17] ), .din2 ( d[21] ), .dout ( sd1_1_0_1 ));
780mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_1_0_2 ( .din0 ( d[25] ), .din1 ( d[29] ), .din2 ( d[33] ), .dout ( sd1_1_0_2 ));
781mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_1_0_3 ( .din0 ( d[37] ), .din1 ( d[41] ), .din2 ( d[45] ), .dout ( sd1_1_0_3 ));
782mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_1_0_4 ( .din0 ( d[49] ), .din1 ( d[53] ), .din2 ( d[57] ), .dout ( sd1_1_0_4 ));
783mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_1_0_5 ( .din0 ( d[121] ), .din1 ( d[125] ), .din2 ( aparity_0 ), .dout ( sd1_1_0_5 ));
784
785mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_1_1_0 ( .din0 ( sd1_1_0_0 ), .din1 ( sd1_1_0_1 ), .din2 ( sd1_1_0_2 ), .dout ( sd1_1_1_0 ));
786mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_1_1_1 ( .din0 ( sd1_1_0_3 ), .din1 ( sd1_1_0_4 ), .din2 ( sd1_1_0_5 ), .dout ( sd1_1_1_1 ));
787
788mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_1_2_0 ( .din0 ( sd1_1_1_0 ), .din1 ( sd1_1_1_1 ), .din2 ( ecc1_in[1] ), .dout ( syndrome1[1] ));
789
790
791//
792//
793// assign syndrome1[2] = d[2] ^ // w0
794// d[6] ^ // w1
795// d[10] ^ // w2
796// d[14] ^ // w3
797// d[18] ^ // w4
798// d[22] ^ // w5
799// d[26] ^ // w6
800// d[30] ^ // w7
801// d[34] ^ // w8
802// d[38] ^ // w9
803// d[42] ^ // w10
804// d[46] ^ // w11
805// d[50] ^ // w12
806// d[54] ^ // w13
807// d[58] ^ // w14
808// d[122] ^ // w30
809// d[126] ^ // w31
810// aparity_0 ^
811// ecc1_in[2];
812//
813
814
815mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_2_0_0 ( .din0 ( d[2] ), .din1 ( d[6] ), .din2 ( d[10] ), .dout ( sd1_2_0_0 ));
816mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_2_0_1 ( .din0 ( d[14] ), .din1 ( d[18] ), .din2 ( d[22] ), .dout ( sd1_2_0_1 ));
817mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_2_0_2 ( .din0 ( d[26] ), .din1 ( d[30] ), .din2 ( d[34] ), .dout ( sd1_2_0_2 ));
818mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_2_0_3 ( .din0 ( d[38] ), .din1 ( d[42] ), .din2 ( d[46] ), .dout ( sd1_2_0_3 ));
819mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_2_0_4 ( .din0 ( d[50] ), .din1 ( d[54] ), .din2 ( d[58] ), .dout ( sd1_2_0_4 ));
820mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_2_0_5 ( .din0 ( d[122] ), .din1 ( d[126] ), .din2 ( aparity_0 ), .dout ( sd1_2_0_5 ));
821
822mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_2_1_0 ( .din0 ( sd1_2_0_0 ), .din1 ( sd1_2_0_1 ), .din2 ( sd1_2_0_2 ), .dout ( sd1_2_1_0 ));
823mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_2_1_1 ( .din0 ( sd1_2_0_3 ), .din1 ( sd1_2_0_4 ), .din2 ( sd1_2_0_5 ), .dout ( sd1_2_1_1 ));
824
825mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_2_2_0 ( .din0 ( sd1_2_1_0 ), .din1 ( sd1_2_1_1 ), .din2 ( ecc1_in[2] ), .dout ( syndrome1[2] ));
826
827
828//
829//
830// assign syndrome1[3] = d[3] ^ // w0
831// d[7] ^ // w1
832// d[11] ^ // w2
833// d[15] ^ // w3
834// d[19] ^ // w4
835// d[23] ^ // w5
836// d[27] ^ // w6
837// d[31] ^ // w7
838// d[35] ^ // w8
839// d[39] ^ // w9
840// d[43] ^ // w10
841// d[47] ^ // w11
842// d[51] ^ // w12
843// d[55] ^ // w13
844// d[59] ^ // w14
845// d[123] ^ // w30
846// d[127] ^ // w31
847// aparity_0 ^
848// ecc1_in[3];
849//
850
851
852mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_3_0_0 ( .din0 ( d[3] ), .din1 ( d[7] ), .din2 ( d[11] ), .dout ( sd1_3_0_0 ));
853mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_3_0_1 ( .din0 ( d[15] ), .din1 ( d[19] ), .din2 ( d[23] ), .dout ( sd1_3_0_1 ));
854mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_3_0_2 ( .din0 ( d[27] ), .din1 ( d[31] ), .din2 ( d[35] ), .dout ( sd1_3_0_2 ));
855mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_3_0_3 ( .din0 ( d[39] ), .din1 ( d[43] ), .din2 ( d[47] ), .dout ( sd1_3_0_3 ));
856mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_3_0_4 ( .din0 ( d[51] ), .din1 ( d[55] ), .din2 ( d[59] ), .dout ( sd1_3_0_4 ));
857mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_3_0_5 ( .din0 ( d[123] ), .din1 ( d[127] ), .din2 ( aparity_0 ), .dout ( sd1_3_0_5 ));
858
859mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_3_1_0 ( .din0 ( sd1_3_0_0 ), .din1 ( sd1_3_0_1 ), .din2 ( sd1_3_0_2 ), .dout ( sd1_3_1_0 ));
860mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_3_1_1 ( .din0 ( sd1_3_0_3 ), .din1 ( sd1_3_0_4 ), .din2 ( sd1_3_0_5 ), .dout ( sd1_3_1_1 ));
861
862mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd1_3_2_0 ( .din0 ( sd1_3_1_0 ), .din1 ( sd1_3_1_1 ), .din2 ( ecc1_in[3] ), .dout ( syndrome1[3] ));
863
864
865
866
867// assign syndrome2[3:0] = w15 ^ w16 ^ w17 ^ w18 ^ w19 ^ w20 ^ w21 ^ w22 ^ w23 ^
868// w24 ^ w25 ^ w26 ^ w27 ^ w28 ^ w29 ^ w30 ^ w31 ^ {4{aparity}} ^ ecc2_in;
869
870// assign syndrome2[0] = d[60] ^ // w15
871// d[64] ^ // w16
872// d[68] ^ // w17
873// d[72] ^ // w18
874// d[76] ^ // w19
875// d[80] ^ // w20
876// d[84] ^ // w21
877// d[88] ^ // w22
878// d[92] ^ // w23
879// d[96] ^ // w24
880// d[100] ^ // w25
881// d[104] ^ // w26
882// d[108] ^ // w27
883// d[112] ^ // w28
884// d[116] ^ // w29
885// d[120] ^ // w30
886// d[124] ^ // w31
887// aparity_1 ^
888// ecc2_in[0];
889//
890//
891
892mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_0_0_0 ( .din0 ( d[60] ), .din1 ( d[64] ), .din2 ( d[68] ), .dout ( sd2_0_0_0 ));
893mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_0_0_1 ( .din0 ( d[72] ), .din1 ( d[76] ), .din2 ( d[80] ), .dout ( sd2_0_0_1 ));
894mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_0_0_2 ( .din0 ( d[84] ), .din1 ( d[88] ), .din2 ( d[92] ), .dout ( sd2_0_0_2 ));
895mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_0_0_3 ( .din0 ( d[96] ), .din1 ( d[100] ), .din2 ( d[104] ), .dout ( sd2_0_0_3 ));
896mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_0_0_4 ( .din0 ( d[108] ), .din1 ( d[112] ), .din2 ( d[116] ), .dout ( sd2_0_0_4 ));
897mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_0_0_5 ( .din0 ( d[120] ), .din1 ( d[124] ), .din2 ( aparity_1 ), .dout ( sd2_0_0_5 ));
898
899mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_0_1_0 ( .din0 ( sd2_0_0_0 ), .din1 ( sd2_0_0_1 ), .din2 ( sd2_0_0_2 ), .dout ( sd2_0_1_0 ));
900mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_0_1_1 ( .din0 ( sd2_0_0_3 ), .din1 ( sd2_0_0_4 ), .din2 ( sd2_0_0_5 ), .dout ( sd2_0_1_1 ));
901
902mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_0_2_0 ( .din0 ( sd2_0_1_0 ), .din1 ( sd2_0_1_1 ), .din2 ( ecc2_in[0] ), .dout ( syndrome2[0] ));
903
904
905//
906//
907// assign syndrome2[1] = d[61] ^ // w15
908// d[65] ^ // w16
909// d[69] ^ // w17
910// d[73] ^ // w18
911// d[77] ^ // w19
912// d[81] ^ // w20
913// d[85] ^ // w21
914// d[89] ^ // w22
915// d[93] ^ // w23
916// d[97] ^ // w24
917// d[101] ^ // w25
918// d[105] ^ // w26
919// d[109] ^ // w27
920// d[113] ^ // w28
921// d[117] ^ // w29
922// d[121] ^ // w30
923// d[125] ^ // w31
924// aparity_1 ^
925// ecc2_in[1];
926//
927//
928
929mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_1_0_0 ( .din0 ( d[61] ), .din1 ( d[65] ), .din2 ( d[69] ), .dout ( sd2_1_0_0 ));
930mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_1_0_1 ( .din0 ( d[73] ), .din1 ( d[77] ), .din2 ( d[81] ), .dout ( sd2_1_0_1 ));
931mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_1_0_2 ( .din0 ( d[85] ), .din1 ( d[89] ), .din2 ( d[93] ), .dout ( sd2_1_0_2 ));
932mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_1_0_3 ( .din0 ( d[97] ), .din1 ( d[101] ), .din2 ( d[105] ), .dout ( sd2_1_0_3 ));
933mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_1_0_4 ( .din0 ( d[109] ), .din1 ( d[113] ), .din2 ( d[117] ), .dout ( sd2_1_0_4 ));
934mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_1_0_5 ( .din0 ( d[121] ), .din1 ( d[125] ), .din2 ( aparity_1 ), .dout ( sd2_1_0_5 ));
935
936mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_1_1_0 ( .din0 ( sd2_1_0_0 ), .din1 ( sd2_1_0_1 ), .din2 ( sd2_1_0_2 ), .dout ( sd2_1_1_0 ));
937mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_1_1_1 ( .din0 ( sd2_1_0_3 ), .din1 ( sd2_1_0_4 ), .din2 ( sd2_1_0_5 ), .dout ( sd2_1_1_1 ));
938
939mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_1_2_0 ( .din0 ( sd2_1_1_0 ), .din1 ( sd2_1_1_1 ), .din2 ( ecc2_in[1] ), .dout ( syndrome2[1] ));
940
941//
942//
943// assign syndrome2[2] = d[62] ^ // w15
944// d[66] ^ // w16
945// d[70] ^ // w17
946// d[74] ^ // w18
947// d[78] ^ // w19
948// d[82] ^ // w20
949// d[86] ^ // w21
950// d[90] ^ // w22
951// d[94] ^ // w23
952// d[98] ^ // w24
953// d[102] ^ // w25
954// d[106] ^ // w26
955// d[110] ^ // w27
956// d[114] ^ // w28
957// d[118] ^ // w29
958// d[122] ^ // w30
959// d[126] ^ // w31
960// aparity_1 ^
961// ecc2_in[2];
962//
963//
964
965
966mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_2_0_0 ( .din0 ( d[62] ), .din1 ( d[66] ), .din2 ( d[70] ), .dout ( sd2_2_0_0 ));
967mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_2_0_1 ( .din0 ( d[74] ), .din1 ( d[78] ), .din2 ( d[82] ), .dout ( sd2_2_0_1 ));
968mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_2_0_2 ( .din0 ( d[86] ), .din1 ( d[90] ), .din2 ( d[94] ), .dout ( sd2_2_0_2 ));
969mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_2_0_3 ( .din0 ( d[98] ), .din1 ( d[102] ), .din2 ( d[106] ), .dout ( sd2_2_0_3 ));
970mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_2_0_4 ( .din0 ( d[110] ), .din1 ( d[114] ), .din2 ( d[118] ), .dout ( sd2_2_0_4 ));
971mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_2_0_5 ( .din0 ( d[122] ), .din1 ( d[126] ), .din2 ( aparity_1 ), .dout ( sd2_2_0_5 ));
972
973mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_2_1_0 ( .din0 ( sd2_2_0_0 ), .din1 ( sd2_2_0_1 ), .din2 ( sd2_2_0_2 ), .dout ( sd2_2_1_0 ));
974mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_2_1_1 ( .din0 ( sd2_2_0_3 ), .din1 ( sd2_2_0_4 ), .din2 ( sd2_2_0_5 ), .dout ( sd2_2_1_1 ));
975
976mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_2_2_0 ( .din0 ( sd2_2_1_0 ), .din1 ( sd2_2_1_1 ), .din2 ( ecc2_in[2] ), .dout ( syndrome2[2] ));
977
978
979//
980//
981// assign syndrome2[3] = d[63] ^ // w15
982// d[67] ^ // w16
983// d[71] ^ // w17
984// d[75] ^ // w18
985// d[79] ^ // w19
986// d[83] ^ // w20
987// d[87] ^ // w21
988// d[91] ^ // w22
989// d[95] ^ // w23
990// d[99] ^ // w24
991// d[103] ^ // w25
992// d[107] ^ // w26
993// d[111] ^ // w27
994// d[115] ^ // w28
995// d[119] ^ // w29
996// d[123] ^ // w30
997// d[127] ^ // w31
998// aparity_1 ^
999// ecc2_in[3];
1000//
1001//
1002
1003mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_3_0_0 ( .din0 ( d[63] ), .din1 ( d[67] ), .din2 ( d[71] ), .dout ( sd2_3_0_0 ));
1004mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_3_0_1 ( .din0 ( d[75] ), .din1 ( d[79] ), .din2 ( d[83] ), .dout ( sd2_3_0_1 ));
1005mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_3_0_2 ( .din0 ( d[87] ), .din1 ( d[91] ), .din2 ( d[95] ), .dout ( sd2_3_0_2 ));
1006mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_3_0_3 ( .din0 ( d[99] ), .din1 ( d[103] ), .din2 ( d[107] ), .dout ( sd2_3_0_3 ));
1007mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_3_0_4 ( .din0 ( d[111] ), .din1 ( d[115] ), .din2 ( d[119] ), .dout ( sd2_3_0_4 ));
1008mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_3_0_5 ( .din0 ( d[123] ), .din1 ( d[127] ), .din2 ( aparity_1 ), .dout ( sd2_3_0_5 ));
1009
1010mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_3_1_0 ( .din0 ( sd2_3_0_0 ), .din1 ( sd2_3_0_1 ), .din2 ( sd2_3_0_2 ), .dout ( sd2_3_1_0 ));
1011mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_3_1_1 ( .din0 ( sd2_3_0_3 ), .din1 ( sd2_3_0_4 ), .din2 ( sd2_3_0_5 ), .dout ( sd2_3_1_1 ));
1012
1013mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd2_3_2_0 ( .din0 ( sd2_3_1_0 ), .din1 ( sd2_3_1_1 ), .din2 ( ecc2_in[3] ), .dout ( syndrome2[3] ));
1014
1015
1016
1017//
1018// assign syndrome3[3:0] = w0 ^ w15 ^ w30 ^ p3_partialsum ^ {4{aparity}} ^ ecc3_in;
1019
1020
1021// assign syndrome3[0] = d[0] ^ d[60] ^ d[120] ^ aparity_1 ^ ecc3_in[0] ^
1022// d[5] ^ d[4] ^
1023// d[9] ^ d[10] ^ d[11] ^
1024// d[13] ^ d[14] ^ d[12] ^
1025// d[17] ^ d[16] ^ d[19] ^
1026// d[22] ^ d[23] ^ d[20] ^
1027// d[26] ^ d[27] ^
1028// d[29] ^ d[30] ^ d[31] ^ d[28] ^
1029// d[35] ^
1030// d[37] ^ d[38] ^
1031// d[42] ^ d[40] ^
1032// d[45] ^ d[47] ^
1033// d[50] ^
1034// d[52] ^ d[55] ^
1035// d[57] ^
1036// d[65] ^ d[64] ^
1037// d[69] ^ d[70] ^ d[71] ^
1038// d[73] ^ d[74] ^ d[72] ^
1039// d[77] ^ d[76] ^ d[79] ^
1040// d[82] ^ d[83] ^ d[80] ^
1041// d[86] ^ d[87] ^
1042// d[89] ^ d[90] ^ d[91] ^ d[88] ^
1043// d[95] ^
1044// d[97] ^ d[98] ^
1045// d[102] ^ d[100] ^
1046// d[105] ^ d[107] ^
1047// d[110] ^
1048// d[112] ^ d[115] ^
1049// d[117];
1050//
1051//
1052
1053mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_0 ( .din0 ( d[0] ), .din1 ( d[4] ), .din2 ( d[5] ), .dout ( sd3_0_0_0 ));
1054mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_1 ( .din0 ( d[9] ), .din1 ( d[10] ), .din2 ( d[11] ), .dout ( sd3_0_0_1 ));
1055mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_2 ( .din0 ( d[12] ), .din1 ( d[13] ), .din2 ( d[14] ), .dout ( sd3_0_0_2 ));
1056mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_3 ( .din0 ( d[16] ), .din1 ( d[17] ), .din2 ( d[19] ), .dout ( sd3_0_0_3 ));
1057mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_4 ( .din0 ( d[20] ), .din1 ( d[22] ), .din2 ( d[23] ), .dout ( sd3_0_0_4 ));
1058mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_5 ( .din0 ( d[26] ), .din1 ( d[27] ), .din2 ( d[28] ), .dout ( sd3_0_0_5 ));
1059mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_6 ( .din0 ( d[29] ), .din1 ( d[30] ), .din2 ( d[31] ), .dout ( sd3_0_0_6 ));
1060mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_7 ( .din0 ( d[35] ), .din1 ( d[37] ), .din2 ( d[38] ), .dout ( sd3_0_0_7 ));
1061mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_8 ( .din0 ( d[40] ), .din1 ( d[42] ), .din2 ( d[45] ), .dout ( sd3_0_0_8 ));
1062mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_9 ( .din0 ( d[47] ), .din1 ( d[50] ), .din2 ( d[52] ), .dout ( sd3_0_0_9 ));
1063mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_10 ( .din0 ( d[55] ), .din1 ( d[57] ), .din2 ( d[60] ), .dout ( sd3_0_0_10 ));
1064mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_11 ( .din0 ( d[64] ), .din1 ( d[65] ), .din2 ( d[69] ), .dout ( sd3_0_0_11 ));
1065mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_12 ( .din0 ( d[70] ), .din1 ( d[71] ), .din2 ( d[72] ), .dout ( sd3_0_0_12 ));
1066mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_13 ( .din0 ( d[73] ), .din1 ( d[74] ), .din2 ( d[76] ), .dout ( sd3_0_0_13 ));
1067mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_14 ( .din0 ( d[77] ), .din1 ( d[79] ), .din2 ( d[80] ), .dout ( sd3_0_0_14 ));
1068mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_15 ( .din0 ( d[82] ), .din1 ( d[83] ), .din2 ( d[86] ), .dout ( sd3_0_0_15 ));
1069mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_16 ( .din0 ( d[87] ), .din1 ( d[88] ), .din2 ( d[89] ), .dout ( sd3_0_0_16 ));
1070mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_17 ( .din0 ( d[90] ), .din1 ( d[91] ), .din2 ( d[95] ), .dout ( sd3_0_0_17 ));
1071mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_18 ( .din0 ( d[97] ), .din1 ( d[98] ), .din2 ( d[100] ), .dout ( sd3_0_0_18 ));
1072mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_19 ( .din0 ( d[102] ), .din1 ( d[105] ), .din2 ( d[107] ), .dout ( sd3_0_0_19 ));
1073mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_20 ( .din0 ( d[110] ), .din1 ( d[112] ), .din2 ( d[115] ), .dout ( sd3_0_0_20 ));
1074mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_0_21 ( .din0 ( d[117] ), .din1 ( d[120] ), .din2 ( aparity_1 ), .dout ( sd3_0_0_21 ));
1075
1076mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_1_0 ( .din0 ( sd3_0_0_0 ), .din1 ( sd3_0_0_1 ), .din2 ( sd3_0_0_2 ), .dout ( sd3_0_1_0 ));
1077mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_1_1 ( .din0 ( sd3_0_0_3 ), .din1 ( sd3_0_0_4 ), .din2 ( sd3_0_0_5 ), .dout ( sd3_0_1_1 ));
1078mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_1_2 ( .din0 ( sd3_0_0_6 ), .din1 ( sd3_0_0_7 ), .din2 ( sd3_0_0_8 ), .dout ( sd3_0_1_2 ));
1079mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_1_3 ( .din0 ( sd3_0_0_9 ), .din1 ( sd3_0_0_10 ), .din2 ( sd3_0_0_11 ), .dout ( sd3_0_1_3 ));
1080mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_1_4 ( .din0 ( sd3_0_0_12 ), .din1 ( sd3_0_0_13 ), .din2 ( sd3_0_0_14 ), .dout ( sd3_0_1_4 ));
1081mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_1_5 ( .din0 ( sd3_0_0_15 ), .din1 ( sd3_0_0_16 ), .din2 ( sd3_0_0_17 ), .dout ( sd3_0_1_5 ));
1082mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_1_6 ( .din0 ( sd3_0_0_18 ), .din1 ( sd3_0_0_19 ), .din2 ( sd3_0_0_20 ), .dout ( sd3_0_1_6 ));
1083
1084mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_2_0 ( .din0 ( sd3_0_1_0 ), .din1 ( sd3_0_1_1 ), .din2 ( sd3_0_1_2 ), .dout ( sd3_0_2_0 ));
1085mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_2_1 ( .din0 ( sd3_0_1_3 ), .din1 ( sd3_0_1_4 ), .din2 ( sd3_0_1_5 ), .dout ( sd3_0_2_1 ));
1086mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_2_2 ( .din0 ( sd3_0_0_21 ), .din1 ( sd3_0_1_6 ), .din2 ( ecc3_in[0] ), .dout ( sd3_0_2_2 ));
1087
1088mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_0_3_0 ( .din0 ( sd3_0_2_0 ), .din1 ( sd3_0_2_1 ), .din2 ( sd3_0_2_2 ), .dout ( syndrome3[0] ));
1089
1090
1091//
1092//
1093// assign syndrome3[1] = d[1] ^ d[61] ^ d[121] ^ aparity_1 ^ ecc3_in[1] ^
1094// d[6] ^
1095// d[9] ^ d[8] ^
1096// d[15] ^
1097// d[18] ^ d[16] ^ d[19] ^
1098// d[22] ^ d[20] ^ d[21] ^
1099// d[26] ^ d[24] ^
1100// d[28] ^
1101// d[32] ^ d[35] ^
1102// d[39] ^ d[37] ^
1103// d[43] ^ d[42] ^ d[41] ^
1104// d[46] ^ d[45] ^ d[44] ^ d[47] ^
1105// d[51] ^ d[50] ^
1106// d[52] ^ d[55] ^ d[53] ^
1107// d[58] ^ d[57] ^
1108// d[66] ^
1109// d[69] ^ d[68] ^
1110// d[75] ^
1111// d[78] ^ d[76] ^ d[79] ^
1112// d[82] ^ d[80] ^ d[81] ^
1113// d[86] ^ d[84] ^
1114// d[88] ^
1115// d[92] ^ d[95] ^
1116// d[99] ^ d[97] ^
1117// d[103] ^ d[102] ^ d[101] ^
1118// d[106] ^ d[105] ^ d[104] ^ d[107] ^
1119// d[111] ^ d[110] ^
1120// d[112] ^ d[115] ^ d[113] ^
1121// d[118] ^ d[117];
1122//
1123//
1124
1125mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_0 ( .din0 ( d[1] ), .din1 ( d[6] ), .din2 ( d[9] ), .dout ( sd3_1_0_0 ));
1126mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_1 ( .din0 ( d[8] ), .din1 ( d[15] ), .din2 ( d[16] ), .dout ( sd3_1_0_1 ));
1127mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_2 ( .din0 ( d[18] ), .din1 ( d[19] ), .din2 ( d[20] ), .dout ( sd3_1_0_2 ));
1128mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_3 ( .din0 ( d[21] ), .din1 ( d[22] ), .din2 ( d[24] ), .dout ( sd3_1_0_3 ));
1129mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_4 ( .din0 ( d[26] ), .din1 ( d[28] ), .din2 ( d[32] ), .dout ( sd3_1_0_4 ));
1130mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_5 ( .din0 ( d[35] ), .din1 ( d[37] ), .din2 ( d[39] ), .dout ( sd3_1_0_5 ));
1131mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_6 ( .din0 ( d[41] ), .din1 ( d[42] ), .din2 ( d[43] ), .dout ( sd3_1_0_6 ));
1132mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_7 ( .din0 ( d[44] ), .din1 ( d[45] ), .din2 ( d[46] ), .dout ( sd3_1_0_7 ));
1133mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_8 ( .din0 ( d[47] ), .din1 ( d[50] ), .din2 ( d[51] ), .dout ( sd3_1_0_8 ));
1134mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_9 ( .din0 ( d[52] ), .din1 ( d[53] ), .din2 ( d[55] ), .dout ( sd3_1_0_9 ));
1135mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_10 ( .din0 ( d[57] ), .din1 ( d[58] ), .din2 ( d[61] ), .dout ( sd3_1_0_10 ));
1136mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_11 ( .din0 ( d[66] ), .din1 ( d[69] ), .din2 ( d[68] ), .dout ( sd3_1_0_11 ));
1137mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_12 ( .din0 ( d[75] ), .din1 ( d[78] ), .din2 ( d[76] ), .dout ( sd3_1_0_12 ));
1138mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_13 ( .din0 ( d[79] ), .din1 ( d[80] ), .din2 ( d[81] ), .dout ( sd3_1_0_13 ));
1139mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_14 ( .din0 ( d[82] ), .din1 ( d[84] ), .din2 ( d[86] ), .dout ( sd3_1_0_14 ));
1140mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_15 ( .din0 ( d[88] ), .din1 ( d[92] ), .din2 ( d[95] ), .dout ( sd3_1_0_15 ));
1141mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_16 ( .din0 ( d[97] ), .din1 ( d[99] ), .din2 ( d[101] ), .dout ( sd3_1_0_16 ));
1142mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_17 ( .din0 ( d[102] ), .din1 ( d[103] ), .din2 ( d[106] ), .dout ( sd3_1_0_17 ));
1143mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_18 ( .din0 ( d[105] ), .din1 ( d[104] ), .din2 ( d[107] ), .dout ( sd3_1_0_18 ));
1144mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_19 ( .din0 ( d[110] ), .din1 ( d[111] ), .din2 ( d[112] ), .dout ( sd3_1_0_19 ));
1145mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_20 ( .din0 ( d[113] ), .din1 ( d[115] ), .din2 ( d[118] ), .dout ( sd3_1_0_20 ));
1146mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_0_21 ( .din0 ( d[117] ), .din1 ( d[121] ), .din2 ( aparity_1 ), .dout ( sd3_1_0_21 ));
1147
1148mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_1_0 ( .din0 ( sd3_1_0_0 ), .din1 ( sd3_1_0_1 ), .din2 ( sd3_1_0_2 ), .dout ( sd3_1_1_0 ));
1149mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_1_1 ( .din0 ( sd3_1_0_3 ), .din1 ( sd3_1_0_4 ), .din2 ( sd3_1_0_5 ), .dout ( sd3_1_1_1 ));
1150mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_1_2 ( .din0 ( sd3_1_0_6 ), .din1 ( sd3_1_0_7 ), .din2 ( sd3_1_0_8 ), .dout ( sd3_1_1_2 ));
1151mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_1_3 ( .din0 ( sd3_1_0_9 ), .din1 ( sd3_1_0_10 ), .din2 ( sd3_1_0_11 ), .dout ( sd3_1_1_3 ));
1152mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_1_4 ( .din0 ( sd3_1_0_12 ), .din1 ( sd3_1_0_13 ), .din2 ( sd3_1_0_14 ), .dout ( sd3_1_1_4 ));
1153mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_1_5 ( .din0 ( sd3_1_0_15 ), .din1 ( sd3_1_0_16 ), .din2 ( sd3_1_0_17 ), .dout ( sd3_1_1_5 ));
1154mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_1_6 ( .din0 ( sd3_1_0_18 ), .din1 ( sd3_1_0_19 ), .din2 ( sd3_1_0_20 ), .dout ( sd3_1_1_6 ));
1155
1156mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_2_0 ( .din0 ( sd3_1_1_0 ), .din1 ( sd3_1_1_1 ), .din2 ( sd3_1_1_2 ), .dout ( sd3_1_2_0 ));
1157mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_2_1 ( .din0 ( sd3_1_1_3 ), .din1 ( sd3_1_1_4 ), .din2 ( sd3_1_1_5 ), .dout ( sd3_1_2_1 ));
1158mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_2_2 ( .din0 ( sd3_1_0_21 ), .din1 ( sd3_1_1_6 ), .din2 ( ecc3_in[1] ), .dout ( sd3_1_2_2 ));
1159
1160mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_1_3_0 ( .din0 ( sd3_1_2_0 ), .din1 ( sd3_1_2_1 ), .din2 ( sd3_1_2_2 ), .dout ( syndrome3[1] ));
1161
1162
1163//
1164// assign syndrome3[2] = d[2] ^ d[62] ^ d[122] ^ aparity_1 ^ ecc3_in[2] ^
1165// d[7] ^
1166// d[8] ^ d[10] ^ d[9] ^
1167// d[12] ^
1168// d[19] ^ d[17] ^
1169// d[20] ^ d[23] ^ d[21] ^ d[22] ^
1170// d[24] ^ d[27] ^ d[25] ^
1171// d[28] ^ d[29] ^
1172// d[33] ^
1173// d[36] ^ d[38] ^
1174// d[40] ^ d[43] ^ d[42] ^
1175// d[47] ^ d[46] ^ d[45] ^
1176// d[48] ^ d[51] ^
1177// d[53] ^ d[54] ^
1178// d[59] ^ d[58] ^
1179// d[67] ^
1180// d[68] ^ d[70] ^ d[69] ^
1181// d[72] ^
1182// d[79] ^ d[77] ^
1183// d[80] ^ d[83] ^ d[81] ^ d[82] ^
1184// d[84] ^ d[87] ^ d[85] ^
1185// d[88] ^ d[89] ^
1186// d[93] ^
1187// d[96] ^ d[98] ^
1188// d[100] ^ d[103] ^ d[102] ^
1189// d[107] ^ d[106] ^ d[105] ^
1190// d[108] ^ d[111] ^
1191// d[113] ^ d[114] ^
1192// d[118] ^ d[119];
1193//
1194//
1195
1196mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_0 ( .din0 ( d[2] ), .din1 ( d[7] ), .din2 ( d[8] ), .dout ( sd3_2_0_0 ));
1197mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_1 ( .din0 ( d[9] ), .din1 ( d[10] ), .din2 ( d[12] ), .dout ( sd3_2_0_1 ));
1198mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_2 ( .din0 ( d[17] ), .din1 ( d[19] ), .din2 ( d[20] ), .dout ( sd3_2_0_2 ));
1199mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_3 ( .din0 ( d[21] ), .din1 ( d[22] ), .din2 ( d[23] ), .dout ( sd3_2_0_3 ));
1200mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_4 ( .din0 ( d[24] ), .din1 ( d[25] ), .din2 ( d[27] ), .dout ( sd3_2_0_4 ));
1201mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_5 ( .din0 ( d[28] ), .din1 ( d[29] ), .din2 ( d[33] ), .dout ( sd3_2_0_5 ));
1202mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_6 ( .din0 ( d[36] ), .din1 ( d[38] ), .din2 ( d[40] ), .dout ( sd3_2_0_6 ));
1203mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_7 ( .din0 ( d[42] ), .din1 ( d[43] ), .din2 ( d[45] ), .dout ( sd3_2_0_7 ));
1204mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_8 ( .din0 ( d[46] ), .din1 ( d[47] ), .din2 ( d[48] ), .dout ( sd3_2_0_8 ));
1205mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_9 ( .din0 ( d[51] ), .din1 ( d[53] ), .din2 ( d[54] ), .dout ( sd3_2_0_9 ));
1206mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_10 ( .din0 ( d[58] ), .din1 ( d[59] ), .din2 ( d[62] ), .dout ( sd3_2_0_10 ));
1207mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_11 ( .din0 ( d[67] ), .din1 ( d[68] ), .din2 ( d[69] ), .dout ( sd3_2_0_11 ));
1208mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_12 ( .din0 ( d[70] ), .din1 ( d[72] ), .din2 ( d[77] ), .dout ( sd3_2_0_12 ));
1209mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_13 ( .din0 ( d[79] ), .din1 ( d[80] ), .din2 ( d[81] ), .dout ( sd3_2_0_13 ));
1210mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_14 ( .din0 ( d[82] ), .din1 ( d[83] ), .din2 ( d[84] ), .dout ( sd3_2_0_14 ));
1211mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_15 ( .din0 ( d[85] ), .din1 ( d[87] ), .din2 ( d[88] ), .dout ( sd3_2_0_15 ));
1212mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_16 ( .din0 ( d[89] ), .din1 ( d[93] ), .din2 ( d[96] ), .dout ( sd3_2_0_16 ));
1213mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_17 ( .din0 ( d[98] ), .din1 ( d[100] ), .din2 ( d[102] ), .dout ( sd3_2_0_17 ));
1214mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_18 ( .din0 ( d[103] ), .din1 ( d[105] ), .din2 ( d[106] ), .dout ( sd3_2_0_18 ));
1215mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_19 ( .din0 ( d[107] ), .din1 ( d[108] ), .din2 ( d[111] ), .dout ( sd3_2_0_19 ));
1216mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_20 ( .din0 ( d[113] ), .din1 ( d[114] ), .din2 ( d[118] ), .dout ( sd3_2_0_20 ));
1217mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_0_21 ( .din0 ( d[119] ), .din1 ( d[122] ), .din2 ( aparity_1 ), .dout ( sd3_2_0_21 ));
1218
1219mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_1_0 ( .din0 ( sd3_2_0_0 ), .din1 ( sd3_2_0_1 ), .din2 ( sd3_2_0_2 ), .dout ( sd3_2_1_0 ));
1220mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_1_1 ( .din0 ( sd3_2_0_3 ), .din1 ( sd3_2_0_4 ), .din2 ( sd3_2_0_5 ), .dout ( sd3_2_1_1 ));
1221mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_1_2 ( .din0 ( sd3_2_0_6 ), .din1 ( sd3_2_0_7 ), .din2 ( sd3_2_0_8 ), .dout ( sd3_2_1_2 ));
1222mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_1_3 ( .din0 ( sd3_2_0_9 ), .din1 ( sd3_2_0_10 ), .din2 ( sd3_2_0_11 ), .dout ( sd3_2_1_3 ));
1223mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_1_4 ( .din0 ( sd3_2_0_12 ), .din1 ( sd3_2_0_13 ), .din2 ( sd3_2_0_14 ), .dout ( sd3_2_1_4 ));
1224mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_1_5 ( .din0 ( sd3_2_0_15 ), .din1 ( sd3_2_0_16 ), .din2 ( sd3_2_0_17 ), .dout ( sd3_2_1_5 ));
1225mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_1_6 ( .din0 ( sd3_2_0_18 ), .din1 ( sd3_2_0_19 ), .din2 ( sd3_2_0_20 ), .dout ( sd3_2_1_6 ));
1226
1227mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_2_0 ( .din0 ( sd3_2_1_0 ), .din1 ( sd3_2_1_1 ), .din2 ( sd3_2_1_2 ), .dout ( sd3_2_2_0 ));
1228mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_2_1 ( .din0 ( sd3_2_1_3 ), .din1 ( sd3_2_1_4 ), .din2 ( sd3_2_1_5 ), .dout ( sd3_2_2_1 ));
1229mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_2_2 ( .din0 ( sd3_2_0_21 ), .din1 ( sd3_2_1_6 ), .din2 ( ecc3_in[2] ), .dout ( sd3_2_2_2 ));
1230
1231mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_2_3_0 ( .din0 ( sd3_2_2_0 ), .din1 ( sd3_2_2_1 ), .din2 ( sd3_2_2_2 ), .dout ( syndrome3[2] ));
1232
1233
1234//
1235//
1236// assign syndrome3[3] = d[3] ^ d[63] ^ d[123] ^ aparity_1 ^ ecc3_in[3] ^
1237// d[4] ^
1238// d[8] ^ d[11] ^ d[9] ^ d[10] ^
1239// d[12] ^ d[13] ^
1240// d[16] ^ d[18] ^
1241// d[21] ^ d[22] ^ d[23] ^
1242// d[25] ^ d[26] ^
1243// d[28] ^ d[29] ^ d[30] ^
1244// d[34] ^
1245// d[36] ^ d[39] ^ d[37] ^
1246// d[41] ^ d[43] ^
1247// d[44] ^ d[47] ^ d[46] ^
1248// d[49] ^
1249// d[54] ^ d[55] ^
1250// d[56] ^ d[59] ^
1251// d[64] ^
1252// d[68] ^ d[71] ^ d[69] ^ d[70] ^
1253// d[72] ^ d[73] ^
1254// d[76] ^ d[78] ^
1255// d[81] ^ d[82] ^ d[83] ^
1256// d[85] ^ d[86] ^
1257// d[88] ^ d[89] ^ d[90] ^
1258// d[94] ^
1259// d[96] ^ d[99] ^ d[97] ^
1260// d[101] ^ d[103] ^
1261// d[104] ^ d[107] ^ d[106] ^
1262// d[109] ^
1263// d[114] ^ d[115] ^
1264// d[116] ^ d[119];
1265//
1266//
1267
1268mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_0 ( .din0 ( d[3] ), .din1 ( d[4] ), .din2 ( d[8] ), .dout ( sd3_3_0_0 ));
1269mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_1 ( .din0 ( d[9] ), .din1 ( d[10] ), .din2 ( d[11] ), .dout ( sd3_3_0_1 ));
1270mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_2 ( .din0 ( d[12] ), .din1 ( d[13] ), .din2 ( d[16] ), .dout ( sd3_3_0_2 ));
1271mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_3 ( .din0 ( d[18] ), .din1 ( d[21] ), .din2 ( d[22] ), .dout ( sd3_3_0_3 ));
1272mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_4 ( .din0 ( d[23] ), .din1 ( d[25] ), .din2 ( d[26] ), .dout ( sd3_3_0_4 ));
1273mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_5 ( .din0 ( d[28] ), .din1 ( d[29] ), .din2 ( d[30] ), .dout ( sd3_3_0_5 ));
1274mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_6 ( .din0 ( d[34] ), .din1 ( d[36] ), .din2 ( d[37] ), .dout ( sd3_3_0_6 ));
1275mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_7 ( .din0 ( d[39] ), .din1 ( d[41] ), .din2 ( d[43] ), .dout ( sd3_3_0_7 ));
1276mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_8 ( .din0 ( d[44] ), .din1 ( d[46] ), .din2 ( d[47] ), .dout ( sd3_3_0_8 ));
1277mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_9 ( .din0 ( d[49] ), .din1 ( d[54] ), .din2 ( d[55] ), .dout ( sd3_3_0_9 ));
1278mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_10 ( .din0 ( d[56] ), .din1 ( d[59] ), .din2 ( d[63] ), .dout ( sd3_3_0_10 ));
1279mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_11 ( .din0 ( d[64] ), .din1 ( d[68] ), .din2 ( d[69] ), .dout ( sd3_3_0_11 ));
1280mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_12 ( .din0 ( d[70] ), .din1 ( d[71] ), .din2 ( d[72] ), .dout ( sd3_3_0_12 ));
1281mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_13 ( .din0 ( d[73] ), .din1 ( d[76] ), .din2 ( d[78] ), .dout ( sd3_3_0_13 ));
1282mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_14 ( .din0 ( d[81] ), .din1 ( d[82] ), .din2 ( d[83] ), .dout ( sd3_3_0_14 ));
1283mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_15 ( .din0 ( d[85] ), .din1 ( d[86] ), .din2 ( d[88] ), .dout ( sd3_3_0_15 ));
1284mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_16 ( .din0 ( d[89] ), .din1 ( d[90] ), .din2 ( d[94] ), .dout ( sd3_3_0_16 ));
1285mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_17 ( .din0 ( d[96] ), .din1 ( d[97] ), .din2 ( d[99] ), .dout ( sd3_3_0_17 ));
1286mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_18 ( .din0 ( d[101] ), .din1 ( d[103] ), .din2 ( d[104] ), .dout ( sd3_3_0_18 ));
1287mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_19 ( .din0 ( d[106] ), .din1 ( d[107] ), .din2 ( d[109] ), .dout ( sd3_3_0_19 ));
1288mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_20 ( .din0 ( d[114] ), .din1 ( d[115] ), .din2 ( d[116] ), .dout ( sd3_3_0_20 ));
1289mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_0_21 ( .din0 ( d[119] ), .din1 ( d[123] ), .din2 ( aparity_1 ), .dout ( sd3_3_0_21 ));
1290
1291mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_1_0 ( .din0 ( sd3_3_0_0 ), .din1 ( sd3_3_0_1 ), .din2 ( sd3_3_0_2 ), .dout ( sd3_3_1_0 ));
1292mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_1_1 ( .din0 ( sd3_3_0_3 ), .din1 ( sd3_3_0_4 ), .din2 ( sd3_3_0_5 ), .dout ( sd3_3_1_1 ));
1293mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_1_2 ( .din0 ( sd3_3_0_6 ), .din1 ( sd3_3_0_7 ), .din2 ( sd3_3_0_8 ), .dout ( sd3_3_1_2 ));
1294mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_1_3 ( .din0 ( sd3_3_0_9 ), .din1 ( sd3_3_0_10 ), .din2 ( sd3_3_0_11 ), .dout ( sd3_3_1_3 ));
1295mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_1_4 ( .din0 ( sd3_3_0_12 ), .din1 ( sd3_3_0_13 ), .din2 ( sd3_3_0_14 ), .dout ( sd3_3_1_4 ));
1296mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_1_5 ( .din0 ( sd3_3_0_15 ), .din1 ( sd3_3_0_16 ), .din2 ( sd3_3_0_17 ), .dout ( sd3_3_1_5 ));
1297mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_1_6 ( .din0 ( sd3_3_0_18 ), .din1 ( sd3_3_0_19 ), .din2 ( sd3_3_0_20 ), .dout ( sd3_3_1_6 ));
1298
1299mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_2_0 ( .din0 ( sd3_3_1_0 ), .din1 ( sd3_3_1_1 ), .din2 ( sd3_3_1_2 ), .dout ( sd3_3_2_0 ));
1300mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_2_1 ( .din0 ( sd3_3_1_3 ), .din1 ( sd3_3_1_4 ), .din2 ( sd3_3_1_5 ), .dout ( sd3_3_2_1 ));
1301mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_2_2 ( .din0 ( sd3_3_0_21 ), .din1 ( sd3_3_1_6 ), .din2 ( ecc3_in[3] ), .dout ( sd3_3_2_2 ));
1302
1303mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 u_sd3_3_3_0 ( .din0 ( sd3_3_2_0 ), .din1 ( sd3_3_2_1 ), .din2 ( sd3_3_2_2 ), .dout ( syndrome3[3] ));
1304
1305mcu_eccgen_dp_buff_macro__stack_16l__width_16 u_ecc_buf ( .din ({syndrome0, syndrome1, syndrome2, syndrome3} ), .dout ( ecc[15:0] ));
1306
1307// assign ecc = {syndrome0, syndrome1, syndrome2, syndrome3};
1308
1309
1310endmodule
1311
1312
1313//
1314// buff macro
1315//
1316//
1317
1318
1319
1320
1321
1322module mcu_eccgen_dp_buff_macro__stack_64c__width_64 (
1323 din,
1324 dout);
1325 input [63:0] din;
1326 output [63:0] dout;
1327
1328
1329
1330
1331
1332
1333buff #(64) d0_0 (
1334.in(din[63:0]),
1335.out(dout[63:0])
1336);
1337
1338
1339
1340
1341
1342
1343
1344
1345endmodule
1346
1347
1348
1349
1350
1351//
1352// buff macro
1353//
1354//
1355
1356
1357
1358
1359
1360module mcu_eccgen_dp_buff_macro__stack_2l__width_2 (
1361 din,
1362 dout);
1363 input [1:0] din;
1364 output [1:0] dout;
1365
1366
1367
1368
1369
1370
1371buff #(2) d0_0 (
1372.in(din[1:0]),
1373.out(dout[1:0])
1374);
1375
1376
1377
1378
1379
1380
1381
1382
1383endmodule
1384
1385
1386
1387
1388
1389//
1390// xor macro for ports = 2,3
1391//
1392//
1393
1394
1395
1396
1397
1398module mcu_eccgen_dp_xor_macro__dxor_8x__ports_3__width_1 (
1399 din0,
1400 din1,
1401 din2,
1402 dout);
1403 input [0:0] din0;
1404 input [0:0] din1;
1405 input [0:0] din2;
1406 output [0:0] dout;
1407
1408
1409
1410
1411
1412xor3 #(1) d0_0 (
1413.in0(din0[0:0]),
1414.in1(din1[0:0]),
1415.in2(din2[0:0]),
1416.out(dout[0:0])
1417);
1418
1419
1420
1421
1422
1423
1424
1425
1426endmodule
1427
1428
1429
1430
1431
1432//
1433// buff macro
1434//
1435//
1436
1437
1438
1439
1440
1441module mcu_eccgen_dp_buff_macro__stack_16l__width_16 (
1442 din,
1443 dout);
1444 input [15:0] din;
1445 output [15:0] dout;
1446
1447
1448
1449
1450
1451
1452buff #(16) d0_0 (
1453.in(din[15:0]),
1454.out(dout[15:0])
1455);
1456
1457
1458
1459
1460
1461
1462
1463
1464endmodule
1465
1466
1467
1468