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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: ncu_c2ifcd_ctl.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module ncu_c2ifcd_ctl ( | |
36 | cmp_io_sync_en, | |
37 | cpubuf_head_s, | |
38 | intbuf_hit_hwm, | |
39 | io_cmp_sync_en, | |
40 | io_mondo_data0_din_s, | |
41 | io_mondo_data1_din_s, | |
42 | io_mondo_data_wr_addr_s, | |
43 | io_mondo_data_wr_s, | |
44 | l2clk, | |
45 | mondo_data0_dout, | |
46 | mondo_data1_dout, | |
47 | pcx_ncu_data_px2, | |
48 | pcx_ncu_data_rdy_px1, | |
49 | tcu_scan_en, | |
50 | scan_in, | |
51 | tap_mondo_acc_addr_s, | |
52 | tap_mondo_acc_seq_s, | |
53 | tap_mondo_din_s, | |
54 | tap_mondo_wr_s, | |
55 | tcu_clk_stop, | |
56 | tcu_pce_ov, | |
57 | tcu_aclk, | |
58 | tcu_bclk, | |
59 | mb0_mondo_rd_en, | |
60 | mb0_mondo_wr_en, | |
61 | mb0_intbuf_wr_en, | |
62 | mb0_waddr, | |
63 | mb0_raddr, | |
64 | mb0_wdata, | |
65 | mb0_run, | |
66 | mb1_run, | |
67 | mb1_wdata, | |
68 | mb1_cpubuf_wr_en, | |
69 | mb1_addr, | |
70 | cpubuf_din, | |
71 | cpubuf_tail_f, | |
72 | cpubuf_tail_ptr, | |
73 | cpubuf_wr, | |
74 | intbuf_wr, | |
75 | intbuf_din, | |
76 | mondo_busy_vec_f, | |
77 | mondo_data0_din, | |
78 | mondo_data0_wr, | |
79 | mondo_data1_din, | |
80 | mondo_data1_wr, | |
81 | mondo_data_addr_p0, | |
82 | mondo_data_addr_p1, | |
83 | mondo_rd_en, | |
84 | ncu_pcx_stall_pq, | |
85 | scan_out, | |
86 | tap_mondo_acc_addr_invld_d2_f, | |
87 | tap_mondo_acc_seq_d2_f, | |
88 | tap_mondo_dout_d2_f, | |
89 | intbuf_wr2i2c, | |
90 | mondotbl_pe_f, | |
91 | mondotbl_pei) ; | |
92 | wire io_mondo_data_wr; | |
93 | wire mondo_data_bypass_d2; | |
94 | wire mondo_addr_creg_mdata0_dec_d2; | |
95 | wire mondo_addr_creg_mdata1_dec_d2; | |
96 | wire mondo_addr_creg_mbusy_dec_d2; | |
97 | wire tap_mondo_rd_d2; | |
98 | wire cpu_mondo_addr_invld_d2; | |
99 | wire cpu_mondo_rd_d2; | |
100 | wire [5:0] mondo_busy_addr_p0; | |
101 | wire [5:0] mondo_busy_addr_p1; | |
102 | wire mondo_busy_wr_p1; | |
103 | wire [5:0] mondo_busy_addr_p2; | |
104 | wire mondo_busy_wr_p2; | |
105 | wire ncu_c2ifc_ctl_scanin; | |
106 | wire ncu_c2ifc_ctl_scanout; | |
107 | wire pcx_ncu_vld; | |
108 | wire [4:0] pcx_ncu_req; | |
109 | wire [39:0] pcx_ncu_addr; | |
110 | wire [5:0] pcx_ncu_cputhr; | |
111 | wire ncu_c2ifd_ctl_scanin; | |
112 | wire ncu_c2ifd_ctl_scanout; | |
113 | ||
114 | ||
115 | input cmp_io_sync_en; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v, ... | |
116 | input [5:0] cpubuf_head_s; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
117 | input intbuf_hit_hwm; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
118 | input io_cmp_sync_en; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v, ... | |
119 | input [63:0] io_mondo_data0_din_s; // To ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
120 | input [63:0] io_mondo_data1_din_s; // To ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
121 | input [5:0] io_mondo_data_wr_addr_s;// To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
122 | input io_mondo_data_wr_s; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
123 | input l2clk; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v, ... | |
124 | input [71:0] mondo_data0_dout; // To ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
125 | input [71:0] mondo_data1_dout; // To ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
126 | input [129:0] pcx_ncu_data_px2; // To ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
127 | input pcx_ncu_data_rdy_px1; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
128 | input tcu_scan_en; | |
129 | input scan_in; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
130 | input [21:0] tap_mondo_acc_addr_s; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
131 | input tap_mondo_acc_seq_s; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
132 | input [63:0] tap_mondo_din_s; // To ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
133 | input tap_mondo_wr_s; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
134 | input tcu_clk_stop; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v, ... | |
135 | input tcu_pce_ov; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v, ... | |
136 | input tcu_aclk; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v, ... | |
137 | input tcu_bclk; // To ncu_c2ifc_ctl of ncu_c2ifc_ctl.v, ... | |
138 | //input mb0_mondo_sel; | |
139 | input mb0_mondo_rd_en; | |
140 | input mb0_mondo_wr_en; | |
141 | //input mb0_cpubuf_sel; | |
142 | //input mb0_intbuf_sel; | |
143 | input mb0_intbuf_wr_en; | |
144 | input [5:0] mb0_waddr; | |
145 | input [5:0] mb0_raddr; | |
146 | input [7:0] mb0_wdata; | |
147 | input mb0_run; | |
148 | ||
149 | input mb1_run; | |
150 | input[7:0] mb1_wdata; | |
151 | input mb1_cpubuf_wr_en; | |
152 | input[5:0] mb1_addr; | |
153 | ||
154 | output [143:0] cpubuf_din; // From ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
155 | output [5:0] cpubuf_tail_f; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
156 | output [4:0] cpubuf_tail_ptr; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
157 | output cpubuf_wr; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
158 | output intbuf_wr; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
159 | output [143:0] intbuf_din; // From ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
160 | output [63:0] mondo_busy_vec_f; // From ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
161 | output [71:0] mondo_data0_din; // From ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
162 | output mondo_data0_wr; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
163 | output [71:0] mondo_data1_din; // From ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
164 | output mondo_data1_wr; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
165 | output [5:0] mondo_data_addr_p0; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
166 | output [5:0] mondo_data_addr_p1; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
167 | output mondo_rd_en; | |
168 | output ncu_pcx_stall_pq; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
169 | output scan_out; // From ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
170 | output tap_mondo_acc_addr_invld_d2_f;// From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
171 | output tap_mondo_acc_seq_d2_f; // From ncu_c2ifc_ctl of ncu_c2ifc_ctl.v | |
172 | output [63:0] tap_mondo_dout_d2_f; // From ncu_c2ifd_ctl of ncu_c2ifd_ctl.v | |
173 | output intbuf_wr2i2c; | |
174 | ||
175 | // err ecc // | |
176 | output mondotbl_pe_f; | |
177 | input mondotbl_pei; | |
178 | ||
179 | ||
180 | //assign mondo_rd_en = mb0_run ? mb0_mondo_rd_en : 1'b1; | |
181 | assign mondo_rd_en = mb0_run ? mb0_mondo_rd_en : ~((mondo_data_addr_p0[5:0]==mondo_data_addr_p1[5:0])& | |
182 | (mondo_data0_wr|mondo_data1_wr)); | |
183 | ||
184 | /***************************************************************** | |
185 | * cpu-to-io fast control | |
186 | *****************************************************************/ | |
187 | ///* ncu_c2ifc_ctl auto_template ( | |
188 | // .scan_out() ); */ | |
189 | ncu_c2ifc_ctl ncu_c2ifc_ctl (/*AUTOINST*/ | |
190 | // Outputs | |
191 | .ncu_pcx_stall_pq(ncu_pcx_stall_pq), | |
192 | .io_mondo_data_wr(io_mondo_data_wr), | |
193 | .mondo_data_bypass_d2(mondo_data_bypass_d2), | |
194 | .mondo_addr_creg_mdata0_dec_d2(mondo_addr_creg_mdata0_dec_d2), | |
195 | .mondo_addr_creg_mdata1_dec_d2(mondo_addr_creg_mdata1_dec_d2), | |
196 | .mondo_addr_creg_mbusy_dec_d2(mondo_addr_creg_mbusy_dec_d2), | |
197 | .tap_mondo_rd_d2(tap_mondo_rd_d2), | |
198 | .cpu_mondo_addr_invld_d2(cpu_mondo_addr_invld_d2), | |
199 | .cpubuf_tail_f(cpubuf_tail_f[5:0]), | |
200 | .intbuf_wr (intbuf_wr), | |
201 | .intbuf_wr2i2c(intbuf_wr2i2c), | |
202 | .cpu_mondo_rd_d2(cpu_mondo_rd_d2), | |
203 | .tap_mondo_acc_addr_invld_d2_f(tap_mondo_acc_addr_invld_d2_f), | |
204 | .tap_mondo_acc_seq_d2_f(tap_mondo_acc_seq_d2_f), | |
205 | .mondo_data_addr_p0(mondo_data_addr_p0[5:0]), | |
206 | .mondo_busy_addr_p0(mondo_busy_addr_p0[5:0]), | |
207 | .mondo_data_addr_p1(mondo_data_addr_p1[5:0]), | |
208 | .mondo_busy_addr_p1(mondo_busy_addr_p1[5:0]), | |
209 | .mondo_busy_wr_p1(mondo_busy_wr_p1), | |
210 | .mondo_busy_addr_p2(mondo_busy_addr_p2[5:0]), | |
211 | .mondo_busy_wr_p2(mondo_busy_wr_p2), | |
212 | .mondo_data0_wr(mondo_data0_wr), | |
213 | .mondo_data1_wr(mondo_data1_wr), | |
214 | .cpubuf_wr (cpubuf_wr), | |
215 | .cpubuf_tail_ptr(cpubuf_tail_ptr[4:0]), | |
216 | // Inputs | |
217 | .scan_in(ncu_c2ifc_ctl_scanin), | |
218 | .scan_out(ncu_c2ifc_ctl_scanout), | |
219 | .l2clk (l2clk), | |
220 | .cmp_io_sync_en(cmp_io_sync_en), | |
221 | .io_cmp_sync_en(io_cmp_sync_en), | |
222 | .tcu_scan_en(tcu_scan_en), | |
223 | .tcu_pce_ov(tcu_pce_ov), | |
224 | .tcu_clk_stop(tcu_clk_stop), | |
225 | .tcu_aclk (tcu_aclk), | |
226 | .tcu_bclk (tcu_bclk), | |
227 | .pcx_ncu_data_rdy_px1(pcx_ncu_data_rdy_px1), | |
228 | .pcx_ncu_vld(pcx_ncu_vld), | |
229 | .pcx_ncu_req(pcx_ncu_req[4:0]), | |
230 | .pcx_ncu_addr(pcx_ncu_addr[39:0]), | |
231 | .pcx_ncu_cputhr(pcx_ncu_cputhr[5:0]), | |
232 | .cpubuf_head_s(cpubuf_head_s[5:0]), | |
233 | .intbuf_hit_hwm(intbuf_hit_hwm), | |
234 | .io_mondo_data_wr_s(io_mondo_data_wr_s), | |
235 | .io_mondo_data_wr_addr_s(io_mondo_data_wr_addr_s[5:0]), | |
236 | .tap_mondo_acc_addr_s(tap_mondo_acc_addr_s[21:0]), | |
237 | .tap_mondo_acc_seq_s(tap_mondo_acc_seq_s), | |
238 | .tap_mondo_wr_s(tap_mondo_wr_s), | |
239 | .mb1_cpubuf_wr_en(mb1_cpubuf_wr_en), | |
240 | .mb1_run(mb1_run), | |
241 | .mb1_waddr(mb1_addr[5:0]), | |
242 | .mb0_run(mb0_run), | |
243 | .mb0_intbuf_wr_en(mb0_intbuf_wr_en), | |
244 | .mb0_waddr (mb0_waddr[5:0]), | |
245 | .mb0_raddr (mb0_raddr[5:0]), | |
246 | .mb0_mondo_wr_en(mb0_mondo_wr_en)); | |
247 | ||
248 | ||
249 | /***************************************************************** | |
250 | * cpu-to-io fast datapath | |
251 | *****************************************************************/ | |
252 | ///* ncu_c2ifd_ctl auto_template ( | |
253 | // .scan_out( ) ); */ | |
254 | ncu_c2ifd_ctl ncu_c2ifd_ctl (/*AUTOINST*/ | |
255 | // Outputs | |
256 | .pcx_ncu_vld(pcx_ncu_vld), | |
257 | .pcx_ncu_req(pcx_ncu_req[4:0]), | |
258 | .pcx_ncu_addr(pcx_ncu_addr[39:0]), | |
259 | .pcx_ncu_cputhr(pcx_ncu_cputhr[5:0]), | |
260 | .tap_mondo_dout_d2_f(tap_mondo_dout_d2_f[63:0]), | |
261 | .mondotbl_pe_f(mondotbl_pe_f), | |
262 | .intbuf_din(intbuf_din[143:0]), | |
263 | .mondo_data0_din(mondo_data0_din[71:0]), | |
264 | .mondo_data1_din(mondo_data1_din[71:0]), | |
265 | .mondo_busy_vec_f(mondo_busy_vec_f[63:0]), | |
266 | .cpubuf_din(cpubuf_din[143:0]), | |
267 | // Inputs | |
268 | .scan_in(ncu_c2ifd_ctl_scanin), | |
269 | .scan_out(ncu_c2ifd_ctl_scanout), | |
270 | .l2clk (l2clk), | |
271 | .cmp_io_sync_en(cmp_io_sync_en), | |
272 | .io_cmp_sync_en(io_cmp_sync_en), | |
273 | .tcu_scan_en(tcu_scan_en), | |
274 | .tcu_pce_ov(tcu_pce_ov), | |
275 | .tcu_clk_stop(tcu_clk_stop), | |
276 | .tcu_aclk (tcu_aclk), | |
277 | .tcu_bclk (tcu_bclk), | |
278 | .pcx_ncu_data_px2(pcx_ncu_data_px2[129:0]), | |
279 | .io_mondo_data_wr(io_mondo_data_wr), | |
280 | .mondo_data_bypass_d2(mondo_data_bypass_d2), | |
281 | .mondo_addr_creg_mdata0_dec_d2(mondo_addr_creg_mdata0_dec_d2), | |
282 | .mondo_addr_creg_mdata1_dec_d2(mondo_addr_creg_mdata1_dec_d2), | |
283 | .mondo_addr_creg_mbusy_dec_d2(mondo_addr_creg_mbusy_dec_d2), | |
284 | .tap_mondo_rd_d2(tap_mondo_rd_d2), | |
285 | .cpu_mondo_rd_d2(cpu_mondo_rd_d2), | |
286 | .cpu_mondo_addr_invld_d2(cpu_mondo_addr_invld_d2), | |
287 | .io_mondo_data0_din_s(io_mondo_data0_din_s[63:0]), | |
288 | .io_mondo_data1_din_s(io_mondo_data1_din_s[63:0]), | |
289 | .tap_mondo_din_s(tap_mondo_din_s[63:0]), | |
290 | .mb0_mondo_wr_en(mb0_mondo_wr_en), | |
291 | //.mb0_intbuf_wr_en(mb0_intbuf_wr_en), | |
292 | //.mb0_cpubuf_sel(mb0_cpubuf_sel), | |
293 | .mb1_run(mb1_run), | |
294 | .mb1_wdata(mb1_wdata[7:0]), | |
295 | .mb1_addr(mb1_addr[5:0]), | |
296 | .mb1_cpubuf_wr_en(mb1_cpubuf_wr_en), | |
297 | .mb0_run(mb0_run), | |
298 | .mb0_wdata (mb0_wdata[7:0]), | |
299 | .mondotbl_pei(mondotbl_pei), | |
300 | .mondo_data0_dout(mondo_data0_dout[71:0]), | |
301 | .mondo_data1_dout(mondo_data1_dout[71:0]), | |
302 | .mondo_busy_addr_p0(mondo_busy_addr_p0[5:0]), | |
303 | .mondo_busy_addr_p1(mondo_busy_addr_p1[5:0]), | |
304 | .mondo_busy_wr_p1(mondo_busy_wr_p1), | |
305 | .mondo_busy_addr_p2(mondo_busy_addr_p2[5:0]), | |
306 | .mondo_busy_wr_p2(mondo_busy_wr_p2)); | |
307 | ||
308 | ||
309 | ||
310 | // fixscan start: | |
311 | assign ncu_c2ifc_ctl_scanin = scan_in ; | |
312 | assign ncu_c2ifd_ctl_scanin = ncu_c2ifc_ctl_scanout ; | |
313 | assign scan_out = ncu_c2ifd_ctl_scanout ; | |
314 | // fixscan end: | |
315 | endmodule | |
316 | ||
317 | // Local Variables: | |
318 | // verilog-library-directories:("." "../common") | |
319 | // End: | |
320 | // | |
321 | ||
322 | ||
323 | ||
324 | // any PARAMS parms go into naming of macro | |
325 | ||
326 | module ncu_c2ifcd_ctl_msff_ctl_macro__width_1 ( | |
327 | din, | |
328 | l1clk, | |
329 | scan_in, | |
330 | siclk, | |
331 | soclk, | |
332 | dout, | |
333 | scan_out); | |
334 | wire [0:0] fdin; | |
335 | ||
336 | input [0:0] din; | |
337 | input l1clk; | |
338 | input scan_in; | |
339 | ||
340 | ||
341 | input siclk; | |
342 | input soclk; | |
343 | ||
344 | output [0:0] dout; | |
345 | output scan_out; | |
346 | assign fdin[0:0] = din[0:0]; | |
347 | ||
348 | ||
349 | ||
350 | ||
351 | ||
352 | ||
353 | dff #(1) d0_0 ( | |
354 | .l1clk(l1clk), | |
355 | .siclk(siclk), | |
356 | .soclk(soclk), | |
357 | .d(fdin[0:0]), | |
358 | .si(scan_in), | |
359 | .so(scan_out), | |
360 | .q(dout[0:0]) | |
361 | ); | |
362 | ||
363 | ||
364 | ||
365 | ||
366 | ||
367 | ||
368 | ||
369 | ||
370 | ||
371 | ||
372 | ||
373 | ||
374 | endmodule | |
375 | ||
376 | ||
377 | ||
378 | ||
379 | ||
380 | ||
381 | ||
382 | ||
383 | ||
384 | ||
385 | ||
386 | ||
387 | ||
388 | // any PARAMS parms go into naming of macro | |
389 | ||
390 | module ncu_c2ifcd_ctl_msff_ctl_macro__en_1__width_1 ( | |
391 | din, | |
392 | en, | |
393 | l1clk, | |
394 | scan_in, | |
395 | siclk, | |
396 | soclk, | |
397 | dout, | |
398 | scan_out); | |
399 | wire [0:0] fdin; | |
400 | ||
401 | input [0:0] din; | |
402 | input en; | |
403 | input l1clk; | |
404 | input scan_in; | |
405 | ||
406 | ||
407 | input siclk; | |
408 | input soclk; | |
409 | ||
410 | output [0:0] dout; | |
411 | output scan_out; | |
412 | assign fdin[0:0] = (din[0:0] & {1{en}}) | (dout[0:0] & ~{1{en}}); | |
413 | ||
414 | ||
415 | ||
416 | ||
417 | ||
418 | ||
419 | dff #(1) d0_0 ( | |
420 | .l1clk(l1clk), | |
421 | .siclk(siclk), | |
422 | .soclk(soclk), | |
423 | .d(fdin[0:0]), | |
424 | .si(scan_in), | |
425 | .so(scan_out), | |
426 | .q(dout[0:0]) | |
427 | ); | |
428 | ||
429 | ||
430 | ||
431 | ||
432 | ||
433 | ||
434 | ||
435 | ||
436 | ||
437 | ||
438 | ||
439 | ||
440 | endmodule | |
441 | ||
442 | ||
443 | ||
444 | ||
445 | ||
446 | ||
447 | ||
448 | ||
449 | ||
450 | ||
451 | ||
452 | ||
453 | ||
454 | // any PARAMS parms go into naming of macro | |
455 | ||
456 | module ncu_c2ifcd_ctl_msff_ctl_macro__en_1__width_6 ( | |
457 | din, | |
458 | en, | |
459 | l1clk, | |
460 | scan_in, | |
461 | siclk, | |
462 | soclk, | |
463 | dout, | |
464 | scan_out); | |
465 | wire [5:0] fdin; | |
466 | wire [4:0] so; | |
467 | ||
468 | input [5:0] din; | |
469 | input en; | |
470 | input l1clk; | |
471 | input scan_in; | |
472 | ||
473 | ||
474 | input siclk; | |
475 | input soclk; | |
476 | ||
477 | output [5:0] dout; | |
478 | output scan_out; | |
479 | assign fdin[5:0] = (din[5:0] & {6{en}}) | (dout[5:0] & ~{6{en}}); | |
480 | ||
481 | ||
482 | ||
483 | ||
484 | ||
485 | ||
486 | dff #(6) d0_0 ( | |
487 | .l1clk(l1clk), | |
488 | .siclk(siclk), | |
489 | .soclk(soclk), | |
490 | .d(fdin[5:0]), | |
491 | .si({scan_in,so[4:0]}), | |
492 | .so({so[4:0],scan_out}), | |
493 | .q(dout[5:0]) | |
494 | ); | |
495 | ||
496 | ||
497 | ||
498 | ||
499 | ||
500 | ||
501 | ||
502 | ||
503 | ||
504 | ||
505 | ||
506 | ||
507 | endmodule | |
508 | ||
509 | ||
510 | ||
511 | ||
512 | ||
513 | ||
514 | ||
515 | ||
516 | ||
517 | ||
518 | ||
519 | ||
520 | ||
521 | // any PARAMS parms go into naming of macro | |
522 | ||
523 | module ncu_c2ifcd_ctl_msff_ctl_macro__en_1__width_22 ( | |
524 | din, | |
525 | en, | |
526 | l1clk, | |
527 | scan_in, | |
528 | siclk, | |
529 | soclk, | |
530 | dout, | |
531 | scan_out); | |
532 | wire [21:0] fdin; | |
533 | wire [20:0] so; | |
534 | ||
535 | input [21:0] din; | |
536 | input en; | |
537 | input l1clk; | |
538 | input scan_in; | |
539 | ||
540 | ||
541 | input siclk; | |
542 | input soclk; | |
543 | ||
544 | output [21:0] dout; | |
545 | output scan_out; | |
546 | assign fdin[21:0] = (din[21:0] & {22{en}}) | (dout[21:0] & ~{22{en}}); | |
547 | ||
548 | ||
549 | ||
550 | ||
551 | ||
552 | ||
553 | dff #(22) d0_0 ( | |
554 | .l1clk(l1clk), | |
555 | .siclk(siclk), | |
556 | .soclk(soclk), | |
557 | .d(fdin[21:0]), | |
558 | .si({scan_in,so[20:0]}), | |
559 | .so({so[20:0],scan_out}), | |
560 | .q(dout[21:0]) | |
561 | ); | |
562 | ||
563 | ||
564 | ||
565 | ||
566 | ||
567 | ||
568 | ||
569 | ||
570 | ||
571 | ||
572 | ||
573 | ||
574 | endmodule | |
575 | ||
576 | ||
577 | ||
578 | ||
579 | ||
580 | ||
581 | ||
582 | ||
583 | ||
584 | ||
585 | ||
586 | ||
587 | ||
588 | // any PARAMS parms go into naming of macro | |
589 | ||
590 | module ncu_c2ifcd_ctl_msff_ctl_macro__width_6 ( | |
591 | din, | |
592 | l1clk, | |
593 | scan_in, | |
594 | siclk, | |
595 | soclk, | |
596 | dout, | |
597 | scan_out); | |
598 | wire [5:0] fdin; | |
599 | wire [4:0] so; | |
600 | ||
601 | input [5:0] din; | |
602 | input l1clk; | |
603 | input scan_in; | |
604 | ||
605 | ||
606 | input siclk; | |
607 | input soclk; | |
608 | ||
609 | output [5:0] dout; | |
610 | output scan_out; | |
611 | assign fdin[5:0] = din[5:0]; | |
612 | ||
613 | ||
614 | ||
615 | ||
616 | ||
617 | ||
618 | dff #(6) d0_0 ( | |
619 | .l1clk(l1clk), | |
620 | .siclk(siclk), | |
621 | .soclk(soclk), | |
622 | .d(fdin[5:0]), | |
623 | .si({scan_in,so[4:0]}), | |
624 | .so({so[4:0],scan_out}), | |
625 | .q(dout[5:0]) | |
626 | ); | |
627 | ||
628 | ||
629 | ||
630 | ||
631 | ||
632 | ||
633 | ||
634 | ||
635 | ||
636 | ||
637 | ||
638 | ||
639 | endmodule | |
640 | ||
641 | ||
642 | ||
643 | ||
644 | ||
645 | ||
646 | ||
647 | ||
648 | ||
649 | ||
650 | ||
651 | ||
652 | ||
653 | // any PARAMS parms go into naming of macro | |
654 | ||
655 | module ncu_c2ifcd_ctl_l1clkhdr_ctl_macro ( | |
656 | l2clk, | |
657 | l1en, | |
658 | pce_ov, | |
659 | stop, | |
660 | se, | |
661 | l1clk); | |
662 | ||
663 | ||
664 | input l2clk; | |
665 | input l1en; | |
666 | input pce_ov; | |
667 | input stop; | |
668 | input se; | |
669 | output l1clk; | |
670 | ||
671 | ||
672 | ||
673 | ||
674 | ||
675 | cl_sc1_l1hdr_8x c_0 ( | |
676 | ||
677 | ||
678 | .l2clk(l2clk), | |
679 | .pce(l1en), | |
680 | .l1clk(l1clk), | |
681 | .se(se), | |
682 | .pce_ov(pce_ov), | |
683 | .stop(stop) | |
684 | ); | |
685 | ||
686 | ||
687 | ||
688 | endmodule | |
689 | ||
690 | ||
691 | ||
692 | // Local Variables: | |
693 | // verilog-auto-sense-defines-constant:t | |
694 | // End: | |
695 | ||
696 | ||
697 | ||
698 | ||
699 | ||
700 | ||
701 | // any PARAMS parms go into naming of macro | |
702 | ||
703 | module ncu_c2ifcd_ctl_msff_ctl_macro__width_129 ( | |
704 | din, | |
705 | l1clk, | |
706 | scan_in, | |
707 | siclk, | |
708 | soclk, | |
709 | dout, | |
710 | scan_out); | |
711 | wire [128:0] fdin; | |
712 | wire [127:0] so; | |
713 | ||
714 | input [128:0] din; | |
715 | input l1clk; | |
716 | input scan_in; | |
717 | ||
718 | ||
719 | input siclk; | |
720 | input soclk; | |
721 | ||
722 | output [128:0] dout; | |
723 | output scan_out; | |
724 | assign fdin[128:0] = din[128:0]; | |
725 | ||
726 | ||
727 | ||
728 | ||
729 | ||
730 | ||
731 | dff #(129) d0_0 ( | |
732 | .l1clk(l1clk), | |
733 | .siclk(siclk), | |
734 | .soclk(soclk), | |
735 | .d(fdin[128:0]), | |
736 | .si({scan_in,so[127:0]}), | |
737 | .so({so[127:0],scan_out}), | |
738 | .q(dout[128:0]) | |
739 | ); | |
740 | ||
741 | ||
742 | ||
743 | ||
744 | ||
745 | ||
746 | ||
747 | ||
748 | ||
749 | ||
750 | ||
751 | ||
752 | endmodule | |
753 | ||
754 | ||
755 | ||
756 | ||
757 | ||
758 | ||
759 | ||
760 | ||
761 | // any PARAMS parms go into naming of macro | |
762 | ||
763 | module ncu_c2ifcd_ctl_msff_ctl_macro__en_1__width_64 ( | |
764 | din, | |
765 | en, | |
766 | l1clk, | |
767 | scan_in, | |
768 | siclk, | |
769 | soclk, | |
770 | dout, | |
771 | scan_out); | |
772 | wire [63:0] fdin; | |
773 | wire [62:0] so; | |
774 | ||
775 | input [63:0] din; | |
776 | input en; | |
777 | input l1clk; | |
778 | input scan_in; | |
779 | ||
780 | ||
781 | input siclk; | |
782 | input soclk; | |
783 | ||
784 | output [63:0] dout; | |
785 | output scan_out; | |
786 | assign fdin[63:0] = (din[63:0] & {64{en}}) | (dout[63:0] & ~{64{en}}); | |
787 | ||
788 | ||
789 | ||
790 | ||
791 | ||
792 | ||
793 | dff #(64) d0_0 ( | |
794 | .l1clk(l1clk), | |
795 | .siclk(siclk), | |
796 | .soclk(soclk), | |
797 | .d(fdin[63:0]), | |
798 | .si({scan_in,so[62:0]}), | |
799 | .so({so[62:0],scan_out}), | |
800 | .q(dout[63:0]) | |
801 | ); | |
802 | ||
803 | ||
804 | ||
805 | ||
806 | ||
807 | ||
808 | ||
809 | ||
810 | ||
811 | ||
812 | ||
813 | ||
814 | endmodule | |
815 | ||
816 | ||
817 | ||
818 | ||
819 | ||
820 | ||
821 | ||
822 | ||
823 | ||
824 | ||
825 | ||
826 | ||
827 | ||
828 | // any PARAMS parms go into naming of macro | |
829 | ||
830 | module ncu_c2ifcd_ctl_msff_ctl_macro__width_72 ( | |
831 | din, | |
832 | l1clk, | |
833 | scan_in, | |
834 | siclk, | |
835 | soclk, | |
836 | dout, | |
837 | scan_out); | |
838 | wire [71:0] fdin; | |
839 | wire [70:0] so; | |
840 | ||
841 | input [71:0] din; | |
842 | input l1clk; | |
843 | input scan_in; | |
844 | ||
845 | ||
846 | input siclk; | |
847 | input soclk; | |
848 | ||
849 | output [71:0] dout; | |
850 | output scan_out; | |
851 | assign fdin[71:0] = din[71:0]; | |
852 | ||
853 | ||
854 | ||
855 | ||
856 | ||
857 | ||
858 | dff #(72) d0_0 ( | |
859 | .l1clk(l1clk), | |
860 | .siclk(siclk), | |
861 | .soclk(soclk), | |
862 | .d(fdin[71:0]), | |
863 | .si({scan_in,so[70:0]}), | |
864 | .so({so[70:0],scan_out}), | |
865 | .q(dout[71:0]) | |
866 | ); | |
867 | ||
868 | ||
869 | ||
870 | ||
871 | ||
872 | ||
873 | ||
874 | ||
875 | ||
876 | ||
877 | ||
878 | ||
879 | endmodule | |
880 | ||
881 | ||
882 | ||
883 | ||
884 | ||
885 | ||
886 | ||
887 | ||
888 | ||
889 | ||
890 | ||
891 | ||
892 | ||
893 | // any PARAMS parms go into naming of macro | |
894 | ||
895 | module ncu_c2ifcd_ctl_msff_ctl_macro__width_3 ( | |
896 | din, | |
897 | l1clk, | |
898 | scan_in, | |
899 | siclk, | |
900 | soclk, | |
901 | dout, | |
902 | scan_out); | |
903 | wire [2:0] fdin; | |
904 | wire [1:0] so; | |
905 | ||
906 | input [2:0] din; | |
907 | input l1clk; | |
908 | input scan_in; | |
909 | ||
910 | ||
911 | input siclk; | |
912 | input soclk; | |
913 | ||
914 | output [2:0] dout; | |
915 | output scan_out; | |
916 | assign fdin[2:0] = din[2:0]; | |
917 | ||
918 | ||
919 | ||
920 | ||
921 | ||
922 | ||
923 | dff #(3) d0_0 ( | |
924 | .l1clk(l1clk), | |
925 | .siclk(siclk), | |
926 | .soclk(soclk), | |
927 | .d(fdin[2:0]), | |
928 | .si({scan_in,so[1:0]}), | |
929 | .so({so[1:0],scan_out}), | |
930 | .q(dout[2:0]) | |
931 | ); | |
932 | ||
933 | ||
934 | ||
935 | ||
936 | ||
937 | ||
938 | ||
939 | ||
940 | ||
941 | ||
942 | ||
943 | ||
944 | endmodule | |
945 | ||
946 | ||
947 | ||
948 | ||
949 | ||
950 | ||
951 | ||
952 | ||
953 | ||
954 | ||
955 | ||
956 | ||
957 | ||
958 | // any PARAMS parms go into naming of macro | |
959 | ||
960 | module ncu_c2ifcd_ctl_msff_ctl_macro__width_8 ( | |
961 | din, | |
962 | l1clk, | |
963 | scan_in, | |
964 | siclk, | |
965 | soclk, | |
966 | dout, | |
967 | scan_out); | |
968 | wire [7:0] fdin; | |
969 | wire [6:0] so; | |
970 | ||
971 | input [7:0] din; | |
972 | input l1clk; | |
973 | input scan_in; | |
974 | ||
975 | ||
976 | input siclk; | |
977 | input soclk; | |
978 | ||
979 | output [7:0] dout; | |
980 | output scan_out; | |
981 | assign fdin[7:0] = din[7:0]; | |
982 | ||
983 | ||
984 | ||
985 | ||
986 | ||
987 | ||
988 | dff #(8) d0_0 ( | |
989 | .l1clk(l1clk), | |
990 | .siclk(siclk), | |
991 | .soclk(soclk), | |
992 | .d(fdin[7:0]), | |
993 | .si({scan_in,so[6:0]}), | |
994 | .so({so[6:0],scan_out}), | |
995 | .q(dout[7:0]) | |
996 | ); | |
997 | ||
998 | ||
999 | ||
1000 | ||
1001 | ||
1002 | ||
1003 | ||
1004 | ||
1005 | ||
1006 | ||
1007 | ||
1008 | ||
1009 | endmodule | |
1010 | ||
1011 | ||
1012 | ||
1013 | ||
1014 | ||
1015 | ||
1016 | ||
1017 | ||
1018 | ||
1019 | ||
1020 | ||
1021 | ||
1022 | ||
1023 | // any PARAMS parms go into naming of macro | |
1024 | ||
1025 | module ncu_c2ifcd_ctl_msff_ctl_macro__width_64 ( | |
1026 | din, | |
1027 | l1clk, | |
1028 | scan_in, | |
1029 | siclk, | |
1030 | soclk, | |
1031 | dout, | |
1032 | scan_out); | |
1033 | wire [63:0] fdin; | |
1034 | wire [62:0] so; | |
1035 | ||
1036 | input [63:0] din; | |
1037 | input l1clk; | |
1038 | input scan_in; | |
1039 | ||
1040 | ||
1041 | input siclk; | |
1042 | input soclk; | |
1043 | ||
1044 | output [63:0] dout; | |
1045 | output scan_out; | |
1046 | assign fdin[63:0] = din[63:0]; | |
1047 | ||
1048 | ||
1049 | ||
1050 | ||
1051 | ||
1052 | ||
1053 | dff #(64) d0_0 ( | |
1054 | .l1clk(l1clk), | |
1055 | .siclk(siclk), | |
1056 | .soclk(soclk), | |
1057 | .d(fdin[63:0]), | |
1058 | .si({scan_in,so[62:0]}), | |
1059 | .so({so[62:0],scan_out}), | |
1060 | .q(dout[63:0]) | |
1061 | ); | |
1062 | ||
1063 | ||
1064 | ||
1065 | ||
1066 | ||
1067 | ||
1068 | ||
1069 | ||
1070 | ||
1071 | ||
1072 | ||
1073 | ||
1074 | endmodule | |
1075 | ||
1076 | ||
1077 | ||
1078 | ||
1079 | ||
1080 | // any PARAMS parms go into naming of macro | |
1081 | ||
1082 | module ncu_c2ifcd_ctl_msff_ctl_macro__width_122 ( | |
1083 | din, | |
1084 | l1clk, | |
1085 | scan_in, | |
1086 | siclk, | |
1087 | soclk, | |
1088 | dout, | |
1089 | scan_out); | |
1090 | wire [121:0] fdin; | |
1091 | wire [120:0] so; | |
1092 | ||
1093 | input [121:0] din; | |
1094 | input l1clk; | |
1095 | input scan_in; | |
1096 | ||
1097 | ||
1098 | input siclk; | |
1099 | input soclk; | |
1100 | ||
1101 | output [121:0] dout; | |
1102 | output scan_out; | |
1103 | assign fdin[121:0] = din[121:0]; | |
1104 | ||
1105 | ||
1106 | ||
1107 | ||
1108 | ||
1109 | ||
1110 | dff #(122) d0_0 ( | |
1111 | .l1clk(l1clk), | |
1112 | .siclk(siclk), | |
1113 | .soclk(soclk), | |
1114 | .d(fdin[121:0]), | |
1115 | .si({scan_in,so[120:0]}), | |
1116 | .so({so[120:0],scan_out}), | |
1117 | .q(dout[121:0]) | |
1118 | ); | |
1119 | ||
1120 | ||
1121 | ||
1122 | ||
1123 | ||
1124 | ||
1125 | ||
1126 | ||
1127 | ||
1128 | ||
1129 | ||
1130 | ||
1131 | endmodule | |
1132 | ||
1133 | ||
1134 | ||
1135 | ||
1136 | ||
1137 | ||
1138 | ||
1139 |