Commit | Line | Data |
---|---|---|
86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: ncu_c2iscd_ctl.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module ncu_c2iscd_ctl ( | |
36 | bounce_ack_rd, | |
37 | ccu_ncu_stall, | |
38 | core_running_status, | |
39 | cpubuf_dout, | |
40 | cpubuf_tail_f, | |
41 | dmu_ncu_stall, | |
42 | dmu_ncu_wrack_tag, | |
43 | dmu_ncu_wrack_vld, | |
44 | dmu_ncu_wrack_par, | |
45 | efu_ncu_bankavail_dshift, | |
46 | efu_ncu_coreavail_dshift, | |
47 | efu_ncu_fuse_data, | |
48 | efu_ncu_fusestat_dshift, | |
49 | efu_ncu_sernum0_dshift, | |
50 | efu_ncu_sernum1_dshift, | |
51 | efu_ncu_sernum2_dshift, | |
52 | intman_tbl_dout, | |
53 | dmubuf0_dout, | |
54 | dmubuf1_dout, | |
55 | iobuf_avail, | |
56 | io_intman_addr, | |
57 | iol2clk, | |
58 | mcu0_ncu_stall, | |
59 | mcu1_ncu_stall, | |
60 | mcu2_ncu_stall, | |
61 | mcu3_ncu_stall, | |
62 | ncu_int_ack_rd, | |
63 | ncu_man_ack_rd, | |
64 | ncu_man_int_rd, | |
65 | niu_ncu_stall, | |
66 | rcu_ncu_stall, | |
67 | rd_nack_rd, | |
68 | aclk_wmr, | |
69 | wmr_protect, | |
70 | dbg1_ncu_stall, | |
71 | rst_ncu_unpark_thread, | |
72 | rst_ncu_xir_, | |
73 | scan_in, | |
74 | sii_cr_id_rtn, | |
75 | sii_cr_id_rtn_vld, | |
76 | ssi_ncu_stall, | |
77 | tap_mondo_acc_addr_invld_d2_f, | |
78 | tap_mondo_acc_seq_d2_f, | |
79 | tap_mondo_dout_d2_f, | |
80 | tcu_ncu_data, | |
81 | tcu_aclk, | |
82 | tcu_bclk, | |
83 | tcu_clk_stop, | |
84 | tcu_ncu_vld, | |
85 | tcu_pce_ov, | |
86 | tcu_scan_en, | |
87 | tcu_dbr_gateoff, | |
88 | mb0_addr, | |
89 | mb0_wdata, | |
90 | mb0_run, | |
91 | mb0_iobuf_wr_en, | |
92 | tcu_mbist_bisi_en, | |
93 | mb1_run, | |
94 | mb1_addr, | |
95 | mb1_wdata, | |
96 | mb1_cpubuf_wr_en, | |
97 | mb1_scanout, | |
98 | mb1_done, | |
99 | mb1_fail, | |
100 | mb1_start, | |
101 | mb1_scanin, | |
102 | tcu_mbist_user_mode, | |
103 | ncu_rst_fatal_error, | |
104 | ncu_tcu_soc_error, | |
105 | raserrce, | |
106 | raserrue, | |
107 | dmu_ncu_d_pe, | |
108 | ncu_dmu_d_pei, | |
109 | dmu_ncu_siicr_pe, | |
110 | ncu_dmu_siicr_pei, | |
111 | dmu_ncu_ctag_ue, | |
112 | ncu_dmu_ctag_uei, | |
113 | dmu_ncu_ctag_ce, | |
114 | ncu_dmu_ctag_cei, | |
115 | dmu_ncu_ncucr_pe, | |
116 | ncu_dmu_ncucr_pei, | |
117 | dmu_ncu_ie, | |
118 | ncu_dmu_iei, | |
119 | niu_ncu_d_pe, | |
120 | ncu_niu_d_pei, | |
121 | niu_ncu_ctag_ue, | |
122 | ncu_niu_ctag_uei, | |
123 | niu_ncu_ctag_ce, | |
124 | ncu_niu_ctag_cei, | |
125 | sio_ncu_ctag_ce, | |
126 | ncu_sio_ctag_cei, | |
127 | sio_ncu_ctag_ue, | |
128 | ncu_sio_ctag_uei, | |
129 | ncu_sio_d_pei, | |
130 | sii_ncu_dmuctag_ce, | |
131 | ncu_sii_dmuctag_cei, | |
132 | sii_ncu_dmuctag_ue, | |
133 | ncu_sii_dmuctag_uei, | |
134 | sii_ncu_dmua_pe, | |
135 | ncu_sii_dmua_pei, | |
136 | sii_ncu_dmud_pe, | |
137 | ncu_sii_dmud_pei, | |
138 | sii_ncu_niuctag_ce, | |
139 | ncu_sii_niuctag_cei, | |
140 | sii_ncu_niuctag_ue, | |
141 | ncu_sii_niuctag_uei, | |
142 | sii_ncu_niua_pe, | |
143 | ncu_sii_niua_pei, | |
144 | sii_ncu_niud_pe, | |
145 | ncu_sii_niud_pei, | |
146 | mcu0_ncu_ecc, | |
147 | ncu_mcu0_ecci, | |
148 | mcu0_ncu_fbr, | |
149 | ncu_mcu0_fbri, | |
150 | mcu0_ncu_fbu, | |
151 | ncu_mcu0_fbui, | |
152 | mcu1_ncu_ecc, | |
153 | ncu_mcu1_ecci, | |
154 | mcu1_ncu_fbr, | |
155 | ncu_mcu1_fbri, | |
156 | mcu1_ncu_fbu, | |
157 | ncu_mcu1_fbui, | |
158 | mcu2_ncu_ecc, | |
159 | ncu_mcu2_ecci, | |
160 | mcu2_ncu_fbr, | |
161 | ncu_mcu2_fbri, | |
162 | mcu2_ncu_fbu, | |
163 | ncu_mcu2_fbui, | |
164 | mcu3_ncu_ecc, | |
165 | ncu_mcu3_ecci, | |
166 | mcu3_ncu_fbr, | |
167 | ncu_mcu3_fbri, | |
168 | mcu3_ncu_fbu, | |
169 | ncu_mcu3_fbui, | |
170 | siierrsyn, | |
171 | siierrsyn_done, | |
172 | io_rd_intman_d2, | |
173 | ncuctag_ue, | |
174 | ncuctag_uei, | |
175 | ncuctag_ce, | |
176 | ncuctag_cei, | |
177 | ncusiid_pe, | |
178 | ncusiid_pei, | |
179 | ncudpsyn, | |
180 | iobuf_ue_f, | |
181 | iobuf_uei, | |
182 | intbuf_ue_f, | |
183 | intbuf_uei, | |
184 | mondotbl_pe_f, | |
185 | mondotbl_pei, | |
186 | bounce_ack_packet, | |
187 | bounce_ack_vld, | |
188 | ncu_spc7_core_enable_status, | |
189 | ncu_spc6_core_enable_status, | |
190 | ncu_spc5_core_enable_status, | |
191 | ncu_spc4_core_enable_status, | |
192 | ncu_spc3_core_enable_status, | |
193 | ncu_spc2_core_enable_status, | |
194 | ncu_spc1_core_enable_status, | |
195 | ncu_spc0_core_enable_status, | |
196 | core_running, | |
197 | coreavail, | |
198 | cpubuf_head_ptr, | |
199 | cpubuf_head_s, | |
200 | cpubuf_rden, | |
201 | intman_pchkf2i2c, | |
202 | intman_tbl_raddr, | |
203 | intman_tbl_waddr, | |
204 | intman_tbl_din, | |
205 | intman_tbl_rden, | |
206 | intman_tbl_wr, | |
207 | dmubuf_din, | |
208 | dmubuf_raddr, | |
209 | dmubuf_waddr, | |
210 | dmubuf_rden, | |
211 | dmubuf0_wr, | |
212 | dmubuf1_wr, | |
213 | l2pm, | |
214 | ncu_spc_pm, | |
215 | ncu_spc_ba01, | |
216 | l2idxhs_en_status, | |
217 | lhs_intman_acc, | |
218 | mondoinvec, | |
219 | ncu_ccu_data, | |
220 | ncu_ccu_vld, | |
221 | ncu_dmu_data, | |
222 | ncu_dmu_mmu_addr_vld, | |
223 | ncu_dmu_dpar, | |
224 | ncu_dmu_pio_data, | |
225 | ncu_dmu_pio_hdr_vld, | |
226 | ncu_dmu_vld, | |
227 | ncu_int_ack_packet, | |
228 | ncu_int_ack_vld, | |
229 | ncu_man_ack_packet, | |
230 | ncu_man_ack_vld, | |
231 | ncu_man_int_packet, | |
232 | ncu_man_int_vld, | |
233 | ncu_mcu0_data, | |
234 | ncu_mcu0_vld, | |
235 | ncu_mcu1_data, | |
236 | ncu_mcu1_vld, | |
237 | ncu_mcu2_data, | |
238 | ncu_mcu2_vld, | |
239 | ncu_mcu3_data, | |
240 | ncu_mcu3_vld, | |
241 | ncu_niu_data, | |
242 | ncu_niu_vld, | |
243 | ncu_rcu_data, | |
244 | ncu_rcu_vld, | |
245 | ncu_dbg1_data, | |
246 | ncu_dbg1_vld, | |
247 | ncu_rst_xir_done, | |
248 | ncu_ssi_data, | |
249 | ncu_ssi_vld, | |
250 | ncu_tcu_stall, | |
251 | ncu_tcu_bank_avail, | |
252 | rd_nack_packet, | |
253 | rd_nack_vld, | |
254 | scan_out, | |
255 | srvc_wr_ack, | |
256 | tap_mondo_acc_addr_s, | |
257 | tap_mondo_acc_seq_s, | |
258 | tap_mondo_din_s, | |
259 | tap_mondo_wr_s, | |
260 | wr_ack_iopkt, | |
261 | cpubuf_mb0_data, | |
262 | dmupio_wack_iopkt, | |
263 | dmupio_srvc_wack, | |
264 | ncu_dbg1_error_event, | |
265 | tcu_wmr_vec_mask, | |
266 | cmp_tick_enable, | |
267 | ncu_scksel) ; | |
268 | wire pas; | |
269 | wire pa_ld; | |
270 | wire cpubuf_rd; | |
271 | wire [3:0] cpu_packet_type; | |
272 | wire [2:0] cpu_packet_size; | |
273 | wire cpubuf_pe; | |
274 | wire cpubuf_ue; | |
275 | wire c2i_packet_vld; | |
276 | wire c2i_packet_is_rd_req; | |
277 | wire c2i_packet_is_wr_req; | |
278 | wire dmupio_ucb_sel; | |
279 | wire [1:0] com_map; | |
280 | wire [11:0] dmupio_addr35to24; | |
281 | wire dmucsr_ucb_sel; | |
282 | wire ssi_ucb_sel; | |
283 | wire mcu0_ucb_sel; | |
284 | wire mcu1_ucb_sel; | |
285 | wire mcu2_ucb_sel; | |
286 | wire mcu3_ucb_sel; | |
287 | wire ccu_ucb_sel; | |
288 | wire rcu_ucb_sel; | |
289 | wire dbg1_ucb_sel; | |
290 | wire niu_ucb_sel; | |
291 | wire ncu_man_ucb_sel; | |
292 | wire ncu_int_ucb_sel; | |
293 | wire bounce_ucb_sel; | |
294 | wire rd_nack_ucb_sel; | |
295 | wire iob_tap_busy; | |
296 | wire tap_sel; | |
297 | wire ncu_c2isc_ctl_scanin; | |
298 | wire ncu_c2isc_ctl_scanout; | |
299 | wire [128:0] pcx_packet; | |
300 | wire pcx_packet_ue; | |
301 | wire pcx_packet_pe; | |
302 | wire [39:0] c2i_packet_addr; | |
303 | wire [11:0] mem32_base; | |
304 | wire [11:0] mem32_mask; | |
305 | wire mem32_en; | |
306 | wire [11:0] mem64_base; | |
307 | wire [11:0] mem64_mask; | |
308 | wire mem64_en; | |
309 | wire [11:0] iocon_base; | |
310 | wire [11:0] iocon_mask; | |
311 | wire iocon_en; | |
312 | wire dmupio_ucb_buf_acpt; | |
313 | wire dmucsr_ucb_buf_acpt; | |
314 | wire ssi_ucb_buf_acpt; | |
315 | wire mcu0_ucb_buf_acpt; | |
316 | wire mcu1_ucb_buf_acpt; | |
317 | wire mcu2_ucb_buf_acpt; | |
318 | wire mcu3_ucb_buf_acpt; | |
319 | wire ccu_ucb_buf_acpt; | |
320 | wire rcu_ucb_buf_acpt; | |
321 | wire dbg1_ucb_buf_acpt; | |
322 | wire niu_ucb_buf_acpt; | |
323 | wire ncu_man_ucb_buf_acpt; | |
324 | wire ncu_int_ucb_buf_acpt; | |
325 | wire bounce_ucb_buf_acpt; | |
326 | wire rd_nack_ucb_buf_acpt; | |
327 | wire c2i_wait; | |
328 | wire tap_iob_packet_vld; | |
329 | wire [127:0] tap_iob_packet; | |
330 | wire [63:0] mmufsh_data; | |
331 | wire mmufsh_vld; | |
332 | wire dmu_cr_id_rtn_erri; | |
333 | wire dmubuf_pei; | |
334 | wire cpubuf_uei; | |
335 | wire cpubuf_pei; | |
336 | wire ncu_ctrl_ctl_scanin; | |
337 | wire ncu_ctrl_ctl_scanout; | |
338 | wire [127:0] c2i_packet; | |
339 | wire [63:0] c2i_rd_nack_packet; | |
340 | wire mmu_ld; | |
341 | wire mb1_intman_wr_en; | |
342 | wire mb1_intman_rd_en; | |
343 | wire dmu_cr_id_rtn_err; | |
344 | wire dmubuf_pue; | |
345 | wire [46:0] dmubufsyn; | |
346 | wire [50:0] cpubufsyn; | |
347 | wire mb1_dmubuf0_wr_en; | |
348 | wire mb1_dmubuf0_rd_en; | |
349 | wire mb1_dmubuf1_wr_en; | |
350 | wire mb1_dmubuf1_rd_en; | |
351 | wire mb1_cpubuf_rd_en; | |
352 | wire ncu_c2isd_ctl_scanin; | |
353 | wire ncu_c2isd_ctl_scanout; | |
354 | wire dmupio_ucb_buf_scanin; | |
355 | wire dmupio_ucb_buf_scanout; | |
356 | wire dmucsr_ucb_buf_scanin; | |
357 | wire dmucsr_ucb_buf_scanout; | |
358 | wire ssi_ucb_buf_scanin; | |
359 | wire ssi_ucb_buf_scanout; | |
360 | wire mcu0_ucb_buf_scanin; | |
361 | wire mcu0_ucb_buf_scanout; | |
362 | wire mcu1_ucb_buf_scanin; | |
363 | wire mcu1_ucb_buf_scanout; | |
364 | wire mcu2_ucb_buf_scanin; | |
365 | wire mcu2_ucb_buf_scanout; | |
366 | wire mcu3_ucb_buf_scanin; | |
367 | wire mcu3_ucb_buf_scanout; | |
368 | wire ccu_ucb_buf_scanin; | |
369 | wire ccu_ucb_buf_scanout; | |
370 | wire rcu_ucb_buf_scanin; | |
371 | wire rcu_ucb_buf_scanout; | |
372 | wire dbg1_ucb_buf_scanin; | |
373 | wire dbg1_ucb_buf_scanout; | |
374 | wire niu_ucb_buf_scanin; | |
375 | wire niu_ucb_buf_scanout; | |
376 | wire tcu_ucb_buf_scanin; | |
377 | wire tcu_ucb_buf_scanout; | |
378 | ||
379 | ||
380 | input bounce_ack_rd; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
381 | input ccu_ncu_stall; // To ccu_ucb_buf of ncu_c2ibuf4_ctl.v | |
382 | input [63:0] core_running_status; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
383 | input [143:0] cpubuf_dout; // To ncu_c2isd_ctl of ncu_c2isd_ctl.v | |
384 | input [5:0] cpubuf_tail_f; // To ncu_c2isc_ctl of ncu_c2isc_ctl.v | |
385 | input dmu_ncu_stall; // To dmucsr_ucb_buf of ncu_c2ibuf32_ctl.v | |
386 | input [3:0] dmu_ncu_wrack_tag; // To dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
387 | input dmu_ncu_wrack_vld; // To dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
388 | input dmu_ncu_wrack_par; // to ncu_c2ibufpio_ctl.sv | |
389 | input efu_ncu_bankavail_dshift;// To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
390 | input efu_ncu_coreavail_dshift;// To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
391 | //input efu_ncu_fuse_clk1; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
392 | input efu_ncu_fuse_data; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
393 | input efu_ncu_fusestat_dshift;// To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
394 | input efu_ncu_sernum0_dshift; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
395 | input efu_ncu_sernum1_dshift; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
396 | input efu_ncu_sernum2_dshift; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
397 | input [15:0] intman_tbl_dout; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
398 | input [143:0] dmubuf0_dout; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
399 | input [143:0] dmubuf1_dout; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
400 | input iobuf_avail; // To ncu_c2isc_ctl of ncu_c2isc_ctl.v | |
401 | input [6:0] io_intman_addr; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
402 | input iol2clk; // To ncu_c2isc_ctl of ncu_c2isc_ctl.v, ... | |
403 | input mcu0_ncu_stall; // To mcu0_ucb_buf of ncu_c2ibuf4_ctl.v | |
404 | input mcu1_ncu_stall; // To mcu1_ucb_buf of ncu_c2ibuf4_ctl.v | |
405 | input mcu2_ncu_stall; // To mcu2_ucb_buf of ncu_c2ibuf4_ctl.v | |
406 | input mcu3_ncu_stall; // To mcu3_ucb_buf of ncu_c2ibuf4_ctl.v | |
407 | input ncu_int_ack_rd; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
408 | input ncu_man_ack_rd; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
409 | input ncu_man_int_rd; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
410 | input niu_ncu_stall; // To niu_ucb_buf of ncu_c2ibuf32_ctl.v | |
411 | input rcu_ncu_stall; // To rcu_ucb_buf of ncu_c2ibuf4_ctl.v | |
412 | input rd_nack_rd; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
413 | //input rng_ncu_stall; // To rng_ucb_buf of ncu_c2ibuf4_ctl.v | |
414 | input aclk_wmr; | |
415 | input wmr_protect; | |
416 | input dbg1_ncu_stall; // To dbg1_ucb_buf of ncu_c2ibuf4_ctl.v | |
417 | input rst_ncu_unpark_thread; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
418 | input rst_ncu_xir_; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
419 | input scan_in; // To ncu_c2isc_ctl of ncu_c2isc_ctl.v | |
420 | input [3:0] sii_cr_id_rtn; // To dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
421 | input sii_cr_id_rtn_vld; // To dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
422 | input ssi_ncu_stall; // To ssi_ucb_buf of ncu_c2ibuf4_ctl.v | |
423 | input tap_mondo_acc_addr_invld_d2_f;// To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
424 | input tap_mondo_acc_seq_d2_f; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
425 | input [63:0] tap_mondo_dout_d2_f; // To ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
426 | input [7:0] tcu_ncu_data; // To tcu_ucb_buf of ncu_ucbbusin8_ctl.v | |
427 | ||
428 | input tcu_aclk; // To ncu_c2isc_ctl of ncu_c2isc_ctl.v, ... | |
429 | input tcu_bclk; // To ncu_c2isc_ctl of ncu_c2isc_ctl.v, ... | |
430 | input tcu_clk_stop; // To ncu_c2isc_ctl of ncu_c2isc_ctl.v, ... | |
431 | input tcu_ncu_vld; // To tcu_ucb_buf of ncu_ucbbusin8_ctl.v | |
432 | input tcu_pce_ov; // To ncu_c2isc_ctl of ncu_c2isc_ctl.v, ... | |
433 | input tcu_scan_en; // To ncu_c2isc_ctl of ncu_c2isc_ctl.v, ... | |
434 | input tcu_dbr_gateoff; | |
435 | //input mb0_cpubuf_wr_en; | |
436 | input [5:0] mb0_addr; | |
437 | input [7:0] mb0_wdata; | |
438 | input mb0_run; | |
439 | input mb0_iobuf_wr_en; | |
440 | input tcu_mbist_bisi_en; | |
441 | output mb1_run; | |
442 | output [6:0] mb1_addr; | |
443 | output [7:0] mb1_wdata; | |
444 | output mb1_cpubuf_wr_en; | |
445 | ||
446 | //mb1 connection from tcu// | |
447 | output mb1_scanout; | |
448 | output mb1_done; | |
449 | output mb1_fail; | |
450 | input mb1_start; | |
451 | input mb1_scanin; | |
452 | input tcu_mbist_user_mode; | |
453 | ||
454 | // err ecc // | |
455 | output ncu_rst_fatal_error; | |
456 | output ncu_tcu_soc_error; | |
457 | output raserrce; | |
458 | output raserrue; | |
459 | ||
460 | input dmu_ncu_d_pe; | |
461 | output ncu_dmu_d_pei; | |
462 | input dmu_ncu_siicr_pe; | |
463 | output ncu_dmu_siicr_pei; | |
464 | input dmu_ncu_ctag_ue; | |
465 | output ncu_dmu_ctag_uei; | |
466 | input dmu_ncu_ctag_ce; | |
467 | output ncu_dmu_ctag_cei; | |
468 | input dmu_ncu_ncucr_pe; | |
469 | output ncu_dmu_ncucr_pei; | |
470 | input dmu_ncu_ie; | |
471 | output ncu_dmu_iei; | |
472 | ||
473 | input niu_ncu_d_pe; | |
474 | output ncu_niu_d_pei; | |
475 | input niu_ncu_ctag_ue; | |
476 | output ncu_niu_ctag_uei; | |
477 | input niu_ncu_ctag_ce; | |
478 | output ncu_niu_ctag_cei; | |
479 | ||
480 | input sio_ncu_ctag_ce; | |
481 | output ncu_sio_ctag_cei; | |
482 | input sio_ncu_ctag_ue; | |
483 | output ncu_sio_ctag_uei; | |
484 | //input sio_ncu_d_pe; | |
485 | output ncu_sio_d_pei; | |
486 | ||
487 | input sii_ncu_dmuctag_ce; | |
488 | output ncu_sii_dmuctag_cei; | |
489 | input sii_ncu_dmuctag_ue; | |
490 | output ncu_sii_dmuctag_uei; | |
491 | input sii_ncu_dmua_pe; | |
492 | output ncu_sii_dmua_pei; | |
493 | input sii_ncu_dmud_pe; | |
494 | output ncu_sii_dmud_pei; | |
495 | input sii_ncu_niuctag_ce; | |
496 | output ncu_sii_niuctag_cei; | |
497 | input sii_ncu_niuctag_ue; | |
498 | output ncu_sii_niuctag_uei; | |
499 | input sii_ncu_niua_pe; | |
500 | output ncu_sii_niua_pei; | |
501 | input sii_ncu_niud_pe; | |
502 | output ncu_sii_niud_pei; | |
503 | ||
504 | input mcu0_ncu_ecc; | |
505 | output ncu_mcu0_ecci; | |
506 | input mcu0_ncu_fbr; | |
507 | output ncu_mcu0_fbri; | |
508 | input mcu0_ncu_fbu; | |
509 | output ncu_mcu0_fbui; | |
510 | ||
511 | input mcu1_ncu_ecc; | |
512 | output ncu_mcu1_ecci; | |
513 | input mcu1_ncu_fbr; | |
514 | output ncu_mcu1_fbri; | |
515 | input mcu1_ncu_fbu; | |
516 | output ncu_mcu1_fbui; | |
517 | ||
518 | input mcu2_ncu_ecc; | |
519 | output ncu_mcu2_ecci; | |
520 | input mcu2_ncu_fbr; | |
521 | output ncu_mcu2_fbri; | |
522 | input mcu2_ncu_fbu; | |
523 | output ncu_mcu2_fbui; | |
524 | ||
525 | input mcu3_ncu_ecc; | |
526 | output ncu_mcu3_ecci; | |
527 | input mcu3_ncu_fbr; | |
528 | output ncu_mcu3_fbri; | |
529 | input mcu3_ncu_fbu; | |
530 | output ncu_mcu3_fbui; | |
531 | ||
532 | ||
533 | input [63:0] siierrsyn; | |
534 | input siierrsyn_done; | |
535 | ||
536 | input io_rd_intman_d2; | |
537 | input ncuctag_ue; | |
538 | output ncuctag_uei; | |
539 | input ncuctag_ce; | |
540 | output ncuctag_cei; | |
541 | input ncusiid_pe; | |
542 | output ncusiid_pei; | |
543 | input [15:0] ncudpsyn; | |
544 | ||
545 | input iobuf_ue_f; | |
546 | output iobuf_uei; | |
547 | input intbuf_ue_f; | |
548 | output intbuf_uei; | |
549 | input mondotbl_pe_f; | |
550 | output mondotbl_pei; | |
551 | ||
552 | ||
553 | ||
554 | output [127:0] bounce_ack_packet; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
555 | output bounce_ack_vld; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
556 | //output [7:0] core_enable_status; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
557 | output ncu_spc7_core_enable_status; | |
558 | output ncu_spc6_core_enable_status; | |
559 | output ncu_spc5_core_enable_status; | |
560 | output ncu_spc4_core_enable_status; | |
561 | output ncu_spc3_core_enable_status; | |
562 | output ncu_spc2_core_enable_status; | |
563 | output ncu_spc1_core_enable_status; | |
564 | output ncu_spc0_core_enable_status; | |
565 | ||
566 | output [63:0] core_running; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
567 | output [7:0] coreavail; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
568 | output [4:0] cpubuf_head_ptr; // From ncu_c2isc_ctl of ncu_c2isc_ctl.v | |
569 | output [5:0] cpubuf_head_s; // From ncu_c2isc_ctl of ncu_c2isc_ctl.v | |
570 | output cpubuf_rden; // From ncu_c2isc_ctl of ncu_c2isc_ctl.v | |
571 | output intman_pchkf2i2c; | |
572 | output [6:0] intman_tbl_raddr; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
573 | output [6:0] intman_tbl_waddr; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
574 | output [15:0] intman_tbl_din; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
575 | output intman_tbl_rden; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
576 | output intman_tbl_wr; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
577 | output [143:0] dmubuf_din; | |
578 | output [4:0] dmubuf_raddr; | |
579 | output [4:0] dmubuf_waddr; | |
580 | output dmubuf_rden; | |
581 | output dmubuf0_wr; | |
582 | output dmubuf1_wr; | |
583 | output [4:0] l2pm; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
584 | output ncu_spc_pm; | |
585 | output ncu_spc_ba01; | |
586 | output l2idxhs_en_status; | |
587 | output lhs_intman_acc; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
588 | output [5:0] mondoinvec; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
589 | output [3:0] ncu_ccu_data; // From ccu_ucb_buf of ncu_c2ibuf4_ctl.v | |
590 | output ncu_ccu_vld; // From ccu_ucb_buf of ncu_c2ibuf4_ctl.v | |
591 | output [31:0] ncu_dmu_data; // From dmucsr_ucb_buf of ncu_c2ibuf32_ctl.v | |
592 | output ncu_dmu_mmu_addr_vld; // From dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
593 | output [1:0] ncu_dmu_dpar; // From dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
594 | output [63:0] ncu_dmu_pio_data; // From dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
595 | output ncu_dmu_pio_hdr_vld; // From dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
596 | output ncu_dmu_vld; // From dmucsr_ucb_buf of ncu_c2ibuf32_ctl.v | |
597 | output [127:0] ncu_int_ack_packet; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
598 | output ncu_int_ack_vld; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
599 | output [127:0] ncu_man_ack_packet; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
600 | output ncu_man_ack_vld; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
601 | output [24:0] ncu_man_int_packet; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
602 | output ncu_man_int_vld; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
603 | output [3:0] ncu_mcu0_data; // From mcu0_ucb_buf of ncu_c2ibuf4_ctl.v | |
604 | output ncu_mcu0_vld; // From mcu0_ucb_buf of ncu_c2ibuf4_ctl.v | |
605 | output [3:0] ncu_mcu1_data; // From mcu1_ucb_buf of ncu_c2ibuf4_ctl.v | |
606 | output ncu_mcu1_vld; // From mcu1_ucb_buf of ncu_c2ibuf4_ctl.v | |
607 | output [3:0] ncu_mcu2_data; // From mcu2_ucb_buf of ncu_c2ibuf4_ctl.v | |
608 | output ncu_mcu2_vld; // From mcu2_ucb_buf of ncu_c2ibuf4_ctl.v | |
609 | output [3:0] ncu_mcu3_data; // From mcu3_ucb_buf of ncu_c2ibuf4_ctl.v | |
610 | output ncu_mcu3_vld; // From mcu3_ucb_buf of ncu_c2ibuf4_ctl.v | |
611 | output [31:0] ncu_niu_data; // From niu_ucb_buf of ncu_c2ibuf32_ctl.v | |
612 | output ncu_niu_vld; // From niu_ucb_buf of ncu_c2ibuf32_ctl.v | |
613 | output [3:0] ncu_rcu_data; // From rcu_ucb_buf of ncu_c2ibuf4_ctl.v | |
614 | output ncu_rcu_vld; // From rcu_ucb_buf of ncu_c2ibuf4_ctl.v | |
615 | //output [3:0] ncu_rng_data; // From rng_ucb_buf of ncu_c2ibuf4_ctl.v | |
616 | //output ncu_rng_vld; // From rng_ucb_buf of ncu_c2ibuf4_ctl.v | |
617 | output [3:0] ncu_dbg1_data; // From dbg1_ucb_buf of ncu_c2ibuf4_ctl.v | |
618 | output ncu_dbg1_vld; // From dbg1_ucb_buf of ncu_c2ibuf4_ctl.v | |
619 | output ncu_rst_xir_done; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
620 | output [3:0] ncu_ssi_data; // From ssi_ucb_buf of ncu_c2ibuf4_ctl.v | |
621 | output ncu_ssi_vld; // From ssi_ucb_buf of ncu_c2ibuf4_ctl.v | |
622 | output ncu_tcu_stall; // From tcu_ucb_buf of ncu_ucbbusin8_ctl.v | |
623 | output [7:0] ncu_tcu_bank_avail; // from ncu_ctrl_ctl | |
624 | //output [3:0] ncu_tcu_bank_en_status; // from ncu_ctrl_ctl | |
625 | output [63:0] rd_nack_packet; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
626 | output rd_nack_vld; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
627 | output scan_out; // From tcu_ucb_buf of ncu_ucbbusin8_ctl.v | |
628 | output srvc_wr_ack; // From ncu_c2isc_ctl of ncu_c2isc_ctl.v | |
629 | output [21:0] tap_mondo_acc_addr_s; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
630 | output tap_mondo_acc_seq_s; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
631 | output [63:0] tap_mondo_din_s; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
632 | output tap_mondo_wr_s; // From ncu_ctrl_ctl of ncu_ctrl_ctl.v | |
633 | output [152:0] wr_ack_iopkt; // From ncu_c2isd_ctl of ncu_c2isd_ctl.v | |
634 | output [7:0] cpubuf_mb0_data; | |
635 | output [152:0] dmupio_wack_iopkt; // From dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
636 | output dmupio_srvc_wack; // From dmupio_ucb_buf of ncu_c2ibufpio_ctl.v | |
637 | output ncu_dbg1_error_event; // from ncu_ctrl_ctl.sv | |
638 | output tcu_wmr_vec_mask; | |
639 | output cmp_tick_enable; | |
640 | output [1:0] ncu_scksel; | |
641 | ||
642 | /*autowire*/ | |
643 | // Beginning of automatic wires (for undeclared instantiated-module outputs) | |
644 | // End of automatics | |
645 | ||
646 | ||
647 | ||
648 | /***************************************************************** | |
649 | * cpu-to-io slow control | |
650 | *****************************************************************/ | |
651 | ///* ncu_c2isc_ctl auto_template ( | |
652 | // .scan_in (ncu_c2isc_ctl_scanin), | |
653 | // .scan_out(ncu_c2isc_ctl_scanout) ); */ | |
654 | ncu_c2isc_ctl ncu_c2isc_ctl ( /*AUTOINST*/ | |
655 | // Outputs | |
656 | .pas (pas), | |
657 | .pa_ld (pa_ld), | |
658 | .cpubuf_rd (cpubuf_rd), | |
659 | .cpu_packet_type(cpu_packet_type[3:0]), | |
660 | .cpu_packet_size(cpu_packet_size[2:0]), | |
661 | .cpubuf_head_s(cpubuf_head_s[5:0]), | |
662 | .cpubuf_head_ptr(cpubuf_head_ptr[4:0]), | |
663 | .cpubuf_rden(cpubuf_rden), | |
664 | .cpubuf_pe (cpubuf_pe), | |
665 | .cpubuf_ue (cpubuf_ue), | |
666 | .c2i_packet_vld(c2i_packet_vld), | |
667 | .c2i_packet_is_rd_req(c2i_packet_is_rd_req), | |
668 | .c2i_packet_is_wr_req(c2i_packet_is_wr_req), | |
669 | .dmupio_ucb_sel(dmupio_ucb_sel), | |
670 | .com_map (com_map[1:0]), | |
671 | .dmupio_addr35to24(dmupio_addr35to24[11:0]), | |
672 | .dmucsr_ucb_sel(dmucsr_ucb_sel), | |
673 | .ssi_ucb_sel(ssi_ucb_sel), | |
674 | .mcu0_ucb_sel(mcu0_ucb_sel), | |
675 | .mcu1_ucb_sel(mcu1_ucb_sel), | |
676 | .mcu2_ucb_sel(mcu2_ucb_sel), | |
677 | .mcu3_ucb_sel(mcu3_ucb_sel), | |
678 | .ccu_ucb_sel(ccu_ucb_sel), | |
679 | .rcu_ucb_sel(rcu_ucb_sel), | |
680 | .dbg1_ucb_sel(dbg1_ucb_sel), | |
681 | .niu_ucb_sel(niu_ucb_sel), | |
682 | .ncu_man_ucb_sel(ncu_man_ucb_sel), | |
683 | .ncu_int_ucb_sel(ncu_int_ucb_sel), | |
684 | .bounce_ucb_sel(bounce_ucb_sel), | |
685 | .rd_nack_ucb_sel(rd_nack_ucb_sel), | |
686 | .srvc_wr_ack(srvc_wr_ack), | |
687 | .iob_tap_busy(iob_tap_busy), | |
688 | .tap_sel (tap_sel), | |
689 | // Inputs | |
690 | .scan_in(ncu_c2isc_ctl_scanin), | |
691 | .scan_out(ncu_c2isc_ctl_scanout), | |
692 | .iol2clk (iol2clk), | |
693 | .tcu_scan_en(tcu_scan_en), | |
694 | .tcu_pce_ov(tcu_pce_ov), | |
695 | .tcu_clk_stop(tcu_clk_stop), | |
696 | .tcu_aclk (tcu_aclk), | |
697 | .tcu_bclk (tcu_bclk), | |
698 | .pcx_packet(pcx_packet[128:0]), | |
699 | .pcx_packet_ue(pcx_packet_ue), | |
700 | .pcx_packet_pe(pcx_packet_pe), | |
701 | .c2i_packet_addr(c2i_packet_addr[39:0]), | |
702 | .cpubuf_tail_f(cpubuf_tail_f[5:0]), | |
703 | .mem32_base(mem32_base[11:0]), | |
704 | .mem32_mask(mem32_mask[11:0]), | |
705 | .mem32_en (mem32_en), | |
706 | .mem64_base(mem64_base[11:0]), | |
707 | .mem64_mask(mem64_mask[11:0]), | |
708 | .mem64_en (mem64_en), | |
709 | .iocon_base(iocon_base[11:0]), | |
710 | .iocon_mask(iocon_mask[11:0]), | |
711 | .iocon_en (iocon_en), | |
712 | .mb0_raddr (mb0_addr[5:0]), | |
713 | //.mb0_cpubuf_sel(mb0_cpubuf_sel), | |
714 | .dmupio_ucb_buf_acpt(dmupio_ucb_buf_acpt), | |
715 | .dmucsr_ucb_buf_acpt(dmucsr_ucb_buf_acpt), | |
716 | .ssi_ucb_buf_acpt(ssi_ucb_buf_acpt), | |
717 | .mcu0_ucb_buf_acpt(mcu0_ucb_buf_acpt), | |
718 | .mcu1_ucb_buf_acpt(mcu1_ucb_buf_acpt), | |
719 | .mcu2_ucb_buf_acpt(mcu2_ucb_buf_acpt), | |
720 | .mcu3_ucb_buf_acpt(mcu3_ucb_buf_acpt), | |
721 | .ccu_ucb_buf_acpt(ccu_ucb_buf_acpt), | |
722 | .rcu_ucb_buf_acpt(rcu_ucb_buf_acpt), | |
723 | .dbg1_ucb_buf_acpt(dbg1_ucb_buf_acpt), | |
724 | .niu_ucb_buf_acpt(niu_ucb_buf_acpt), | |
725 | .ncu_man_ucb_buf_acpt(ncu_man_ucb_buf_acpt), | |
726 | .ncu_int_ucb_buf_acpt(ncu_int_ucb_buf_acpt), | |
727 | .bounce_ucb_buf_acpt(bounce_ucb_buf_acpt), | |
728 | .rd_nack_ucb_buf_acpt(rd_nack_ucb_buf_acpt), | |
729 | .iobuf_avail(iobuf_avail), | |
730 | .c2i_wait (c2i_wait), | |
731 | .tap_iob_packet_vld(tap_iob_packet_vld), | |
732 | .tap_iob_packet(tap_iob_packet[127:0]), | |
733 | .mb1_run(mb1_run), | |
734 | .mb1_addr(mb1_addr[5:0]), | |
735 | .mb1_cpubuf_rd_en(mb1_cpubuf_rd_en)); | |
736 | ||
737 | ||
738 | ///* ncu_ctrl_ctl auto_template ( .scan_in (ncu_ctrl_ctl_scanin), | |
739 | // .scan_out (ncu_ctrl_ctl_scanout) ); */ | |
740 | ncu_ctrl_ctl ncu_ctrl_ctl ( /*AUTOINST*/ | |
741 | // Outputs | |
742 | .ncu_man_ucb_buf_acpt(ncu_man_ucb_buf_acpt), | |
743 | .ncu_int_ucb_buf_acpt(ncu_int_ucb_buf_acpt), | |
744 | .bounce_ucb_buf_acpt(bounce_ucb_buf_acpt), | |
745 | .rd_nack_ucb_buf_acpt(rd_nack_ucb_buf_acpt), | |
746 | .tap_mondo_acc_addr_s(tap_mondo_acc_addr_s[21:0]), | |
747 | .tap_mondo_acc_seq_s(tap_mondo_acc_seq_s), | |
748 | .tap_mondo_wr_s(tap_mondo_wr_s), | |
749 | .tap_mondo_din_s(tap_mondo_din_s[63:0]), | |
750 | .mmufsh_data (mmufsh_data[63:0]), | |
751 | .mmufsh_vld (mmufsh_vld), | |
752 | .mem32_mask (mem32_mask[11:0]), | |
753 | .mem32_base (mem32_base[11:0]), | |
754 | .mem32_en (mem32_en), | |
755 | .mem64_mask (mem64_mask[11:0]), | |
756 | .mem64_base (mem64_base[11:0]), | |
757 | .mem64_en (mem64_en), | |
758 | .iocon_mask (iocon_mask[11:0]), | |
759 | .iocon_base (iocon_base[11:0]), | |
760 | .iocon_en (iocon_en), | |
761 | .ncu_man_int_vld(ncu_man_int_vld), | |
762 | .ncu_man_int_packet(ncu_man_int_packet[24:0]), | |
763 | .ncu_man_ack_vld(ncu_man_ack_vld), | |
764 | .ncu_man_ack_packet(ncu_man_ack_packet[127:0]), | |
765 | .ncu_int_ack_vld(ncu_int_ack_vld), | |
766 | .ncu_int_ack_packet(ncu_int_ack_packet[127:0]), | |
767 | .bounce_ack_vld(bounce_ack_vld), | |
768 | .bounce_ack_packet(bounce_ack_packet[127:0]), | |
769 | .rd_nack_vld (rd_nack_vld), | |
770 | .rd_nack_packet(rd_nack_packet[63:0]), | |
771 | .mondoinvec (mondoinvec[5:0]), | |
772 | .lhs_intman_acc(lhs_intman_acc), | |
773 | .ncu_rst_xir_done(ncu_rst_xir_done), | |
774 | .ncu_spc7_core_enable_status(ncu_spc7_core_enable_status), | |
775 | .ncu_spc6_core_enable_status(ncu_spc6_core_enable_status), | |
776 | .ncu_spc5_core_enable_status(ncu_spc5_core_enable_status), | |
777 | .ncu_spc4_core_enable_status(ncu_spc4_core_enable_status), | |
778 | .ncu_spc3_core_enable_status(ncu_spc3_core_enable_status), | |
779 | .ncu_spc2_core_enable_status(ncu_spc2_core_enable_status), | |
780 | .ncu_spc1_core_enable_status(ncu_spc1_core_enable_status), | |
781 | .ncu_spc0_core_enable_status(ncu_spc0_core_enable_status), | |
782 | //.core_enable_status(core_enable_status[7:0]), | |
783 | .core_running(core_running[63:0]), | |
784 | .coreavail (coreavail[7:0]), | |
785 | .l2pm (l2pm[4:0]), | |
786 | .ncu_spc_pm(ncu_spc_pm), | |
787 | .ncu_spc_ba01(ncu_spc_ba01), | |
788 | .l2idxhs_en_status(l2idxhs_en_status), | |
789 | .intman_tbl_raddr(intman_tbl_raddr[6:0]), | |
790 | .intman_tbl_waddr(intman_tbl_waddr[6:0]), | |
791 | .intman_tbl_wr(intman_tbl_wr), | |
792 | .intman_tbl_rden(intman_tbl_rden), | |
793 | .intman_tbl_din(intman_tbl_din[15:0]), | |
794 | .intman_pchkf2i2c(intman_pchkf2i2c), | |
795 | .ncu_rst_fatal_error(ncu_rst_fatal_error), | |
796 | .ncu_tcu_soc_error(ncu_tcu_soc_error), | |
797 | .raserrce(raserrce), | |
798 | .raserrue(raserrue), | |
799 | .ncu_tcu_bank_avail(ncu_tcu_bank_avail[7:0]), | |
800 | //.ncu_tcu_bank_en_status(ncu_tcu_bank_en_status[3:0]), | |
801 | .dmu_cr_id_rtn_erri(dmu_cr_id_rtn_erri), | |
802 | .ncu_niu_d_pei(ncu_niu_d_pei), | |
803 | .ncu_niu_ctag_uei(ncu_niu_ctag_uei), | |
804 | .ncu_niu_ctag_cei(ncu_niu_ctag_cei), | |
805 | .ncu_sio_ctag_cei(ncu_sio_ctag_cei), | |
806 | .ncu_sio_ctag_uei(ncu_sio_ctag_uei), | |
807 | .ncu_sio_d_pei(ncu_sio_d_pei), | |
808 | .ncu_dmu_d_pei(ncu_dmu_d_pei), | |
809 | .ncu_dmu_siicr_pei(ncu_dmu_siicr_pei), | |
810 | .ncu_dmu_ctag_uei(ncu_dmu_ctag_uei), | |
811 | .ncu_dmu_ctag_cei(ncu_dmu_ctag_cei), | |
812 | .ncu_dmu_ncucr_pei(ncu_dmu_ncucr_pei), | |
813 | .ncu_dmu_iei (ncu_dmu_iei), | |
814 | .ncu_sii_dmua_pei(ncu_sii_dmua_pei), | |
815 | .ncu_sii_niud_pei(ncu_sii_niud_pei), | |
816 | .ncu_sii_dmud_pei(ncu_sii_dmud_pei), | |
817 | .ncu_sii_niua_pei(ncu_sii_niua_pei), | |
818 | .ncu_sii_dmuctag_cei(ncu_sii_dmuctag_cei), | |
819 | .ncu_sii_niuctag_cei(ncu_sii_niuctag_cei), | |
820 | .ncu_sii_dmuctag_uei(ncu_sii_dmuctag_uei), | |
821 | .ncu_sii_niuctag_uei(ncu_sii_niuctag_uei), | |
822 | .ncu_mcu0_ecci(ncu_mcu0_ecci), | |
823 | .ncu_mcu0_fbri(ncu_mcu0_fbri), | |
824 | .ncu_mcu0_fbui(ncu_mcu0_fbui), | |
825 | .ncu_mcu1_ecci(ncu_mcu1_ecci), | |
826 | .ncu_mcu1_fbri(ncu_mcu1_fbri), | |
827 | .ncu_mcu1_fbui(ncu_mcu1_fbui), | |
828 | .ncu_mcu2_ecci(ncu_mcu2_ecci), | |
829 | .ncu_mcu2_fbri(ncu_mcu2_fbri), | |
830 | .ncu_mcu2_fbui(ncu_mcu2_fbui), | |
831 | .ncu_mcu3_ecci(ncu_mcu3_ecci), | |
832 | .ncu_mcu3_fbri(ncu_mcu3_fbri), | |
833 | .ncu_mcu3_fbui(ncu_mcu3_fbui), | |
834 | .ncuctag_cei (ncuctag_cei), | |
835 | .ncuctag_uei (ncuctag_uei), | |
836 | .ncusiid_pei (ncusiid_pei), | |
837 | .dmubuf_pei (dmubuf_pei), | |
838 | .iobuf_uei (iobuf_uei), | |
839 | .cpubuf_uei (cpubuf_uei), | |
840 | .cpubuf_pei (cpubuf_pei), | |
841 | .intbuf_uei (intbuf_uei), | |
842 | .mondotbl_pei(mondotbl_pei), | |
843 | .ncu_scksel_sh(ncu_scksel[1:0]), | |
844 | // Inputs | |
845 | .tcu_dbr_gateoff(tcu_dbr_gateoff), | |
846 | .aclk_wmr(aclk_wmr), | |
847 | .wmr_protect(wmr_protect), | |
848 | .scan_in(ncu_ctrl_ctl_scanin), | |
849 | .scan_out(ncu_ctrl_ctl_scanout), | |
850 | .iol2clk (iol2clk), | |
851 | .tcu_pce_ov (tcu_pce_ov), | |
852 | .tcu_clk_stop(tcu_clk_stop), | |
853 | .tcu_scan_en (tcu_scan_en), | |
854 | .tcu_aclk (tcu_aclk), | |
855 | .tcu_bclk (tcu_bclk), | |
856 | .ncu_man_ucb_sel(ncu_man_ucb_sel), | |
857 | .ncu_int_ucb_sel(ncu_int_ucb_sel), | |
858 | .bounce_ucb_sel(bounce_ucb_sel), | |
859 | .c2i_packet_vld(c2i_packet_vld), | |
860 | .c2i_packet_is_rd_req(c2i_packet_is_rd_req), | |
861 | .c2i_packet_is_wr_req(c2i_packet_is_wr_req), | |
862 | .c2i_packet (c2i_packet[127:0]), | |
863 | .rd_nack_ucb_sel(rd_nack_ucb_sel), | |
864 | .c2i_rd_nack_packet(c2i_rd_nack_packet[63:0]), | |
865 | .tap_mondo_acc_seq_d2_f(tap_mondo_acc_seq_d2_f), | |
866 | .tap_mondo_acc_addr_invld_d2_f(tap_mondo_acc_addr_invld_d2_f), | |
867 | .tap_mondo_dout_d2_f(tap_mondo_dout_d2_f[63:0]), | |
868 | .mmu_ld (mmu_ld), | |
869 | .ncu_man_int_rd(ncu_man_int_rd), | |
870 | .ncu_man_ack_rd(ncu_man_ack_rd), | |
871 | .ncu_int_ack_rd(ncu_int_ack_rd), | |
872 | .bounce_ack_rd(bounce_ack_rd), | |
873 | .rd_nack_rd (rd_nack_rd), | |
874 | .io_intman_addr(io_intman_addr[6:0]), | |
875 | //.efu_ncu_fuse_clk1(efu_ncu_fuse_clk1), | |
876 | .efu_ncu_fuse_data(efu_ncu_fuse_data), | |
877 | .efu_ncu_coreavail_dshift(efu_ncu_coreavail_dshift), | |
878 | .efu_ncu_bankavail_dshift(efu_ncu_bankavail_dshift), | |
879 | .efu_ncu_fusestat_dshift(efu_ncu_fusestat_dshift), | |
880 | .efu_ncu_sernum0_dshift(efu_ncu_sernum0_dshift), | |
881 | .efu_ncu_sernum1_dshift(efu_ncu_sernum1_dshift), | |
882 | .efu_ncu_sernum2_dshift(efu_ncu_sernum2_dshift), | |
883 | .rst_ncu_unpark_thread(rst_ncu_unpark_thread), | |
884 | .rst_ncu_xir_inv(rst_ncu_xir_), | |
885 | .core_running_status(core_running_status[63:0]), | |
886 | .intman_tbl_dout(intman_tbl_dout[15:0]), | |
887 | .mb1_raddr (mb1_addr[6:0]), | |
888 | .mb1_waddr (mb1_addr[6:0]), | |
889 | .mb1_wdata (mb1_wdata[7:0]), | |
890 | .mb1_intman_wr_en(mb1_intman_wr_en), | |
891 | .mb1_intman_rd_en(mb1_intman_rd_en), | |
892 | .mb1_run(mb1_run), | |
893 | .niu_ncu_d_pe(niu_ncu_d_pe), | |
894 | .niu_ncu_ctag_ue(niu_ncu_ctag_ue), | |
895 | .niu_ncu_ctag_ce(niu_ncu_ctag_ce), | |
896 | .sio_ncu_ctag_ce(sio_ncu_ctag_ce), | |
897 | .sio_ncu_ctag_ue(sio_ncu_ctag_ue), | |
898 | //.sio_ncu_d_pe(sio_ncu_d_pe), | |
899 | .dmu_cr_id_rtn_err(dmu_cr_id_rtn_err), | |
900 | .dmu_ncu_d_pe(dmu_ncu_d_pe), | |
901 | .dmu_ncu_siicr_pe(dmu_ncu_siicr_pe), | |
902 | .dmu_ncu_ctag_ue(dmu_ncu_ctag_ue), | |
903 | .dmu_ncu_ctag_ce(dmu_ncu_ctag_ce), | |
904 | .dmu_ncu_ncucr_pe(dmu_ncu_ncucr_pe), | |
905 | .dmu_ncu_ie (dmu_ncu_ie), | |
906 | .sii_ncu_dmua_pe(sii_ncu_dmua_pe), | |
907 | .sii_ncu_niud_pe(sii_ncu_niud_pe), | |
908 | .sii_ncu_dmud_pe(sii_ncu_dmud_pe), | |
909 | .sii_ncu_niua_pe(sii_ncu_niua_pe), | |
910 | .sii_ncu_dmuctag_ce(sii_ncu_dmuctag_ce), | |
911 | .sii_ncu_niuctag_ce(sii_ncu_niuctag_ce), | |
912 | .sii_ncu_dmuctag_ue(sii_ncu_dmuctag_ue), | |
913 | .sii_ncu_niuctag_ue(sii_ncu_niuctag_ue), | |
914 | .mcu0_ncu_ecc (mcu0_ncu_ecc), | |
915 | .mcu0_ncu_fbr (mcu0_ncu_fbr), | |
916 | .mcu0_ncu_fbu (mcu0_ncu_fbu), | |
917 | .mcu1_ncu_ecc (mcu1_ncu_ecc), | |
918 | .mcu1_ncu_fbr (mcu1_ncu_fbr), | |
919 | .mcu1_ncu_fbu (mcu1_ncu_fbu), | |
920 | .mcu2_ncu_ecc (mcu2_ncu_ecc), | |
921 | .mcu2_ncu_fbr (mcu2_ncu_fbr), | |
922 | .mcu2_ncu_fbu (mcu2_ncu_fbu), | |
923 | .mcu3_ncu_ecc (mcu3_ncu_ecc), | |
924 | .mcu3_ncu_fbr (mcu3_ncu_fbr), | |
925 | .mcu3_ncu_fbu (mcu3_ncu_fbu), | |
926 | .siierrsyn (siierrsyn[63:0]), | |
927 | .siierrsyn_done(siierrsyn_done), | |
928 | .ncuctag_ce (ncuctag_ce), | |
929 | .ncuctag_ue (ncuctag_ue), | |
930 | .ncusiid_pe (ncusiid_pe), | |
931 | .ncudpsyn (ncudpsyn[15:0]), | |
932 | .dmubuf_pue (dmubuf_pue), | |
933 | .iobuf_ue_f (iobuf_ue_f), | |
934 | .cpubuf_ue (cpubuf_ue), | |
935 | .cpubuf_pe (cpubuf_pe), | |
936 | .intbuf_ue_f (intbuf_ue_f), | |
937 | .mondotbl_pe_f(mondotbl_pe_f), | |
938 | .io_rd_intman_d2(io_rd_intman_d2), | |
939 | .dmubufsyn (dmubufsyn[46:0]), | |
940 | .cpubufsyn (cpubufsyn[50:0]), | |
941 | // outputs | |
942 | .tcu_wmr_vec_mask(tcu_wmr_vec_mask), | |
943 | .cmp_tick_enable(cmp_tick_enable), | |
944 | .ncu_dbg1_error_event (ncu_dbg1_error_event)); | |
945 | ||
946 | ||
947 | ///*ncu_mb1_ctl auto_template ( | |
948 | // .l2clk (iol2clk), | |
949 | // .scan_out(mb1_scanout), | |
950 | // .scan_in(mb1_scanin), | |
951 | // .mbist_start (mb1_start), | |
952 | // .mbist_done (mb1_done), | |
953 | // .mbist_icache_fail(mb1_fail), | |
954 | // .mbist_userdata_mode(1'b0), | |
955 | // .mbist_bisi_mode(1'b0), | |
956 | // .mbist_loop_mode(1'b0), | |
957 | // .mbist_loop_on_address(1'b0), | |
958 | // .mbist_stop_on_fail(1'b0), | |
959 | // .mbist_stop_on_next_fail(1'b0), | |
960 | // .mbist_dcache_fail_in(1'b0), | |
961 | // .mbist_icache_fail_in(1'b0), | |
962 | // .mbist_icache_way({mb1_intman_sel,mb1_dmubuf_sel}), | |
963 | // .mbist_dcache_index(mb1_raddr[6:0]), | |
964 | // .mbist_icache_index(mb1_waddr[7:0]), | |
965 | // .mbist_write_data(mb1_wdata[7:0])); */ | |
966 | //ncu_mb1_ctl ncu_mb1_ctl ( /*AUTOINST*/ | |
967 | // Outputs | |
968 | //.mbist_dcache_read(mbist_dcache_read), | |
969 | //.mbist_dcache_write(mbist_dcache_write), | |
970 | //.mbist_dcache_index(mb1_raddr[6:0]), // Templated | |
971 | //.mbist_dcache_way(mbist_dcache_way[1:0]), | |
972 | //.mbist_icache_read(mbist_icache_read), | |
973 | //.mbist_icache_write(mbist_icache_write), | |
974 | //.mbist_icache_index(mb1_waddr[7:0]), // Templated | |
975 | //.mbist_icache_word(mbist_icache_word), | |
976 | //.mbist_icache_way({mb1_intman_sel,mb1_dmubuf_sel}), // Templated | |
977 | //.mbist_write_data(mb1_wdata[7:0]), // Templated | |
978 | //.mbist_dcache_fail(mbist_dcache_fail), | |
979 | //.mbist_done (mb1_done), | |
980 | //.mbist_icache_fail(mb1_fail), | |
981 | //.scan_out(mb1_scanout), | |
982 | // Inputs | |
983 | //.scan_in(mb1_scanin), | |
984 | //.mbist_start (mb1_start), // Templated | |
985 | //.l2clk (iol2clk), // Templated | |
986 | //.tcu_pce_ov (tcu_pce_ov), | |
987 | //.tcu_clk_stop (tcu_clk_stop), | |
988 | //.tcu_aclk (tcu_aclk), | |
989 | //.tcu_bclk (tcu_bclk), | |
990 | //.tcu_scan_en (tcu_scan_en), | |
991 | //.mbist_userdata_mode(1'b0), // Templated | |
992 | //.mbist_bisi_mode(1'b0), // Templated | |
993 | //.mbist_loop_mode(1'b0), // Templated | |
994 | //.mbist_loop_on_address(1'b0), // Templated | |
995 | //.mbist_stop_on_fail(1'b0), // Templated | |
996 | //.mbist_stop_on_next_fail(1'b0), // Templated | |
997 | //.mbist_dcache_fail_in(1'b0), // Templated | |
998 | //.mbist_icache_fail_in(1'b0), // Templated | |
999 | //.dmubuf0_dout (dmubuf0_dout[143:0]), | |
1000 | //.dmubuf1_dout (dmubuf1_dout[143:0]), | |
1001 | //.intman_tbl_dout(intman_tbl_dout[11:0])); | |
1002 | ||
1003 | ||
1004 | ncu_mb1_ctl ncu_mb1_ctl ( | |
1005 | // Outputs | |
1006 | .mb1_run(mb1_run), | |
1007 | .mb1_addr(mb1_addr[6:0]), | |
1008 | .mb1_wdata(mb1_wdata[7:0]), | |
1009 | .mb1_intman_wr_en(mb1_intman_wr_en), | |
1010 | .mb1_intman_rd_en(mb1_intman_rd_en), | |
1011 | .mb1_dmubuf0_wr_en(mb1_dmubuf0_wr_en), | |
1012 | .mb1_dmubuf0_rd_en(mb1_dmubuf0_rd_en), | |
1013 | .mb1_dmubuf1_wr_en(mb1_dmubuf1_wr_en), | |
1014 | .mb1_dmubuf1_rd_en(mb1_dmubuf1_rd_en), | |
1015 | .mb1_cpubuf_wr_en(mb1_cpubuf_wr_en), | |
1016 | .mb1_cpubuf_rd_en(mb1_cpubuf_rd_en), | |
1017 | .mb1_done(mb1_done), | |
1018 | .mb1_fail(mb1_fail), | |
1019 | .scan_out(mb1_scanout), | |
1020 | // inputs | |
1021 | .l2clk(iol2clk), | |
1022 | .scan_in(mb1_scanin), | |
1023 | .tcu_pce_ov(tcu_pce_ov), // scan signals | |
1024 | .tcu_clk_stop(tcu_clk_stop), | |
1025 | .tcu_aclk(tcu_aclk), | |
1026 | .tcu_bclk(tcu_bclk), | |
1027 | .tcu_scan_en(tcu_scan_en), | |
1028 | .mb1_start(mb1_start), | |
1029 | //.mb1_userdata_mode(1'b0), | |
1030 | .mb1_bisi_mode(tcu_mbist_bisi_en), | |
1031 | //.mb1_loop_mode(1'b0), | |
1032 | //.mb1_loop_on_address(1'b0), | |
1033 | //.mb1_stop_on_fail(1'b0), | |
1034 | //.mb1_stop_on_next_fail(1'b0), | |
1035 | .mb1_user_mode(tcu_mbist_user_mode), | |
1036 | .intman_dout(intman_tbl_dout[15:0]), | |
1037 | .cpubuf_dout(cpubuf_dout[143:0]), | |
1038 | .dmubuf0_dout(dmubuf0_dout[143:0]), | |
1039 | .dmubuf1_dout(dmubuf1_dout[143:0])); | |
1040 | //assign intman_dout[15:0] = 16'b0; | |
1041 | ||
1042 | ||
1043 | /********************************************************** | |
1044 | * cpu-to-io slow datapath | |
1045 | *****************************************************************/ | |
1046 | ///* ncu_c2isd_ctl auto_template ( .scan_in (ncu_c2isd_ctl_scanin), | |
1047 | // .scan_out(ncu_c2isd_ctl_scanout) ); */ | |
1048 | ncu_c2isd_ctl ncu_c2isd_ctl ( /*AUTOINST*/ | |
1049 | // Outputs | |
1050 | .pcx_packet(pcx_packet[128:0]), | |
1051 | .pcx_packet_ue(pcx_packet_ue), | |
1052 | .pcx_packet_pe(pcx_packet_pe), | |
1053 | .c2i_packet_addr(c2i_packet_addr[39:0]), | |
1054 | .c2i_packet(c2i_packet[127:0]), | |
1055 | .c2i_rd_nack_packet(c2i_rd_nack_packet[63:0]), | |
1056 | .wr_ack_iopkt(wr_ack_iopkt[152:0]), | |
1057 | .cpubuf_mb0_data(cpubuf_mb0_data[7:0]), | |
1058 | .cpubufsyn (cpubufsyn[50:0]), | |
1059 | // Inputs | |
1060 | .scan_in(ncu_c2isd_ctl_scanin), | |
1061 | .scan_out(ncu_c2isd_ctl_scanout), | |
1062 | .iol2clk (iol2clk), | |
1063 | .tcu_scan_en(tcu_scan_en), | |
1064 | .tcu_pce_ov(tcu_pce_ov), | |
1065 | .tcu_clk_stop(tcu_clk_stop), | |
1066 | .tcu_aclk (tcu_aclk), | |
1067 | .tcu_bclk (tcu_bclk), | |
1068 | .tap_iob_packet(tap_iob_packet[127:0]), | |
1069 | .cpubuf_dout(cpubuf_dout[143:0]), | |
1070 | .cpubuf_rd (cpubuf_rd), | |
1071 | .pas (pas), | |
1072 | .pa_ld (pa_ld), | |
1073 | .cpubuf_uei(cpubuf_uei), | |
1074 | .cpubuf_pei(cpubuf_pei), | |
1075 | .tap_sel (tap_sel), | |
1076 | .cpu_packet_type(cpu_packet_type[3:0]), | |
1077 | .cpu_packet_size(cpu_packet_size[2:0]), | |
1078 | .mb0_cpubuf_bus_sel(5'b0000)); | |
1079 | ||
1080 | ||
1081 | /************************ | |
1082 | ** dmupio | |
1083 | ***********************/ | |
1084 | ///* ncu_c2ibufpio_ctl auto_template ( | |
1085 | // .scan_in (dmupio_ucb_buf_scanin), | |
1086 | // .scan_out (dmupio_ucb_buf_scanout), | |
1087 | // .ucb_sel (dmupio_ucb_sel), | |
1088 | // .ucb_buf_acpt (dmupio_ucb_buf_acpt) ); */ | |
1089 | ncu_c2ibufpio_ctl dmupio_ucb_buf (/*AUTOINST*/ | |
1090 | // Outputs | |
1091 | .ucb_buf_acpt(dmupio_ucb_buf_acpt), // Templated | |
1092 | .mmu_ld(mmu_ld), | |
1093 | .dmubuf_din(dmubuf_din[143:0]), | |
1094 | .dmubuf0_wr(dmubuf0_wr), | |
1095 | .dmubuf1_wr(dmubuf1_wr), | |
1096 | .dmubuf_waddr(dmubuf_waddr[4:0]), | |
1097 | .dmubuf_raddr(dmubuf_raddr[4:0]), | |
1098 | .dmubuf_rden(dmubuf_rden), | |
1099 | .dmupio_wack_iopkt(dmupio_wack_iopkt[152:0]), | |
1100 | .dmupio_srvc_wack(dmupio_srvc_wack), | |
1101 | .c2i_wait(c2i_wait), | |
1102 | .ncu_dmu_pio_data(ncu_dmu_pio_data[63:0]), | |
1103 | .ncu_dmu_pio_hdr_vld(ncu_dmu_pio_hdr_vld), | |
1104 | .ncu_dmu_mmu_addr_vld(ncu_dmu_mmu_addr_vld), | |
1105 | .ncu_dmu_dpar(ncu_dmu_dpar[1:0]), | |
1106 | .dmubufsyn(dmubufsyn[46:0]), | |
1107 | .dmubuf_pue(dmubuf_pue), | |
1108 | .dmu_cr_id_rtn_err(dmu_cr_id_rtn_err), | |
1109 | // Inputs | |
1110 | .tcu_dbr_gateoff(tcu_dbr_gateoff), | |
1111 | .mb1_run(mb1_run), | |
1112 | .mb1_dmubuf0_wr_en(mb1_dmubuf0_wr_en), | |
1113 | .mb1_dmubuf1_wr_en(mb1_dmubuf1_wr_en), | |
1114 | .mb1_dmubuf0_rd_en(mb1_dmubuf0_rd_en), | |
1115 | .mb1_dmubuf1_rd_en(mb1_dmubuf1_rd_en), | |
1116 | .mb1_addr(mb1_addr[4:0]), | |
1117 | .mb1_wdata(mb1_wdata[7:0]), | |
1118 | .scan_in(dmupio_ucb_buf_scanin), | |
1119 | .scan_out(dmupio_ucb_buf_scanout), | |
1120 | .iol2clk(iol2clk), | |
1121 | .tcu_scan_en(tcu_scan_en), | |
1122 | .tcu_pce_ov(tcu_pce_ov), | |
1123 | .tcu_clk_stop(tcu_clk_stop), | |
1124 | .tcu_aclk(tcu_aclk), | |
1125 | .tcu_bclk(tcu_bclk), | |
1126 | .dmupio_addr35to24(dmupio_addr35to24[11:0]), | |
1127 | .c2i_packet(c2i_packet[127:0]), | |
1128 | .c2i_packet_vld(c2i_packet_vld), | |
1129 | .ucb_sel(dmupio_ucb_sel), // Templated | |
1130 | .com_map(com_map[1:0]), | |
1131 | .mmufsh_data(mmufsh_data[63:0]), | |
1132 | .mmufsh_vld(mmufsh_vld), | |
1133 | .dmu_ncu_wrack_vld(dmu_ncu_wrack_vld), | |
1134 | .dmu_ncu_wrack_tag(dmu_ncu_wrack_tag[3:0]), | |
1135 | .dmu_ncu_wrack_par(dmu_ncu_wrack_par), | |
1136 | .dmu_cr_id_rtn_erri(dmu_cr_id_rtn_erri), | |
1137 | .sii_cr_id_rtn_vld(sii_cr_id_rtn_vld), | |
1138 | .sii_cr_id_rtn(sii_cr_id_rtn[3:0]), | |
1139 | .dmubuf0_dout(dmubuf0_dout[143:0]), | |
1140 | .dmubuf1_dout(dmubuf1_dout[143:0]), | |
1141 | .iobuf_avail(iobuf_avail), | |
1142 | .dmubuf_pei(dmubuf_pei)); | |
1143 | ||
1144 | ||
1145 | ||
1146 | /************************ | |
1147 | ** dmucsr | |
1148 | ***********************/ | |
1149 | ///* ncu_c2ibuf32_ctl auto_template ( | |
1150 | // .scan_in (dmucsr_ucb_buf_scanin), | |
1151 | // .scan_out (dmucsr_ucb_buf_scanout), | |
1152 | // .iob_ucb_vld (ncu_dmu_vld), | |
1153 | // .iob_ucb_data (ncu_dmu_data[31:0]), | |
1154 | // .ucb_iob_stall (dmu_ncu_stall), | |
1155 | // .ucb_buf_acpt (dmucsr_ucb_buf_acpt), | |
1156 | // .ucb_sel (dmucsr_ucb_sel) ); */ | |
1157 | ncu_c2ibuf32_ctl dmucsr_ucb_buf (/*AUTOINST*/ | |
1158 | // Outputs | |
1159 | .ucb_buf_acpt(dmucsr_ucb_buf_acpt), // Templated | |
1160 | .iob_ucb_vld(ncu_dmu_vld), // Templated | |
1161 | .iob_ucb_data(ncu_dmu_data[31:0]), // Templated | |
1162 | // Inputs | |
1163 | .tcu_dbr_gateoff(tcu_dbr_gateoff), | |
1164 | .scan_in(dmucsr_ucb_buf_scanin), | |
1165 | .scan_out(dmucsr_ucb_buf_scanout), | |
1166 | .iol2clk(iol2clk), | |
1167 | .tcu_scan_en(tcu_scan_en), | |
1168 | .tcu_pce_ov(tcu_pce_ov), | |
1169 | .tcu_clk_stop(tcu_clk_stop), | |
1170 | .tcu_aclk(tcu_aclk), | |
1171 | .tcu_bclk(tcu_bclk), | |
1172 | .c2i_packet_vld(c2i_packet_vld), | |
1173 | .ucb_sel(dmucsr_ucb_sel), // Templated | |
1174 | .c2i_packet(c2i_packet[127:0]), | |
1175 | .ucb_iob_stall(dmu_ncu_stall)); // Templated | |
1176 | ||
1177 | ||
1178 | ||
1179 | /************************ | |
1180 | ** ssi ucb | |
1181 | ***********************/ | |
1182 | ///* ncu_c2ibuf4_ctl auto_template ( | |
1183 | // .scan_in (ssi_ucb_buf_scanin), | |
1184 | // .scan_out (ssi_ucb_buf_scanout), | |
1185 | // .iob_ucb_vld (ncu_ssi_vld), | |
1186 | // .iob_ucb_data (ncu_ssi_data[3:0]), | |
1187 | // .ucb_iob_stall (ssi_ncu_stall), | |
1188 | // .ucb_buf_acpt (ssi_ucb_buf_acpt), | |
1189 | // .ucb_sel (ssi_ucb_sel) ); */ | |
1190 | ncu_c2ibuf4_ctl ssi_ucb_buf (/*AUTOINST*/ | |
1191 | // Outputs | |
1192 | .ucb_buf_acpt(ssi_ucb_buf_acpt), // Templated | |
1193 | .iob_ucb_vld(ncu_ssi_vld), // Templated | |
1194 | .iob_ucb_data(ncu_ssi_data[3:0]), // Templated | |
1195 | // Inputs | |
1196 | .scan_in(ssi_ucb_buf_scanin), | |
1197 | .scan_out(ssi_ucb_buf_scanout), | |
1198 | .iol2clk (iol2clk), | |
1199 | .tcu_scan_en(tcu_scan_en), | |
1200 | .tcu_pce_ov(tcu_pce_ov), | |
1201 | .tcu_clk_stop(tcu_clk_stop), | |
1202 | .tcu_aclk (tcu_aclk), | |
1203 | .tcu_bclk (tcu_bclk), | |
1204 | .c2i_packet_vld(c2i_packet_vld), | |
1205 | .ucb_sel (ssi_ucb_sel), // Templated | |
1206 | .c2i_packet(c2i_packet[127:0]), | |
1207 | .ucb_iob_stall(ssi_ncu_stall)); // Templated | |
1208 | ||
1209 | ||
1210 | ||
1211 | /************************ | |
1212 | ** mcu0 ucb | |
1213 | ***********************/ | |
1214 | ///* ncu_c2ibuf4_ctl auto_template ( | |
1215 | // .scan_in (mcu0_ucb_buf_scanin), | |
1216 | // .scan_out (mcu0_ucb_buf_scanout), | |
1217 | // .iob_ucb_vld (ncu_mcu0_vld), | |
1218 | // .iob_ucb_data (ncu_mcu0_data[3:0]), | |
1219 | // .ucb_iob_stall (mcu0_ncu_stall), | |
1220 | // .ucb_buf_acpt (mcu0_ucb_buf_acpt), | |
1221 | // .ucb_sel (mcu0_ucb_sel) ); */ | |
1222 | ncu_c2ibuf4_ctl mcu0_ucb_buf (/*AUTOINST*/ | |
1223 | // Outputs | |
1224 | .ucb_buf_acpt(mcu0_ucb_buf_acpt), // Templated | |
1225 | .iob_ucb_vld(ncu_mcu0_vld), // Templated | |
1226 | .iob_ucb_data(ncu_mcu0_data[3:0]), // Templated | |
1227 | // Inputs | |
1228 | .scan_in(mcu0_ucb_buf_scanin), | |
1229 | .scan_out(mcu0_ucb_buf_scanout), | |
1230 | .iol2clk (iol2clk), | |
1231 | .tcu_scan_en(tcu_scan_en), | |
1232 | .tcu_pce_ov(tcu_pce_ov), | |
1233 | .tcu_clk_stop(tcu_clk_stop), | |
1234 | .tcu_aclk (tcu_aclk), | |
1235 | .tcu_bclk (tcu_bclk), | |
1236 | .c2i_packet_vld(c2i_packet_vld), | |
1237 | .ucb_sel (mcu0_ucb_sel), // Templated | |
1238 | .c2i_packet(c2i_packet[127:0]), | |
1239 | .ucb_iob_stall(mcu0_ncu_stall)); // Templated | |
1240 | ||
1241 | ||
1242 | ||
1243 | /************************ | |
1244 | ** mcu1 ucb | |
1245 | ***********************/ | |
1246 | ///* ncu_c2ibuf4_ctl auto_template ( | |
1247 | // .scan_in (mcu1_ucb_buf_scanin), | |
1248 | // .scan_out (mcu1_ucb_buf_scanout), | |
1249 | // .iob_ucb_vld (ncu_mcu1_vld), | |
1250 | // .iob_ucb_data (ncu_mcu1_data[3:0]), | |
1251 | // .ucb_iob_stall (mcu1_ncu_stall), | |
1252 | // .ucb_buf_acpt (mcu1_ucb_buf_acpt), | |
1253 | // .ucb_sel (mcu1_ucb_sel) ); */ | |
1254 | ncu_c2ibuf4_ctl mcu1_ucb_buf (/*AUTOINST*/ | |
1255 | // Outputs | |
1256 | .ucb_buf_acpt(mcu1_ucb_buf_acpt), // Templated | |
1257 | .iob_ucb_vld(ncu_mcu1_vld), // Templated | |
1258 | .iob_ucb_data(ncu_mcu1_data[3:0]), // Templated | |
1259 | // Inputs | |
1260 | .scan_in(mcu1_ucb_buf_scanin), | |
1261 | .scan_out(mcu1_ucb_buf_scanout), | |
1262 | .iol2clk (iol2clk), | |
1263 | .tcu_scan_en(tcu_scan_en), | |
1264 | .tcu_pce_ov(tcu_pce_ov), | |
1265 | .tcu_clk_stop(tcu_clk_stop), | |
1266 | .tcu_aclk (tcu_aclk), | |
1267 | .tcu_bclk (tcu_bclk), | |
1268 | .c2i_packet_vld(c2i_packet_vld), | |
1269 | .ucb_sel (mcu1_ucb_sel), // Templated | |
1270 | .c2i_packet(c2i_packet[127:0]), | |
1271 | .ucb_iob_stall(mcu1_ncu_stall)); // Templated | |
1272 | ||
1273 | ||
1274 | ||
1275 | /************************ | |
1276 | ** mcu2 ucb | |
1277 | ***********************/ | |
1278 | ///* ncu_c2ibuf4_ctl auto_template ( | |
1279 | // .scan_in (mcu2_ucb_buf_scanin), | |
1280 | // .scan_out (mcu2_ucb_buf_scanout), | |
1281 | // .iob_ucb_vld (ncu_mcu2_vld), | |
1282 | // .iob_ucb_data (ncu_mcu2_data[3:0]), | |
1283 | // .ucb_iob_stall (mcu2_ncu_stall), | |
1284 | // .ucb_buf_acpt (mcu2_ucb_buf_acpt), | |
1285 | // .ucb_sel (mcu2_ucb_sel) ); */ | |
1286 | ncu_c2ibuf4_ctl mcu2_ucb_buf (/*AUTOINST*/ | |
1287 | // Outputs | |
1288 | .ucb_buf_acpt(mcu2_ucb_buf_acpt), // Templated | |
1289 | .iob_ucb_vld(ncu_mcu2_vld), // Templated | |
1290 | .iob_ucb_data(ncu_mcu2_data[3:0]), // Templated | |
1291 | // Inputs | |
1292 | .scan_in(mcu2_ucb_buf_scanin), | |
1293 | .scan_out(mcu2_ucb_buf_scanout), | |
1294 | .iol2clk (iol2clk), | |
1295 | .tcu_scan_en(tcu_scan_en), | |
1296 | .tcu_pce_ov(tcu_pce_ov), | |
1297 | .tcu_clk_stop(tcu_clk_stop), | |
1298 | .tcu_aclk (tcu_aclk), | |
1299 | .tcu_bclk (tcu_bclk), | |
1300 | .c2i_packet_vld(c2i_packet_vld), | |
1301 | .ucb_sel (mcu2_ucb_sel), // Templated | |
1302 | .c2i_packet(c2i_packet[127:0]), | |
1303 | .ucb_iob_stall(mcu2_ncu_stall)); // Templated | |
1304 | ||
1305 | ||
1306 | ||
1307 | /************************ | |
1308 | ** mcu3 ucb | |
1309 | ***********************/ | |
1310 | ///* ncu_c2ibuf4_ctl auto_template ( | |
1311 | // .scan_in (mcu3_ucb_buf_scanin), | |
1312 | // .scan_out (mcu3_ucb_buf_scanout), | |
1313 | // .iob_ucb_vld (ncu_mcu3_vld), | |
1314 | // .iob_ucb_data (ncu_mcu3_data[3:0]), | |
1315 | // .ucb_iob_stall (mcu3_ncu_stall), | |
1316 | // .ucb_buf_acpt (mcu3_ucb_buf_acpt), | |
1317 | // .ucb_sel (mcu3_ucb_sel) ); */ | |
1318 | ncu_c2ibuf4_ctl mcu3_ucb_buf (/*AUTOINST*/ | |
1319 | // Outputs | |
1320 | .ucb_buf_acpt(mcu3_ucb_buf_acpt), // Templated | |
1321 | .iob_ucb_vld(ncu_mcu3_vld), // Templated | |
1322 | .iob_ucb_data(ncu_mcu3_data[3:0]), // Templated | |
1323 | // Inputs | |
1324 | .scan_in(mcu3_ucb_buf_scanin), | |
1325 | .scan_out(mcu3_ucb_buf_scanout), | |
1326 | .iol2clk (iol2clk), | |
1327 | .tcu_scan_en(tcu_scan_en), | |
1328 | .tcu_pce_ov(tcu_pce_ov), | |
1329 | .tcu_clk_stop(tcu_clk_stop), | |
1330 | .tcu_aclk (tcu_aclk), | |
1331 | .tcu_bclk (tcu_bclk), | |
1332 | .c2i_packet_vld(c2i_packet_vld), | |
1333 | .ucb_sel (mcu3_ucb_sel), // Templated | |
1334 | .c2i_packet(c2i_packet[127:0]), | |
1335 | .ucb_iob_stall(mcu3_ncu_stall)); // Templated | |
1336 | ||
1337 | ||
1338 | ||
1339 | /************************ | |
1340 | ** ccu ucb | |
1341 | ***********************/ | |
1342 | ///* ncu_c2ibuf4_ctl auto_template ( | |
1343 | // .scan_in (ccu_ucb_buf_scanin), | |
1344 | // .scan_out (ccu_ucb_buf_scanout), | |
1345 | // .iob_ucb_vld (ncu_ccu_vld), | |
1346 | // .iob_ucb_data (ncu_ccu_data[3:0]), | |
1347 | // .ucb_iob_stall (ccu_ncu_stall), | |
1348 | // .ucb_buf_acpt (ccu_ucb_buf_acpt), | |
1349 | // .ucb_sel (ccu_ucb_sel) ); */ | |
1350 | ncu_c2ibuf4_ctl ccu_ucb_buf (/*AUTOINST*/ | |
1351 | // Outputs | |
1352 | .ucb_buf_acpt(ccu_ucb_buf_acpt), // Templated | |
1353 | .iob_ucb_vld(ncu_ccu_vld), // Templated | |
1354 | .iob_ucb_data(ncu_ccu_data[3:0]), // Templated | |
1355 | // Inputs | |
1356 | .scan_in(ccu_ucb_buf_scanin), | |
1357 | .scan_out(ccu_ucb_buf_scanout), | |
1358 | .iol2clk (iol2clk), | |
1359 | .tcu_scan_en(tcu_scan_en), | |
1360 | .tcu_pce_ov(tcu_pce_ov), | |
1361 | .tcu_clk_stop(tcu_clk_stop), | |
1362 | .tcu_aclk (tcu_aclk), | |
1363 | .tcu_bclk (tcu_bclk), | |
1364 | .c2i_packet_vld(c2i_packet_vld), | |
1365 | .ucb_sel (ccu_ucb_sel), // Templated | |
1366 | .c2i_packet(c2i_packet[127:0]), | |
1367 | .ucb_iob_stall(ccu_ncu_stall)); // Templated | |
1368 | ||
1369 | ||
1370 | ||
1371 | /************************ | |
1372 | ** rcu ucb | |
1373 | ***********************/ | |
1374 | ///* ncu_c2ibuf4_ctl auto_template ( | |
1375 | // .scan_in (rcu_ucb_buf_scanin), | |
1376 | // .scan_out (rcu_ucb_buf_scanout), | |
1377 | // .iob_ucb_vld (ncu_rcu_vld), | |
1378 | // .iob_ucb_data (ncu_rcu_data[3:0]), | |
1379 | // .ucb_iob_stall (rcu_ncu_stall), | |
1380 | // .ucb_buf_acpt (rcu_ucb_buf_acpt), | |
1381 | // .ucb_sel (rcu_ucb_sel) ); */ | |
1382 | ncu_c2ibuf4_ctl rcu_ucb_buf (/*AUTOINST*/ | |
1383 | // Outputs | |
1384 | .ucb_buf_acpt(rcu_ucb_buf_acpt), // Templated | |
1385 | .iob_ucb_vld(ncu_rcu_vld), // Templated | |
1386 | .iob_ucb_data(ncu_rcu_data[3:0]), // Templated | |
1387 | // Inputs | |
1388 | .scan_in(rcu_ucb_buf_scanin), | |
1389 | .scan_out(rcu_ucb_buf_scanout), | |
1390 | .iol2clk (iol2clk), | |
1391 | .tcu_scan_en(tcu_scan_en), | |
1392 | .tcu_pce_ov(tcu_pce_ov), | |
1393 | .tcu_clk_stop(tcu_clk_stop), | |
1394 | .tcu_aclk (tcu_aclk), | |
1395 | .tcu_bclk (tcu_bclk), | |
1396 | .c2i_packet_vld(c2i_packet_vld), | |
1397 | .ucb_sel (rcu_ucb_sel), // Templated | |
1398 | .c2i_packet(c2i_packet[127:0]), | |
1399 | .ucb_iob_stall(rcu_ncu_stall)); // Templated | |
1400 | ||
1401 | ||
1402 | ||
1403 | /************************ | |
1404 | ** rng ucb | |
1405 | ***********************/ | |
1406 | ///* ncu_c2ibuf4_ctl auto_template ( | |
1407 | // .scan_in (rng_ucb_buf_scanin), | |
1408 | // .scan_out (rng_ucb_buf_scanout), | |
1409 | // .iob_ucb_vld (ncu_rng_vld), | |
1410 | // .iob_ucb_data (ncu_rng_data[3:0]), | |
1411 | // .ucb_iob_stall (rng_ncu_stall), | |
1412 | // .ucb_buf_acpt (rng_ucb_buf_acpt), | |
1413 | // .ucb_sel (rng_ucb_sel) ); */ | |
1414 | ncu_c2ibuf4_ctl dbg1_ucb_buf (/*AUTOINST*/ | |
1415 | // Outputs | |
1416 | .ucb_buf_acpt(dbg1_ucb_buf_acpt), // Templated | |
1417 | .iob_ucb_vld(ncu_dbg1_vld), // Templated | |
1418 | .iob_ucb_data(ncu_dbg1_data[3:0]), // Templated | |
1419 | // Inputs | |
1420 | .scan_in(dbg1_ucb_buf_scanin), | |
1421 | .scan_out(dbg1_ucb_buf_scanout), | |
1422 | .iol2clk (iol2clk), | |
1423 | .tcu_scan_en(tcu_scan_en), | |
1424 | .tcu_pce_ov(tcu_pce_ov), | |
1425 | .tcu_clk_stop(tcu_clk_stop), | |
1426 | .tcu_aclk (tcu_aclk), | |
1427 | .tcu_bclk (tcu_bclk), | |
1428 | .c2i_packet_vld(c2i_packet_vld), | |
1429 | .ucb_sel (dbg1_ucb_sel), // Templated | |
1430 | .c2i_packet(c2i_packet[127:0]), | |
1431 | .ucb_iob_stall(dbg1_ncu_stall)); // Templated | |
1432 | ||
1433 | ||
1434 | ||
1435 | /************************ | |
1436 | ** niu ucb | |
1437 | ***********************/ | |
1438 | ///* ncu_c2ibuf32_ctl auto_template ( | |
1439 | // .scan_in (niu_ucb_buf_scanin), | |
1440 | // .scan_out (niu_ucb_buf_scanout), | |
1441 | // .iob_ucb_vld (ncu_niu_vld), | |
1442 | // .iob_ucb_data (ncu_niu_data[31:0]), | |
1443 | // .ucb_iob_stall (niu_ncu_stall), | |
1444 | // .ucb_buf_acpt (niu_ucb_buf_acpt), | |
1445 | // .ucb_sel (niu_ucb_sel) ); */ | |
1446 | ncu_c2ibuf32_ctl niu_ucb_buf (/*AUTOINST*/ | |
1447 | // Outputs | |
1448 | .ucb_buf_acpt(niu_ucb_buf_acpt), // Templated | |
1449 | .iob_ucb_vld(ncu_niu_vld), // Templated | |
1450 | .iob_ucb_data(ncu_niu_data[31:0]), // Templated | |
1451 | // Inputs | |
1452 | .tcu_dbr_gateoff(tcu_dbr_gateoff), | |
1453 | .scan_in(niu_ucb_buf_scanin), | |
1454 | .scan_out(niu_ucb_buf_scanout), | |
1455 | .iol2clk (iol2clk), | |
1456 | .tcu_scan_en(tcu_scan_en), | |
1457 | .tcu_pce_ov(tcu_pce_ov), | |
1458 | .tcu_clk_stop(tcu_clk_stop), | |
1459 | .tcu_aclk (tcu_aclk), | |
1460 | .tcu_bclk (tcu_bclk), | |
1461 | .c2i_packet_vld(c2i_packet_vld), | |
1462 | .ucb_sel (niu_ucb_sel), // Templated | |
1463 | .c2i_packet(c2i_packet[127:0]), | |
1464 | .ucb_iob_stall(niu_ncu_stall)); // Templated | |
1465 | ||
1466 | ||
1467 | ||
1468 | ///* ncu_ucbbusin8_ctl auto_template ( | |
1469 | // .scan_in (tcu_ucb_buf_scanin), | |
1470 | // .scan_out (tcu_ucb_buf_scanout), | |
1471 | // .vld (tcu_ncu_vld), | |
1472 | // .data (tcu_ncu_data[7:0]), | |
1473 | // .stall (ncu_tcu_stall), | |
1474 | // .indata_buf (tap_iob_packet[127:0]), | |
1475 | // .indata_buf_vld (tap_iob_packet_vld), | |
1476 | // .stall_a1 (iob_tap_busy)); */ | |
1477 | ncu_ucbbusin8_ctl tcu_ucb_buf (/*AUTOINST*/ | |
1478 | // Outputs | |
1479 | .stall (ncu_tcu_stall), // Templated | |
1480 | .indata_buf_vld(tap_iob_packet_vld), // Templated | |
1481 | .indata_buf(tap_iob_packet[127:0]), // Templated | |
1482 | // Inputs | |
1483 | .scan_in(tcu_ucb_buf_scanin), | |
1484 | .scan_out(tcu_ucb_buf_scanout), | |
1485 | .iol2clk (iol2clk), | |
1486 | .tcu_pce_ov(tcu_pce_ov), | |
1487 | .tcu_clk_stop(tcu_clk_stop), | |
1488 | .tcu_scan_en(tcu_scan_en), | |
1489 | .tcu_aclk(tcu_aclk), | |
1490 | .tcu_bclk(tcu_bclk), | |
1491 | .vld (tcu_ncu_vld), // Templated | |
1492 | .data (tcu_ncu_data[7:0]), // Templated | |
1493 | .stall_a1(iob_tap_busy)); // Templated | |
1494 | ||
1495 | ||
1496 | ||
1497 | ||
1498 | ||
1499 | ||
1500 | ||
1501 | ||
1502 | ||
1503 | // fixscan start: | |
1504 | assign ncu_c2isc_ctl_scanin = scan_in ; | |
1505 | assign ncu_ctrl_ctl_scanin = ncu_c2isc_ctl_scanout ; | |
1506 | assign ncu_c2isd_ctl_scanin = ncu_ctrl_ctl_scanout ; | |
1507 | assign dmupio_ucb_buf_scanin = ncu_c2isd_ctl_scanout ; | |
1508 | assign dmucsr_ucb_buf_scanin = dmupio_ucb_buf_scanout ; | |
1509 | assign ssi_ucb_buf_scanin = dmucsr_ucb_buf_scanout ; | |
1510 | assign mcu0_ucb_buf_scanin = ssi_ucb_buf_scanout ; | |
1511 | assign mcu1_ucb_buf_scanin = mcu0_ucb_buf_scanout ; | |
1512 | assign mcu2_ucb_buf_scanin = mcu1_ucb_buf_scanout ; | |
1513 | assign mcu3_ucb_buf_scanin = mcu2_ucb_buf_scanout ; | |
1514 | assign ccu_ucb_buf_scanin = mcu3_ucb_buf_scanout ; | |
1515 | assign rcu_ucb_buf_scanin = ccu_ucb_buf_scanout ; | |
1516 | assign dbg1_ucb_buf_scanin = rcu_ucb_buf_scanout ; | |
1517 | assign niu_ucb_buf_scanin = dbg1_ucb_buf_scanout ; | |
1518 | assign tcu_ucb_buf_scanin = niu_ucb_buf_scanout ; | |
1519 | assign scan_out = tcu_ucb_buf_scanout ; | |
1520 | // fixscan end: | |
1521 | endmodule | |
1522 | ||
1523 | // Local Variables: | |
1524 | // verilog-library-directories:("." "../common") | |
1525 | // End: | |
1526 | ||
1527 | ||
1528 | ||
1529 | // Local Variables: | |
1530 | // verilog-auto-sense-defines-constant:t | |
1531 | // End: | |
1532 | ||
1533 | ||
1534 | ||
1535 | ||
1536 | ||
1537 | ||
1538 | // any PARAMS parms go into naming of macro | |
1539 | ||
1540 | module ncu_c2iscd_ctl_msff_ctl_macro__width_6 ( | |
1541 | din, | |
1542 | l1clk, | |
1543 | scan_in, | |
1544 | siclk, | |
1545 | soclk, | |
1546 | dout, | |
1547 | scan_out); | |
1548 | wire [5:0] fdin; | |
1549 | wire [4:0] so; | |
1550 | ||
1551 | input [5:0] din; | |
1552 | input l1clk; | |
1553 | input scan_in; | |
1554 | ||
1555 | ||
1556 | input siclk; | |
1557 | input soclk; | |
1558 | ||
1559 | output [5:0] dout; | |
1560 | output scan_out; | |
1561 | assign fdin[5:0] = din[5:0]; | |
1562 | ||
1563 | ||
1564 | ||
1565 | ||
1566 | ||
1567 | ||
1568 | dff #(6) d0_0 ( | |
1569 | .l1clk(l1clk), | |
1570 | .siclk(siclk), | |
1571 | .soclk(soclk), | |
1572 | .d(fdin[5:0]), | |
1573 | .si({scan_in,so[4:0]}), | |
1574 | .so({so[4:0],scan_out}), | |
1575 | .q(dout[5:0]) | |
1576 | ); | |
1577 | ||
1578 | ||
1579 | ||
1580 | ||
1581 | ||
1582 | ||
1583 | ||
1584 | ||
1585 | ||
1586 | ||
1587 | ||
1588 | ||
1589 | endmodule | |
1590 | ||
1591 | ||
1592 | ||
1593 | ||
1594 | ||
1595 | ||
1596 | ||
1597 | ||
1598 | ||
1599 | ||
1600 | ||
1601 | ||
1602 | ||
1603 | // any PARAMS parms go into naming of macro | |
1604 | ||
1605 | module ncu_c2iscd_ctl_msff_ctl_macro__width_1 ( | |
1606 | din, | |
1607 | l1clk, | |
1608 | scan_in, | |
1609 | siclk, | |
1610 | soclk, | |
1611 | dout, | |
1612 | scan_out); | |
1613 | wire [0:0] fdin; | |
1614 | ||
1615 | input [0:0] din; | |
1616 | input l1clk; | |
1617 | input scan_in; | |
1618 | ||
1619 | ||
1620 | input siclk; | |
1621 | input soclk; | |
1622 | ||
1623 | output [0:0] dout; | |
1624 | output scan_out; | |
1625 | assign fdin[0:0] = din[0:0]; | |
1626 | ||
1627 | ||
1628 | ||
1629 | ||
1630 | ||
1631 | ||
1632 | dff #(1) d0_0 ( | |
1633 | .l1clk(l1clk), | |
1634 | .siclk(siclk), | |
1635 | .soclk(soclk), | |
1636 | .d(fdin[0:0]), | |
1637 | .si(scan_in), | |
1638 | .so(scan_out), | |
1639 | .q(dout[0:0]) | |
1640 | ); | |
1641 | ||
1642 | ||
1643 | ||
1644 | ||
1645 | ||
1646 | ||
1647 | ||
1648 | ||
1649 | ||
1650 | ||
1651 | ||
1652 | ||
1653 | endmodule | |
1654 | ||
1655 | ||
1656 | ||
1657 | ||
1658 | ||
1659 | ||
1660 | ||
1661 | ||
1662 | ||
1663 | ||
1664 | ||
1665 | ||
1666 | ||
1667 | // any PARAMS parms go into naming of macro | |
1668 | ||
1669 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_1 ( | |
1670 | din, | |
1671 | en, | |
1672 | l1clk, | |
1673 | scan_in, | |
1674 | siclk, | |
1675 | soclk, | |
1676 | dout, | |
1677 | scan_out); | |
1678 | wire [0:0] fdin; | |
1679 | ||
1680 | input [0:0] din; | |
1681 | input en; | |
1682 | input l1clk; | |
1683 | input scan_in; | |
1684 | ||
1685 | ||
1686 | input siclk; | |
1687 | input soclk; | |
1688 | ||
1689 | output [0:0] dout; | |
1690 | output scan_out; | |
1691 | assign fdin[0:0] = (din[0:0] & {1{en}}) | (dout[0:0] & ~{1{en}}); | |
1692 | ||
1693 | ||
1694 | ||
1695 | ||
1696 | ||
1697 | ||
1698 | dff #(1) d0_0 ( | |
1699 | .l1clk(l1clk), | |
1700 | .siclk(siclk), | |
1701 | .soclk(soclk), | |
1702 | .d(fdin[0:0]), | |
1703 | .si(scan_in), | |
1704 | .so(scan_out), | |
1705 | .q(dout[0:0]) | |
1706 | ); | |
1707 | ||
1708 | ||
1709 | ||
1710 | ||
1711 | ||
1712 | ||
1713 | ||
1714 | ||
1715 | ||
1716 | ||
1717 | ||
1718 | ||
1719 | endmodule | |
1720 | ||
1721 | ||
1722 | ||
1723 | ||
1724 | ||
1725 | ||
1726 | ||
1727 | ||
1728 | ||
1729 | ||
1730 | ||
1731 | ||
1732 | ||
1733 | // any PARAMS parms go into naming of macro | |
1734 | ||
1735 | module ncu_c2iscd_ctl_l1clkhdr_ctl_macro ( | |
1736 | l2clk, | |
1737 | l1en, | |
1738 | pce_ov, | |
1739 | stop, | |
1740 | se, | |
1741 | l1clk); | |
1742 | ||
1743 | ||
1744 | input l2clk; | |
1745 | input l1en; | |
1746 | input pce_ov; | |
1747 | input stop; | |
1748 | input se; | |
1749 | output l1clk; | |
1750 | ||
1751 | ||
1752 | ||
1753 | ||
1754 | ||
1755 | cl_sc1_l1hdr_8x c_0 ( | |
1756 | ||
1757 | ||
1758 | .l2clk(l2clk), | |
1759 | .pce(l1en), | |
1760 | .l1clk(l1clk), | |
1761 | .se(se), | |
1762 | .pce_ov(pce_ov), | |
1763 | .stop(stop) | |
1764 | ); | |
1765 | ||
1766 | ||
1767 | ||
1768 | endmodule | |
1769 | ||
1770 | ||
1771 | ||
1772 | ||
1773 | ||
1774 | ||
1775 | // any PARAMS parms go into naming of macro | |
1776 | ||
1777 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_64 ( | |
1778 | din, | |
1779 | en, | |
1780 | l1clk, | |
1781 | scan_in, | |
1782 | siclk, | |
1783 | soclk, | |
1784 | dout, | |
1785 | scan_out); | |
1786 | wire [63:0] fdin; | |
1787 | wire [62:0] so; | |
1788 | ||
1789 | input [63:0] din; | |
1790 | input en; | |
1791 | input l1clk; | |
1792 | input scan_in; | |
1793 | ||
1794 | ||
1795 | input siclk; | |
1796 | input soclk; | |
1797 | ||
1798 | output [63:0] dout; | |
1799 | output scan_out; | |
1800 | assign fdin[63:0] = (din[63:0] & {64{en}}) | (dout[63:0] & ~{64{en}}); | |
1801 | ||
1802 | ||
1803 | ||
1804 | ||
1805 | ||
1806 | ||
1807 | dff #(64) d0_0 ( | |
1808 | .l1clk(l1clk), | |
1809 | .siclk(siclk), | |
1810 | .soclk(soclk), | |
1811 | .d(fdin[63:0]), | |
1812 | .si({scan_in,so[62:0]}), | |
1813 | .so({so[62:0],scan_out}), | |
1814 | .q(dout[63:0]) | |
1815 | ); | |
1816 | ||
1817 | ||
1818 | ||
1819 | ||
1820 | ||
1821 | ||
1822 | ||
1823 | ||
1824 | ||
1825 | ||
1826 | ||
1827 | ||
1828 | endmodule | |
1829 | ||
1830 | ||
1831 | ||
1832 | ||
1833 | ||
1834 | ||
1835 | ||
1836 | ||
1837 | ||
1838 | ||
1839 | ||
1840 | ||
1841 | ||
1842 | // any PARAMS parms go into naming of macro | |
1843 | ||
1844 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_40 ( | |
1845 | din, | |
1846 | en, | |
1847 | l1clk, | |
1848 | scan_in, | |
1849 | siclk, | |
1850 | soclk, | |
1851 | dout, | |
1852 | scan_out); | |
1853 | wire [39:0] fdin; | |
1854 | wire [38:0] so; | |
1855 | ||
1856 | input [39:0] din; | |
1857 | input en; | |
1858 | input l1clk; | |
1859 | input scan_in; | |
1860 | ||
1861 | ||
1862 | input siclk; | |
1863 | input soclk; | |
1864 | ||
1865 | output [39:0] dout; | |
1866 | output scan_out; | |
1867 | assign fdin[39:0] = (din[39:0] & {40{en}}) | (dout[39:0] & ~{40{en}}); | |
1868 | ||
1869 | ||
1870 | ||
1871 | ||
1872 | ||
1873 | ||
1874 | dff #(40) d0_0 ( | |
1875 | .l1clk(l1clk), | |
1876 | .siclk(siclk), | |
1877 | .soclk(soclk), | |
1878 | .d(fdin[39:0]), | |
1879 | .si({scan_in,so[38:0]}), | |
1880 | .so({so[38:0],scan_out}), | |
1881 | .q(dout[39:0]) | |
1882 | ); | |
1883 | ||
1884 | ||
1885 | ||
1886 | ||
1887 | ||
1888 | ||
1889 | ||
1890 | ||
1891 | ||
1892 | ||
1893 | ||
1894 | ||
1895 | endmodule | |
1896 | ||
1897 | ||
1898 | ||
1899 | ||
1900 | ||
1901 | ||
1902 | ||
1903 | ||
1904 | ||
1905 | ||
1906 | ||
1907 | ||
1908 | ||
1909 | // any PARAMS parms go into naming of macro | |
1910 | ||
1911 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_2 ( | |
1912 | din, | |
1913 | en, | |
1914 | l1clk, | |
1915 | scan_in, | |
1916 | siclk, | |
1917 | soclk, | |
1918 | dout, | |
1919 | scan_out); | |
1920 | wire [1:0] fdin; | |
1921 | wire [0:0] so; | |
1922 | ||
1923 | input [1:0] din; | |
1924 | input en; | |
1925 | input l1clk; | |
1926 | input scan_in; | |
1927 | ||
1928 | ||
1929 | input siclk; | |
1930 | input soclk; | |
1931 | ||
1932 | output [1:0] dout; | |
1933 | output scan_out; | |
1934 | assign fdin[1:0] = (din[1:0] & {2{en}}) | (dout[1:0] & ~{2{en}}); | |
1935 | ||
1936 | ||
1937 | ||
1938 | ||
1939 | ||
1940 | ||
1941 | dff #(2) d0_0 ( | |
1942 | .l1clk(l1clk), | |
1943 | .siclk(siclk), | |
1944 | .soclk(soclk), | |
1945 | .d(fdin[1:0]), | |
1946 | .si({scan_in,so[0:0]}), | |
1947 | .so({so[0:0],scan_out}), | |
1948 | .q(dout[1:0]) | |
1949 | ); | |
1950 | ||
1951 | ||
1952 | ||
1953 | ||
1954 | ||
1955 | ||
1956 | ||
1957 | ||
1958 | ||
1959 | ||
1960 | ||
1961 | ||
1962 | endmodule | |
1963 | ||
1964 | ||
1965 | ||
1966 | ||
1967 | ||
1968 | ||
1969 | ||
1970 | ||
1971 | ||
1972 | ||
1973 | ||
1974 | ||
1975 | ||
1976 | // any PARAMS parms go into naming of macro | |
1977 | ||
1978 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_6 ( | |
1979 | din, | |
1980 | en, | |
1981 | l1clk, | |
1982 | scan_in, | |
1983 | siclk, | |
1984 | soclk, | |
1985 | dout, | |
1986 | scan_out); | |
1987 | wire [5:0] fdin; | |
1988 | wire [4:0] so; | |
1989 | ||
1990 | input [5:0] din; | |
1991 | input en; | |
1992 | input l1clk; | |
1993 | input scan_in; | |
1994 | ||
1995 | ||
1996 | input siclk; | |
1997 | input soclk; | |
1998 | ||
1999 | output [5:0] dout; | |
2000 | output scan_out; | |
2001 | assign fdin[5:0] = (din[5:0] & {6{en}}) | (dout[5:0] & ~{6{en}}); | |
2002 | ||
2003 | ||
2004 | ||
2005 | ||
2006 | ||
2007 | ||
2008 | dff #(6) d0_0 ( | |
2009 | .l1clk(l1clk), | |
2010 | .siclk(siclk), | |
2011 | .soclk(soclk), | |
2012 | .d(fdin[5:0]), | |
2013 | .si({scan_in,so[4:0]}), | |
2014 | .so({so[4:0],scan_out}), | |
2015 | .q(dout[5:0]) | |
2016 | ); | |
2017 | ||
2018 | ||
2019 | ||
2020 | ||
2021 | ||
2022 | ||
2023 | ||
2024 | ||
2025 | ||
2026 | ||
2027 | ||
2028 | ||
2029 | endmodule | |
2030 | ||
2031 | ||
2032 | ||
2033 | ||
2034 | ||
2035 | ||
2036 | ||
2037 | ||
2038 | ||
2039 | ||
2040 | ||
2041 | ||
2042 | ||
2043 | // any PARAMS parms go into naming of macro | |
2044 | ||
2045 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_25 ( | |
2046 | din, | |
2047 | en, | |
2048 | l1clk, | |
2049 | scan_in, | |
2050 | siclk, | |
2051 | soclk, | |
2052 | dout, | |
2053 | scan_out); | |
2054 | wire [24:0] fdin; | |
2055 | wire [23:0] so; | |
2056 | ||
2057 | input [24:0] din; | |
2058 | input en; | |
2059 | input l1clk; | |
2060 | input scan_in; | |
2061 | ||
2062 | ||
2063 | input siclk; | |
2064 | input soclk; | |
2065 | ||
2066 | output [24:0] dout; | |
2067 | output scan_out; | |
2068 | assign fdin[24:0] = (din[24:0] & {25{en}}) | (dout[24:0] & ~{25{en}}); | |
2069 | ||
2070 | ||
2071 | ||
2072 | ||
2073 | ||
2074 | ||
2075 | dff #(25) d0_0 ( | |
2076 | .l1clk(l1clk), | |
2077 | .siclk(siclk), | |
2078 | .soclk(soclk), | |
2079 | .d(fdin[24:0]), | |
2080 | .si({scan_in,so[23:0]}), | |
2081 | .so({so[23:0],scan_out}), | |
2082 | .q(dout[24:0]) | |
2083 | ); | |
2084 | ||
2085 | ||
2086 | ||
2087 | ||
2088 | ||
2089 | ||
2090 | ||
2091 | ||
2092 | ||
2093 | ||
2094 | ||
2095 | ||
2096 | endmodule | |
2097 | ||
2098 | ||
2099 | ||
2100 | ||
2101 | ||
2102 | ||
2103 | ||
2104 | ||
2105 | ||
2106 | ||
2107 | ||
2108 | ||
2109 | ||
2110 | // any PARAMS parms go into naming of macro | |
2111 | ||
2112 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_128 ( | |
2113 | din, | |
2114 | en, | |
2115 | l1clk, | |
2116 | scan_in, | |
2117 | siclk, | |
2118 | soclk, | |
2119 | dout, | |
2120 | scan_out); | |
2121 | wire [127:0] fdin; | |
2122 | wire [126:0] so; | |
2123 | ||
2124 | input [127:0] din; | |
2125 | input en; | |
2126 | input l1clk; | |
2127 | input scan_in; | |
2128 | ||
2129 | ||
2130 | input siclk; | |
2131 | input soclk; | |
2132 | ||
2133 | output [127:0] dout; | |
2134 | output scan_out; | |
2135 | assign fdin[127:0] = (din[127:0] & {128{en}}) | (dout[127:0] & ~{128{en}}); | |
2136 | ||
2137 | ||
2138 | ||
2139 | ||
2140 | ||
2141 | ||
2142 | dff #(128) d0_0 ( | |
2143 | .l1clk(l1clk), | |
2144 | .siclk(siclk), | |
2145 | .soclk(soclk), | |
2146 | .d(fdin[127:0]), | |
2147 | .si({scan_in,so[126:0]}), | |
2148 | .so({so[126:0],scan_out}), | |
2149 | .q(dout[127:0]) | |
2150 | ); | |
2151 | ||
2152 | ||
2153 | ||
2154 | ||
2155 | ||
2156 | ||
2157 | ||
2158 | ||
2159 | ||
2160 | ||
2161 | ||
2162 | ||
2163 | endmodule | |
2164 | ||
2165 | ||
2166 | ||
2167 | ||
2168 | ||
2169 | ||
2170 | ||
2171 | ||
2172 | ||
2173 | ||
2174 | ||
2175 | ||
2176 | ||
2177 | // any PARAMS parms go into naming of macro | |
2178 | ||
2179 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_55 ( | |
2180 | din, | |
2181 | en, | |
2182 | l1clk, | |
2183 | scan_in, | |
2184 | siclk, | |
2185 | soclk, | |
2186 | dout, | |
2187 | scan_out); | |
2188 | wire [54:0] fdin; | |
2189 | wire [53:0] so; | |
2190 | ||
2191 | input [54:0] din; | |
2192 | input en; | |
2193 | input l1clk; | |
2194 | input scan_in; | |
2195 | ||
2196 | ||
2197 | input siclk; | |
2198 | input soclk; | |
2199 | ||
2200 | output [54:0] dout; | |
2201 | output scan_out; | |
2202 | assign fdin[54:0] = (din[54:0] & {55{en}}) | (dout[54:0] & ~{55{en}}); | |
2203 | ||
2204 | ||
2205 | ||
2206 | ||
2207 | ||
2208 | ||
2209 | dff #(55) d0_0 ( | |
2210 | .l1clk(l1clk), | |
2211 | .siclk(siclk), | |
2212 | .soclk(soclk), | |
2213 | .d(fdin[54:0]), | |
2214 | .si({scan_in,so[53:0]}), | |
2215 | .so({so[53:0],scan_out}), | |
2216 | .q(dout[54:0]) | |
2217 | ); | |
2218 | ||
2219 | ||
2220 | ||
2221 | ||
2222 | ||
2223 | ||
2224 | ||
2225 | ||
2226 | ||
2227 | ||
2228 | ||
2229 | ||
2230 | endmodule | |
2231 | ||
2232 | ||
2233 | ||
2234 | ||
2235 | ||
2236 | ||
2237 | ||
2238 | ||
2239 | ||
2240 | ||
2241 | ||
2242 | ||
2243 | ||
2244 | // any PARAMS parms go into naming of macro | |
2245 | ||
2246 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_22 ( | |
2247 | din, | |
2248 | en, | |
2249 | l1clk, | |
2250 | scan_in, | |
2251 | siclk, | |
2252 | soclk, | |
2253 | dout, | |
2254 | scan_out); | |
2255 | wire [21:0] fdin; | |
2256 | wire [20:0] so; | |
2257 | ||
2258 | input [21:0] din; | |
2259 | input en; | |
2260 | input l1clk; | |
2261 | input scan_in; | |
2262 | ||
2263 | ||
2264 | input siclk; | |
2265 | input soclk; | |
2266 | ||
2267 | output [21:0] dout; | |
2268 | output scan_out; | |
2269 | assign fdin[21:0] = (din[21:0] & {22{en}}) | (dout[21:0] & ~{22{en}}); | |
2270 | ||
2271 | ||
2272 | ||
2273 | ||
2274 | ||
2275 | ||
2276 | dff #(22) d0_0 ( | |
2277 | .l1clk(l1clk), | |
2278 | .siclk(siclk), | |
2279 | .soclk(soclk), | |
2280 | .d(fdin[21:0]), | |
2281 | .si({scan_in,so[20:0]}), | |
2282 | .so({so[20:0],scan_out}), | |
2283 | .q(dout[21:0]) | |
2284 | ); | |
2285 | ||
2286 | ||
2287 | ||
2288 | ||
2289 | ||
2290 | ||
2291 | ||
2292 | ||
2293 | ||
2294 | ||
2295 | ||
2296 | ||
2297 | endmodule | |
2298 | ||
2299 | ||
2300 | ||
2301 | ||
2302 | ||
2303 | ||
2304 | ||
2305 | ||
2306 | ||
2307 | ||
2308 | ||
2309 | ||
2310 | ||
2311 | // any PARAMS parms go into naming of macro | |
2312 | ||
2313 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_20 ( | |
2314 | din, | |
2315 | en, | |
2316 | l1clk, | |
2317 | scan_in, | |
2318 | siclk, | |
2319 | soclk, | |
2320 | dout, | |
2321 | scan_out); | |
2322 | wire [19:0] fdin; | |
2323 | wire [18:0] so; | |
2324 | ||
2325 | input [19:0] din; | |
2326 | input en; | |
2327 | input l1clk; | |
2328 | input scan_in; | |
2329 | ||
2330 | ||
2331 | input siclk; | |
2332 | input soclk; | |
2333 | ||
2334 | output [19:0] dout; | |
2335 | output scan_out; | |
2336 | assign fdin[19:0] = (din[19:0] & {20{en}}) | (dout[19:0] & ~{20{en}}); | |
2337 | ||
2338 | ||
2339 | ||
2340 | ||
2341 | ||
2342 | ||
2343 | dff #(20) d0_0 ( | |
2344 | .l1clk(l1clk), | |
2345 | .siclk(siclk), | |
2346 | .soclk(soclk), | |
2347 | .d(fdin[19:0]), | |
2348 | .si({scan_in,so[18:0]}), | |
2349 | .so({so[18:0],scan_out}), | |
2350 | .q(dout[19:0]) | |
2351 | ); | |
2352 | ||
2353 | ||
2354 | ||
2355 | ||
2356 | ||
2357 | ||
2358 | ||
2359 | ||
2360 | ||
2361 | ||
2362 | ||
2363 | ||
2364 | endmodule | |
2365 | ||
2366 | ||
2367 | ||
2368 | ||
2369 | ||
2370 | ||
2371 | ||
2372 | ||
2373 | ||
2374 | ||
2375 | ||
2376 | ||
2377 | ||
2378 | // any PARAMS parms go into naming of macro | |
2379 | ||
2380 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_8 ( | |
2381 | din, | |
2382 | en, | |
2383 | l1clk, | |
2384 | scan_in, | |
2385 | siclk, | |
2386 | soclk, | |
2387 | dout, | |
2388 | scan_out); | |
2389 | wire [7:0] fdin; | |
2390 | wire [6:0] so; | |
2391 | ||
2392 | input [7:0] din; | |
2393 | input en; | |
2394 | input l1clk; | |
2395 | input scan_in; | |
2396 | ||
2397 | ||
2398 | input siclk; | |
2399 | input soclk; | |
2400 | ||
2401 | output [7:0] dout; | |
2402 | output scan_out; | |
2403 | assign fdin[7:0] = (din[7:0] & {8{en}}) | (dout[7:0] & ~{8{en}}); | |
2404 | ||
2405 | ||
2406 | ||
2407 | ||
2408 | ||
2409 | ||
2410 | dff #(8) d0_0 ( | |
2411 | .l1clk(l1clk), | |
2412 | .siclk(siclk), | |
2413 | .soclk(soclk), | |
2414 | .d(fdin[7:0]), | |
2415 | .si({scan_in,so[6:0]}), | |
2416 | .so({so[6:0],scan_out}), | |
2417 | .q(dout[7:0]) | |
2418 | ); | |
2419 | ||
2420 | ||
2421 | ||
2422 | ||
2423 | ||
2424 | ||
2425 | ||
2426 | ||
2427 | ||
2428 | ||
2429 | ||
2430 | ||
2431 | endmodule | |
2432 | ||
2433 | ||
2434 | ||
2435 | ||
2436 | ||
2437 | ||
2438 | ||
2439 | ||
2440 | ||
2441 | ||
2442 | ||
2443 | ||
2444 | ||
2445 | // any PARAMS parms go into naming of macro | |
2446 | ||
2447 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_12 ( | |
2448 | din, | |
2449 | en, | |
2450 | l1clk, | |
2451 | scan_in, | |
2452 | siclk, | |
2453 | soclk, | |
2454 | dout, | |
2455 | scan_out); | |
2456 | wire [11:0] fdin; | |
2457 | wire [10:0] so; | |
2458 | ||
2459 | input [11:0] din; | |
2460 | input en; | |
2461 | input l1clk; | |
2462 | input scan_in; | |
2463 | ||
2464 | ||
2465 | input siclk; | |
2466 | input soclk; | |
2467 | ||
2468 | output [11:0] dout; | |
2469 | output scan_out; | |
2470 | assign fdin[11:0] = (din[11:0] & {12{en}}) | (dout[11:0] & ~{12{en}}); | |
2471 | ||
2472 | ||
2473 | ||
2474 | ||
2475 | ||
2476 | ||
2477 | dff #(12) d0_0 ( | |
2478 | .l1clk(l1clk), | |
2479 | .siclk(siclk), | |
2480 | .soclk(soclk), | |
2481 | .d(fdin[11:0]), | |
2482 | .si({scan_in,so[10:0]}), | |
2483 | .so({so[10:0],scan_out}), | |
2484 | .q(dout[11:0]) | |
2485 | ); | |
2486 | ||
2487 | ||
2488 | ||
2489 | ||
2490 | ||
2491 | ||
2492 | ||
2493 | ||
2494 | ||
2495 | ||
2496 | ||
2497 | ||
2498 | endmodule | |
2499 | ||
2500 | ||
2501 | ||
2502 | ||
2503 | ||
2504 | ||
2505 | ||
2506 | ||
2507 | ||
2508 | ||
2509 | ||
2510 | ||
2511 | ||
2512 | // any PARAMS parms go into naming of macro | |
2513 | ||
2514 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_24 ( | |
2515 | din, | |
2516 | en, | |
2517 | l1clk, | |
2518 | scan_in, | |
2519 | siclk, | |
2520 | soclk, | |
2521 | dout, | |
2522 | scan_out); | |
2523 | wire [23:0] fdin; | |
2524 | wire [22:0] so; | |
2525 | ||
2526 | input [23:0] din; | |
2527 | input en; | |
2528 | input l1clk; | |
2529 | input scan_in; | |
2530 | ||
2531 | ||
2532 | input siclk; | |
2533 | input soclk; | |
2534 | ||
2535 | output [23:0] dout; | |
2536 | output scan_out; | |
2537 | assign fdin[23:0] = (din[23:0] & {24{en}}) | (dout[23:0] & ~{24{en}}); | |
2538 | ||
2539 | ||
2540 | ||
2541 | ||
2542 | ||
2543 | ||
2544 | dff #(24) d0_0 ( | |
2545 | .l1clk(l1clk), | |
2546 | .siclk(siclk), | |
2547 | .soclk(soclk), | |
2548 | .d(fdin[23:0]), | |
2549 | .si({scan_in,so[22:0]}), | |
2550 | .so({so[22:0],scan_out}), | |
2551 | .q(dout[23:0]) | |
2552 | ); | |
2553 | ||
2554 | ||
2555 | ||
2556 | ||
2557 | ||
2558 | ||
2559 | ||
2560 | ||
2561 | ||
2562 | ||
2563 | ||
2564 | ||
2565 | endmodule | |
2566 | ||
2567 | ||
2568 | ||
2569 | ||
2570 | ||
2571 | ||
2572 | ||
2573 | ||
2574 | ||
2575 | ||
2576 | ||
2577 | ||
2578 | ||
2579 | // any PARAMS parms go into naming of macro | |
2580 | ||
2581 | module ncu_c2iscd_ctl_msff_ctl_macro__width_64 ( | |
2582 | din, | |
2583 | l1clk, | |
2584 | scan_in, | |
2585 | siclk, | |
2586 | soclk, | |
2587 | dout, | |
2588 | scan_out); | |
2589 | wire [63:0] fdin; | |
2590 | wire [62:0] so; | |
2591 | ||
2592 | input [63:0] din; | |
2593 | input l1clk; | |
2594 | input scan_in; | |
2595 | ||
2596 | ||
2597 | input siclk; | |
2598 | input soclk; | |
2599 | ||
2600 | output [63:0] dout; | |
2601 | output scan_out; | |
2602 | assign fdin[63:0] = din[63:0]; | |
2603 | ||
2604 | ||
2605 | ||
2606 | ||
2607 | ||
2608 | ||
2609 | dff #(64) d0_0 ( | |
2610 | .l1clk(l1clk), | |
2611 | .siclk(siclk), | |
2612 | .soclk(soclk), | |
2613 | .d(fdin[63:0]), | |
2614 | .si({scan_in,so[62:0]}), | |
2615 | .so({so[62:0],scan_out}), | |
2616 | .q(dout[63:0]) | |
2617 | ); | |
2618 | ||
2619 | ||
2620 | ||
2621 | ||
2622 | ||
2623 | ||
2624 | ||
2625 | ||
2626 | ||
2627 | ||
2628 | ||
2629 | ||
2630 | endmodule | |
2631 | ||
2632 | ||
2633 | ||
2634 | ||
2635 | ||
2636 | ||
2637 | ||
2638 | ||
2639 | ||
2640 | ||
2641 | ||
2642 | ||
2643 | ||
2644 | // any PARAMS parms go into naming of macro | |
2645 | ||
2646 | module ncu_c2iscd_ctl_msff_ctl_macro__width_8 ( | |
2647 | din, | |
2648 | l1clk, | |
2649 | scan_in, | |
2650 | siclk, | |
2651 | soclk, | |
2652 | dout, | |
2653 | scan_out); | |
2654 | wire [7:0] fdin; | |
2655 | wire [6:0] so; | |
2656 | ||
2657 | input [7:0] din; | |
2658 | input l1clk; | |
2659 | input scan_in; | |
2660 | ||
2661 | ||
2662 | input siclk; | |
2663 | input soclk; | |
2664 | ||
2665 | output [7:0] dout; | |
2666 | output scan_out; | |
2667 | assign fdin[7:0] = din[7:0]; | |
2668 | ||
2669 | ||
2670 | ||
2671 | ||
2672 | ||
2673 | ||
2674 | dff #(8) d0_0 ( | |
2675 | .l1clk(l1clk), | |
2676 | .siclk(siclk), | |
2677 | .soclk(soclk), | |
2678 | .d(fdin[7:0]), | |
2679 | .si({scan_in,so[6:0]}), | |
2680 | .so({so[6:0],scan_out}), | |
2681 | .q(dout[7:0]) | |
2682 | ); | |
2683 | ||
2684 | ||
2685 | ||
2686 | ||
2687 | ||
2688 | ||
2689 | ||
2690 | ||
2691 | ||
2692 | ||
2693 | ||
2694 | ||
2695 | endmodule | |
2696 | ||
2697 | ||
2698 | ||
2699 | ||
2700 | ||
2701 | ||
2702 | ||
2703 | ||
2704 | ||
2705 | ||
2706 | ||
2707 | ||
2708 | ||
2709 | // any PARAMS parms go into naming of macro | |
2710 | ||
2711 | module ncu_c2iscd_ctl_msffi_ctl_macro__width_1 ( | |
2712 | din, | |
2713 | l1clk, | |
2714 | scan_in, | |
2715 | siclk, | |
2716 | soclk, | |
2717 | q_l, | |
2718 | scan_out); | |
2719 | input [0:0] din; | |
2720 | input l1clk; | |
2721 | input scan_in; | |
2722 | ||
2723 | ||
2724 | input siclk; | |
2725 | input soclk; | |
2726 | ||
2727 | output [0:0] q_l; | |
2728 | output scan_out; | |
2729 | ||
2730 | ||
2731 | ||
2732 | ||
2733 | ||
2734 | ||
2735 | msffi #(1) d0_0 ( | |
2736 | .l1clk(l1clk), | |
2737 | .siclk(siclk), | |
2738 | .soclk(soclk), | |
2739 | .d(din[0:0]), | |
2740 | .si(scan_in), | |
2741 | .so(scan_out), | |
2742 | .q_l(q_l[0:0]) | |
2743 | ); | |
2744 | ||
2745 | ||
2746 | ||
2747 | ||
2748 | ||
2749 | ||
2750 | ||
2751 | ||
2752 | ||
2753 | ||
2754 | ||
2755 | ||
2756 | endmodule | |
2757 | ||
2758 | ||
2759 | ||
2760 | ||
2761 | ||
2762 | ||
2763 | ||
2764 | ||
2765 | ||
2766 | ||
2767 | ||
2768 | ||
2769 | ||
2770 | // any PARAMS parms go into naming of macro | |
2771 | ||
2772 | module ncu_c2iscd_ctl_msff_ctl_macro__width_56 ( | |
2773 | din, | |
2774 | l1clk, | |
2775 | scan_in, | |
2776 | siclk, | |
2777 | soclk, | |
2778 | dout, | |
2779 | scan_out); | |
2780 | wire [55:0] fdin; | |
2781 | wire [54:0] so; | |
2782 | ||
2783 | input [55:0] din; | |
2784 | input l1clk; | |
2785 | input scan_in; | |
2786 | ||
2787 | ||
2788 | input siclk; | |
2789 | input soclk; | |
2790 | ||
2791 | output [55:0] dout; | |
2792 | output scan_out; | |
2793 | assign fdin[55:0] = din[55:0]; | |
2794 | ||
2795 | ||
2796 | ||
2797 | ||
2798 | ||
2799 | ||
2800 | dff #(56) d0_0 ( | |
2801 | .l1clk(l1clk), | |
2802 | .siclk(siclk), | |
2803 | .soclk(soclk), | |
2804 | .d(fdin[55:0]), | |
2805 | .si({scan_in,so[54:0]}), | |
2806 | .so({so[54:0],scan_out}), | |
2807 | .q(dout[55:0]) | |
2808 | ); | |
2809 | ||
2810 | ||
2811 | ||
2812 | ||
2813 | ||
2814 | ||
2815 | ||
2816 | ||
2817 | ||
2818 | ||
2819 | ||
2820 | ||
2821 | endmodule | |
2822 | ||
2823 | ||
2824 | ||
2825 | ||
2826 | ||
2827 | ||
2828 | ||
2829 | ||
2830 | ||
2831 | ||
2832 | ||
2833 | ||
2834 | ||
2835 | // any PARAMS parms go into naming of macro | |
2836 | ||
2837 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_3 ( | |
2838 | din, | |
2839 | en, | |
2840 | l1clk, | |
2841 | scan_in, | |
2842 | siclk, | |
2843 | soclk, | |
2844 | dout, | |
2845 | scan_out); | |
2846 | wire [2:0] fdin; | |
2847 | wire [1:0] so; | |
2848 | ||
2849 | input [2:0] din; | |
2850 | input en; | |
2851 | input l1clk; | |
2852 | input scan_in; | |
2853 | ||
2854 | ||
2855 | input siclk; | |
2856 | input soclk; | |
2857 | ||
2858 | output [2:0] dout; | |
2859 | output scan_out; | |
2860 | assign fdin[2:0] = (din[2:0] & {3{en}}) | (dout[2:0] & ~{3{en}}); | |
2861 | ||
2862 | ||
2863 | ||
2864 | ||
2865 | ||
2866 | ||
2867 | dff #(3) d0_0 ( | |
2868 | .l1clk(l1clk), | |
2869 | .siclk(siclk), | |
2870 | .soclk(soclk), | |
2871 | .d(fdin[2:0]), | |
2872 | .si({scan_in,so[1:0]}), | |
2873 | .so({so[1:0],scan_out}), | |
2874 | .q(dout[2:0]) | |
2875 | ); | |
2876 | ||
2877 | ||
2878 | ||
2879 | ||
2880 | ||
2881 | ||
2882 | ||
2883 | ||
2884 | ||
2885 | ||
2886 | ||
2887 | ||
2888 | endmodule | |
2889 | ||
2890 | ||
2891 | ||
2892 | ||
2893 | ||
2894 | ||
2895 | ||
2896 | ||
2897 | ||
2898 | ||
2899 | ||
2900 | ||
2901 | ||
2902 | // any PARAMS parms go into naming of macro | |
2903 | ||
2904 | module ncu_c2iscd_ctl_msff_ctl_macro__width_63 ( | |
2905 | din, | |
2906 | l1clk, | |
2907 | scan_in, | |
2908 | siclk, | |
2909 | soclk, | |
2910 | dout, | |
2911 | scan_out); | |
2912 | wire [62:0] fdin; | |
2913 | wire [61:0] so; | |
2914 | ||
2915 | input [62:0] din; | |
2916 | input l1clk; | |
2917 | input scan_in; | |
2918 | ||
2919 | ||
2920 | input siclk; | |
2921 | input soclk; | |
2922 | ||
2923 | output [62:0] dout; | |
2924 | output scan_out; | |
2925 | assign fdin[62:0] = din[62:0]; | |
2926 | ||
2927 | ||
2928 | ||
2929 | ||
2930 | ||
2931 | ||
2932 | dff #(63) d0_0 ( | |
2933 | .l1clk(l1clk), | |
2934 | .siclk(siclk), | |
2935 | .soclk(soclk), | |
2936 | .d(fdin[62:0]), | |
2937 | .si({scan_in,so[61:0]}), | |
2938 | .so({so[61:0],scan_out}), | |
2939 | .q(dout[62:0]) | |
2940 | ); | |
2941 | ||
2942 | ||
2943 | ||
2944 | ||
2945 | ||
2946 | ||
2947 | ||
2948 | ||
2949 | ||
2950 | ||
2951 | ||
2952 | ||
2953 | endmodule | |
2954 | ||
2955 | ||
2956 | ||
2957 | ||
2958 | ||
2959 | ||
2960 | ||
2961 | ||
2962 | ||
2963 | ||
2964 | ||
2965 | ||
2966 | ||
2967 | // any PARAMS parms go into naming of macro | |
2968 | ||
2969 | module ncu_c2iscd_ctl_msff_ctl_macro__width_5 ( | |
2970 | din, | |
2971 | l1clk, | |
2972 | scan_in, | |
2973 | siclk, | |
2974 | soclk, | |
2975 | dout, | |
2976 | scan_out); | |
2977 | wire [4:0] fdin; | |
2978 | wire [3:0] so; | |
2979 | ||
2980 | input [4:0] din; | |
2981 | input l1clk; | |
2982 | input scan_in; | |
2983 | ||
2984 | ||
2985 | input siclk; | |
2986 | input soclk; | |
2987 | ||
2988 | output [4:0] dout; | |
2989 | output scan_out; | |
2990 | assign fdin[4:0] = din[4:0]; | |
2991 | ||
2992 | ||
2993 | ||
2994 | ||
2995 | ||
2996 | ||
2997 | dff #(5) d0_0 ( | |
2998 | .l1clk(l1clk), | |
2999 | .siclk(siclk), | |
3000 | .soclk(soclk), | |
3001 | .d(fdin[4:0]), | |
3002 | .si({scan_in,so[3:0]}), | |
3003 | .so({so[3:0],scan_out}), | |
3004 | .q(dout[4:0]) | |
3005 | ); | |
3006 | ||
3007 | ||
3008 | ||
3009 | ||
3010 | ||
3011 | ||
3012 | ||
3013 | ||
3014 | ||
3015 | ||
3016 | ||
3017 | ||
3018 | endmodule | |
3019 | ||
3020 | ||
3021 | ||
3022 | ||
3023 | ||
3024 | ||
3025 | ||
3026 | ||
3027 | ||
3028 | ||
3029 | ||
3030 | ||
3031 | ||
3032 | // any PARAMS parms go into naming of macro | |
3033 | ||
3034 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_5 ( | |
3035 | din, | |
3036 | en, | |
3037 | l1clk, | |
3038 | scan_in, | |
3039 | siclk, | |
3040 | soclk, | |
3041 | dout, | |
3042 | scan_out); | |
3043 | wire [4:0] fdin; | |
3044 | wire [3:0] so; | |
3045 | ||
3046 | input [4:0] din; | |
3047 | input en; | |
3048 | input l1clk; | |
3049 | input scan_in; | |
3050 | ||
3051 | ||
3052 | input siclk; | |
3053 | input soclk; | |
3054 | ||
3055 | output [4:0] dout; | |
3056 | output scan_out; | |
3057 | assign fdin[4:0] = (din[4:0] & {5{en}}) | (dout[4:0] & ~{5{en}}); | |
3058 | ||
3059 | ||
3060 | ||
3061 | ||
3062 | ||
3063 | ||
3064 | dff #(5) d0_0 ( | |
3065 | .l1clk(l1clk), | |
3066 | .siclk(siclk), | |
3067 | .soclk(soclk), | |
3068 | .d(fdin[4:0]), | |
3069 | .si({scan_in,so[3:0]}), | |
3070 | .so({so[3:0],scan_out}), | |
3071 | .q(dout[4:0]) | |
3072 | ); | |
3073 | ||
3074 | ||
3075 | ||
3076 | ||
3077 | ||
3078 | ||
3079 | ||
3080 | ||
3081 | ||
3082 | ||
3083 | ||
3084 | ||
3085 | endmodule | |
3086 | ||
3087 | ||
3088 | ||
3089 | ||
3090 | ||
3091 | ||
3092 | ||
3093 | ||
3094 | ||
3095 | ||
3096 | ||
3097 | ||
3098 | ||
3099 | // any PARAMS parms go into naming of macro | |
3100 | ||
3101 | module ncu_c2iscd_ctl_msff_ctl_macro__width_43 ( | |
3102 | din, | |
3103 | l1clk, | |
3104 | scan_in, | |
3105 | siclk, | |
3106 | soclk, | |
3107 | dout, | |
3108 | scan_out); | |
3109 | wire [42:0] fdin; | |
3110 | wire [41:0] so; | |
3111 | ||
3112 | input [42:0] din; | |
3113 | input l1clk; | |
3114 | input scan_in; | |
3115 | ||
3116 | ||
3117 | input siclk; | |
3118 | input soclk; | |
3119 | ||
3120 | output [42:0] dout; | |
3121 | output scan_out; | |
3122 | assign fdin[42:0] = din[42:0]; | |
3123 | ||
3124 | ||
3125 | ||
3126 | ||
3127 | ||
3128 | ||
3129 | dff #(43) d0_0 ( | |
3130 | .l1clk(l1clk), | |
3131 | .siclk(siclk), | |
3132 | .soclk(soclk), | |
3133 | .d(fdin[42:0]), | |
3134 | .si({scan_in,so[41:0]}), | |
3135 | .so({so[41:0],scan_out}), | |
3136 | .q(dout[42:0]) | |
3137 | ); | |
3138 | ||
3139 | ||
3140 | ||
3141 | ||
3142 | ||
3143 | ||
3144 | ||
3145 | ||
3146 | ||
3147 | ||
3148 | ||
3149 | ||
3150 | endmodule | |
3151 | ||
3152 | ||
3153 | ||
3154 | ||
3155 | ||
3156 | ||
3157 | ||
3158 | ||
3159 | ||
3160 | ||
3161 | ||
3162 | ||
3163 | ||
3164 | // any PARAMS parms go into naming of macro | |
3165 | ||
3166 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_43 ( | |
3167 | din, | |
3168 | en, | |
3169 | l1clk, | |
3170 | scan_in, | |
3171 | siclk, | |
3172 | soclk, | |
3173 | dout, | |
3174 | scan_out); | |
3175 | wire [42:0] fdin; | |
3176 | wire [41:0] so; | |
3177 | ||
3178 | input [42:0] din; | |
3179 | input en; | |
3180 | input l1clk; | |
3181 | input scan_in; | |
3182 | ||
3183 | ||
3184 | input siclk; | |
3185 | input soclk; | |
3186 | ||
3187 | output [42:0] dout; | |
3188 | output scan_out; | |
3189 | assign fdin[42:0] = (din[42:0] & {43{en}}) | (dout[42:0] & ~{43{en}}); | |
3190 | ||
3191 | ||
3192 | ||
3193 | ||
3194 | ||
3195 | ||
3196 | dff #(43) d0_0 ( | |
3197 | .l1clk(l1clk), | |
3198 | .siclk(siclk), | |
3199 | .soclk(soclk), | |
3200 | .d(fdin[42:0]), | |
3201 | .si({scan_in,so[41:0]}), | |
3202 | .so({so[41:0],scan_out}), | |
3203 | .q(dout[42:0]) | |
3204 | ); | |
3205 | ||
3206 | ||
3207 | ||
3208 | ||
3209 | ||
3210 | ||
3211 | ||
3212 | ||
3213 | ||
3214 | ||
3215 | ||
3216 | ||
3217 | endmodule | |
3218 | ||
3219 | ||
3220 | ||
3221 | ||
3222 | ||
3223 | ||
3224 | ||
3225 | ||
3226 | ||
3227 | ||
3228 | ||
3229 | ||
3230 | ||
3231 | // any PARAMS parms go into naming of macro | |
3232 | ||
3233 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_59 ( | |
3234 | din, | |
3235 | en, | |
3236 | l1clk, | |
3237 | scan_in, | |
3238 | siclk, | |
3239 | soclk, | |
3240 | dout, | |
3241 | scan_out); | |
3242 | wire [58:0] fdin; | |
3243 | wire [57:0] so; | |
3244 | ||
3245 | input [58:0] din; | |
3246 | input en; | |
3247 | input l1clk; | |
3248 | input scan_in; | |
3249 | ||
3250 | ||
3251 | input siclk; | |
3252 | input soclk; | |
3253 | ||
3254 | output [58:0] dout; | |
3255 | output scan_out; | |
3256 | assign fdin[58:0] = (din[58:0] & {59{en}}) | (dout[58:0] & ~{59{en}}); | |
3257 | ||
3258 | ||
3259 | ||
3260 | ||
3261 | ||
3262 | ||
3263 | dff #(59) d0_0 ( | |
3264 | .l1clk(l1clk), | |
3265 | .siclk(siclk), | |
3266 | .soclk(soclk), | |
3267 | .d(fdin[58:0]), | |
3268 | .si({scan_in,so[57:0]}), | |
3269 | .so({so[57:0],scan_out}), | |
3270 | .q(dout[58:0]) | |
3271 | ); | |
3272 | ||
3273 | ||
3274 | ||
3275 | ||
3276 | ||
3277 | ||
3278 | ||
3279 | ||
3280 | ||
3281 | ||
3282 | ||
3283 | ||
3284 | endmodule | |
3285 | ||
3286 | ||
3287 | ||
3288 | ||
3289 | ||
3290 | ||
3291 | ||
3292 | ||
3293 | ||
3294 | ||
3295 | ||
3296 | ||
3297 | ||
3298 | // any PARAMS parms go into naming of macro | |
3299 | ||
3300 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_61 ( | |
3301 | din, | |
3302 | en, | |
3303 | l1clk, | |
3304 | scan_in, | |
3305 | siclk, | |
3306 | soclk, | |
3307 | dout, | |
3308 | scan_out); | |
3309 | wire [60:0] fdin; | |
3310 | wire [59:0] so; | |
3311 | ||
3312 | input [60:0] din; | |
3313 | input en; | |
3314 | input l1clk; | |
3315 | input scan_in; | |
3316 | ||
3317 | ||
3318 | input siclk; | |
3319 | input soclk; | |
3320 | ||
3321 | output [60:0] dout; | |
3322 | output scan_out; | |
3323 | assign fdin[60:0] = (din[60:0] & {61{en}}) | (dout[60:0] & ~{61{en}}); | |
3324 | ||
3325 | ||
3326 | ||
3327 | ||
3328 | ||
3329 | ||
3330 | dff #(61) d0_0 ( | |
3331 | .l1clk(l1clk), | |
3332 | .siclk(siclk), | |
3333 | .soclk(soclk), | |
3334 | .d(fdin[60:0]), | |
3335 | .si({scan_in,so[59:0]}), | |
3336 | .so({so[59:0],scan_out}), | |
3337 | .q(dout[60:0]) | |
3338 | ); | |
3339 | ||
3340 | ||
3341 | ||
3342 | ||
3343 | ||
3344 | ||
3345 | ||
3346 | ||
3347 | ||
3348 | ||
3349 | ||
3350 | ||
3351 | endmodule | |
3352 | ||
3353 | ||
3354 | ||
3355 | ||
3356 | ||
3357 | ||
3358 | ||
3359 | ||
3360 | ||
3361 | ||
3362 | ||
3363 | ||
3364 | ||
3365 | // any PARAMS parms go into naming of macro | |
3366 | ||
3367 | module ncu_c2iscd_ctl_msff_ctl_macro__width_2 ( | |
3368 | din, | |
3369 | l1clk, | |
3370 | scan_in, | |
3371 | siclk, | |
3372 | soclk, | |
3373 | dout, | |
3374 | scan_out); | |
3375 | wire [1:0] fdin; | |
3376 | wire [0:0] so; | |
3377 | ||
3378 | input [1:0] din; | |
3379 | input l1clk; | |
3380 | input scan_in; | |
3381 | ||
3382 | ||
3383 | input siclk; | |
3384 | input soclk; | |
3385 | ||
3386 | output [1:0] dout; | |
3387 | output scan_out; | |
3388 | assign fdin[1:0] = din[1:0]; | |
3389 | ||
3390 | ||
3391 | ||
3392 | ||
3393 | ||
3394 | ||
3395 | dff #(2) d0_0 ( | |
3396 | .l1clk(l1clk), | |
3397 | .siclk(siclk), | |
3398 | .soclk(soclk), | |
3399 | .d(fdin[1:0]), | |
3400 | .si({scan_in,so[0:0]}), | |
3401 | .so({so[0:0],scan_out}), | |
3402 | .q(dout[1:0]) | |
3403 | ); | |
3404 | ||
3405 | ||
3406 | ||
3407 | ||
3408 | ||
3409 | ||
3410 | ||
3411 | ||
3412 | ||
3413 | ||
3414 | ||
3415 | ||
3416 | endmodule | |
3417 | ||
3418 | ||
3419 | ||
3420 | ||
3421 | // any PARAMS parms go into naming of macro | |
3422 | ||
3423 | module ncu_c2iscd_ctl_msff_ctl_macro__width_9 ( | |
3424 | din, | |
3425 | l1clk, | |
3426 | scan_in, | |
3427 | siclk, | |
3428 | soclk, | |
3429 | dout, | |
3430 | scan_out); | |
3431 | wire [8:0] fdin; | |
3432 | wire [7:0] so; | |
3433 | ||
3434 | input [8:0] din; | |
3435 | input l1clk; | |
3436 | input scan_in; | |
3437 | ||
3438 | ||
3439 | input siclk; | |
3440 | input soclk; | |
3441 | ||
3442 | output [8:0] dout; | |
3443 | output scan_out; | |
3444 | assign fdin[8:0] = din[8:0]; | |
3445 | ||
3446 | ||
3447 | ||
3448 | ||
3449 | ||
3450 | ||
3451 | dff #(9) d0_0 ( | |
3452 | .l1clk(l1clk), | |
3453 | .siclk(siclk), | |
3454 | .soclk(soclk), | |
3455 | .d(fdin[8:0]), | |
3456 | .si({scan_in,so[7:0]}), | |
3457 | .so({so[7:0],scan_out}), | |
3458 | .q(dout[8:0]) | |
3459 | ); | |
3460 | ||
3461 | ||
3462 | ||
3463 | ||
3464 | ||
3465 | ||
3466 | ||
3467 | ||
3468 | ||
3469 | ||
3470 | ||
3471 | ||
3472 | endmodule | |
3473 | ||
3474 | ||
3475 | ||
3476 | ||
3477 | ||
3478 | ||
3479 | ||
3480 | ||
3481 | ||
3482 | ||
3483 | ||
3484 | ||
3485 | ||
3486 | // any PARAMS parms go into naming of macro | |
3487 | ||
3488 | module ncu_c2iscd_ctl_msff_ctl_macro__width_7 ( | |
3489 | din, | |
3490 | l1clk, | |
3491 | scan_in, | |
3492 | siclk, | |
3493 | soclk, | |
3494 | dout, | |
3495 | scan_out); | |
3496 | wire [6:0] fdin; | |
3497 | wire [5:0] so; | |
3498 | ||
3499 | input [6:0] din; | |
3500 | input l1clk; | |
3501 | input scan_in; | |
3502 | ||
3503 | ||
3504 | input siclk; | |
3505 | input soclk; | |
3506 | ||
3507 | output [6:0] dout; | |
3508 | output scan_out; | |
3509 | assign fdin[6:0] = din[6:0]; | |
3510 | ||
3511 | ||
3512 | ||
3513 | ||
3514 | ||
3515 | ||
3516 | dff #(7) d0_0 ( | |
3517 | .l1clk(l1clk), | |
3518 | .siclk(siclk), | |
3519 | .soclk(soclk), | |
3520 | .d(fdin[6:0]), | |
3521 | .si({scan_in,so[5:0]}), | |
3522 | .so({so[5:0],scan_out}), | |
3523 | .q(dout[6:0]) | |
3524 | ); | |
3525 | ||
3526 | ||
3527 | ||
3528 | ||
3529 | ||
3530 | ||
3531 | ||
3532 | ||
3533 | ||
3534 | ||
3535 | ||
3536 | ||
3537 | endmodule | |
3538 | ||
3539 | ||
3540 | ||
3541 | ||
3542 | ||
3543 | ||
3544 | ||
3545 | ||
3546 | ||
3547 | ||
3548 | ||
3549 | ||
3550 | ||
3551 | // any PARAMS parms go into naming of macro | |
3552 | ||
3553 | module ncu_c2iscd_ctl_msff_ctl_macro__width_4 ( | |
3554 | din, | |
3555 | l1clk, | |
3556 | scan_in, | |
3557 | siclk, | |
3558 | soclk, | |
3559 | dout, | |
3560 | scan_out); | |
3561 | wire [3:0] fdin; | |
3562 | wire [2:0] so; | |
3563 | ||
3564 | input [3:0] din; | |
3565 | input l1clk; | |
3566 | input scan_in; | |
3567 | ||
3568 | ||
3569 | input siclk; | |
3570 | input soclk; | |
3571 | ||
3572 | output [3:0] dout; | |
3573 | output scan_out; | |
3574 | assign fdin[3:0] = din[3:0]; | |
3575 | ||
3576 | ||
3577 | ||
3578 | ||
3579 | ||
3580 | ||
3581 | dff #(4) d0_0 ( | |
3582 | .l1clk(l1clk), | |
3583 | .siclk(siclk), | |
3584 | .soclk(soclk), | |
3585 | .d(fdin[3:0]), | |
3586 | .si({scan_in,so[2:0]}), | |
3587 | .so({so[2:0],scan_out}), | |
3588 | .q(dout[3:0]) | |
3589 | ); | |
3590 | ||
3591 | ||
3592 | ||
3593 | ||
3594 | ||
3595 | ||
3596 | ||
3597 | ||
3598 | ||
3599 | ||
3600 | ||
3601 | ||
3602 | endmodule | |
3603 | ||
3604 | ||
3605 | ||
3606 | ||
3607 | ||
3608 | ||
3609 | ||
3610 | ||
3611 | ||
3612 | ||
3613 | ||
3614 | ||
3615 | ||
3616 | // any PARAMS parms go into naming of macro | |
3617 | ||
3618 | module ncu_c2iscd_ctl_msff_ctl_macro__width_40 ( | |
3619 | din, | |
3620 | l1clk, | |
3621 | scan_in, | |
3622 | siclk, | |
3623 | soclk, | |
3624 | dout, | |
3625 | scan_out); | |
3626 | wire [39:0] fdin; | |
3627 | wire [38:0] so; | |
3628 | ||
3629 | input [39:0] din; | |
3630 | input l1clk; | |
3631 | input scan_in; | |
3632 | ||
3633 | ||
3634 | input siclk; | |
3635 | input soclk; | |
3636 | ||
3637 | output [39:0] dout; | |
3638 | output scan_out; | |
3639 | assign fdin[39:0] = din[39:0]; | |
3640 | ||
3641 | ||
3642 | ||
3643 | ||
3644 | ||
3645 | ||
3646 | dff #(40) d0_0 ( | |
3647 | .l1clk(l1clk), | |
3648 | .siclk(siclk), | |
3649 | .soclk(soclk), | |
3650 | .d(fdin[39:0]), | |
3651 | .si({scan_in,so[38:0]}), | |
3652 | .so({so[38:0],scan_out}), | |
3653 | .q(dout[39:0]) | |
3654 | ); | |
3655 | ||
3656 | ||
3657 | ||
3658 | ||
3659 | ||
3660 | ||
3661 | ||
3662 | ||
3663 | ||
3664 | ||
3665 | ||
3666 | ||
3667 | endmodule | |
3668 | ||
3669 | ||
3670 | ||
3671 | ||
3672 | ||
3673 | ||
3674 | ||
3675 | ||
3676 | ||
3677 | ||
3678 | ||
3679 | ||
3680 | ||
3681 | // any PARAMS parms go into naming of macro | |
3682 | ||
3683 | module ncu_c2iscd_ctl_msff_ctl_macro__width_23 ( | |
3684 | din, | |
3685 | l1clk, | |
3686 | scan_in, | |
3687 | siclk, | |
3688 | soclk, | |
3689 | dout, | |
3690 | scan_out); | |
3691 | wire [22:0] fdin; | |
3692 | wire [21:0] so; | |
3693 | ||
3694 | input [22:0] din; | |
3695 | input l1clk; | |
3696 | input scan_in; | |
3697 | ||
3698 | ||
3699 | input siclk; | |
3700 | input soclk; | |
3701 | ||
3702 | output [22:0] dout; | |
3703 | output scan_out; | |
3704 | assign fdin[22:0] = din[22:0]; | |
3705 | ||
3706 | ||
3707 | ||
3708 | ||
3709 | ||
3710 | ||
3711 | dff #(23) d0_0 ( | |
3712 | .l1clk(l1clk), | |
3713 | .siclk(siclk), | |
3714 | .soclk(soclk), | |
3715 | .d(fdin[22:0]), | |
3716 | .si({scan_in,so[21:0]}), | |
3717 | .so({so[21:0],scan_out}), | |
3718 | .q(dout[22:0]) | |
3719 | ); | |
3720 | ||
3721 | ||
3722 | ||
3723 | ||
3724 | ||
3725 | ||
3726 | ||
3727 | ||
3728 | ||
3729 | ||
3730 | ||
3731 | ||
3732 | endmodule | |
3733 | ||
3734 | ||
3735 | ||
3736 | ||
3737 | ||
3738 | ||
3739 | ||
3740 | ||
3741 | ||
3742 | ||
3743 | ||
3744 | ||
3745 | ||
3746 | // any PARAMS parms go into naming of macro | |
3747 | ||
3748 | module ncu_c2iscd_ctl_msff_ctl_macro__width_3 ( | |
3749 | din, | |
3750 | l1clk, | |
3751 | scan_in, | |
3752 | siclk, | |
3753 | soclk, | |
3754 | dout, | |
3755 | scan_out); | |
3756 | wire [2:0] fdin; | |
3757 | wire [1:0] so; | |
3758 | ||
3759 | input [2:0] din; | |
3760 | input l1clk; | |
3761 | input scan_in; | |
3762 | ||
3763 | ||
3764 | input siclk; | |
3765 | input soclk; | |
3766 | ||
3767 | output [2:0] dout; | |
3768 | output scan_out; | |
3769 | assign fdin[2:0] = din[2:0]; | |
3770 | ||
3771 | ||
3772 | ||
3773 | ||
3774 | ||
3775 | ||
3776 | dff #(3) d0_0 ( | |
3777 | .l1clk(l1clk), | |
3778 | .siclk(siclk), | |
3779 | .soclk(soclk), | |
3780 | .d(fdin[2:0]), | |
3781 | .si({scan_in,so[1:0]}), | |
3782 | .so({so[1:0],scan_out}), | |
3783 | .q(dout[2:0]) | |
3784 | ); | |
3785 | ||
3786 | ||
3787 | ||
3788 | ||
3789 | ||
3790 | ||
3791 | ||
3792 | ||
3793 | ||
3794 | ||
3795 | ||
3796 | ||
3797 | endmodule | |
3798 | ||
3799 | ||
3800 | ||
3801 | ||
3802 | ||
3803 | ||
3804 | // any PARAMS parms go into naming of macro | |
3805 | ||
3806 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_144 ( | |
3807 | din, | |
3808 | en, | |
3809 | l1clk, | |
3810 | scan_in, | |
3811 | siclk, | |
3812 | soclk, | |
3813 | dout, | |
3814 | scan_out); | |
3815 | wire [143:0] fdin; | |
3816 | wire [142:0] so; | |
3817 | ||
3818 | input [143:0] din; | |
3819 | input en; | |
3820 | input l1clk; | |
3821 | input scan_in; | |
3822 | ||
3823 | ||
3824 | input siclk; | |
3825 | input soclk; | |
3826 | ||
3827 | output [143:0] dout; | |
3828 | output scan_out; | |
3829 | assign fdin[143:0] = (din[143:0] & {144{en}}) | (dout[143:0] & ~{144{en}}); | |
3830 | ||
3831 | ||
3832 | ||
3833 | ||
3834 | ||
3835 | ||
3836 | dff #(144) d0_0 ( | |
3837 | .l1clk(l1clk), | |
3838 | .siclk(siclk), | |
3839 | .soclk(soclk), | |
3840 | .d(fdin[143:0]), | |
3841 | .si({scan_in,so[142:0]}), | |
3842 | .so({so[142:0],scan_out}), | |
3843 | .q(dout[143:0]) | |
3844 | ); | |
3845 | ||
3846 | ||
3847 | ||
3848 | ||
3849 | ||
3850 | ||
3851 | ||
3852 | ||
3853 | ||
3854 | ||
3855 | ||
3856 | ||
3857 | endmodule | |
3858 | ||
3859 | ||
3860 | ||
3861 | ||
3862 | ||
3863 | ||
3864 | // any PARAMS parms go into naming of macro | |
3865 | ||
3866 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_129 ( | |
3867 | din, | |
3868 | en, | |
3869 | l1clk, | |
3870 | scan_in, | |
3871 | siclk, | |
3872 | soclk, | |
3873 | dout, | |
3874 | scan_out); | |
3875 | wire [128:0] fdin; | |
3876 | wire [127:0] so; | |
3877 | ||
3878 | input [128:0] din; | |
3879 | input en; | |
3880 | input l1clk; | |
3881 | input scan_in; | |
3882 | ||
3883 | ||
3884 | input siclk; | |
3885 | input soclk; | |
3886 | ||
3887 | output [128:0] dout; | |
3888 | output scan_out; | |
3889 | assign fdin[128:0] = (din[128:0] & {129{en}}) | (dout[128:0] & ~{129{en}}); | |
3890 | ||
3891 | ||
3892 | ||
3893 | ||
3894 | ||
3895 | ||
3896 | dff #(129) d0_0 ( | |
3897 | .l1clk(l1clk), | |
3898 | .siclk(siclk), | |
3899 | .soclk(soclk), | |
3900 | .d(fdin[128:0]), | |
3901 | .si({scan_in,so[127:0]}), | |
3902 | .so({so[127:0],scan_out}), | |
3903 | .q(dout[128:0]) | |
3904 | ); | |
3905 | ||
3906 | ||
3907 | ||
3908 | ||
3909 | ||
3910 | ||
3911 | ||
3912 | ||
3913 | ||
3914 | ||
3915 | ||
3916 | ||
3917 | endmodule | |
3918 | ||
3919 | ||
3920 | ||
3921 | ||
3922 | ||
3923 | ||
3924 | ||
3925 | ||
3926 | ||
3927 | ||
3928 | ||
3929 | ||
3930 | ||
3931 | // any PARAMS parms go into naming of macro | |
3932 | ||
3933 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_51 ( | |
3934 | din, | |
3935 | en, | |
3936 | l1clk, | |
3937 | scan_in, | |
3938 | siclk, | |
3939 | soclk, | |
3940 | dout, | |
3941 | scan_out); | |
3942 | wire [50:0] fdin; | |
3943 | wire [49:0] so; | |
3944 | ||
3945 | input [50:0] din; | |
3946 | input en; | |
3947 | input l1clk; | |
3948 | input scan_in; | |
3949 | ||
3950 | ||
3951 | input siclk; | |
3952 | input soclk; | |
3953 | ||
3954 | output [50:0] dout; | |
3955 | output scan_out; | |
3956 | assign fdin[50:0] = (din[50:0] & {51{en}}) | (dout[50:0] & ~{51{en}}); | |
3957 | ||
3958 | ||
3959 | ||
3960 | ||
3961 | ||
3962 | ||
3963 | dff #(51) d0_0 ( | |
3964 | .l1clk(l1clk), | |
3965 | .siclk(siclk), | |
3966 | .soclk(soclk), | |
3967 | .d(fdin[50:0]), | |
3968 | .si({scan_in,so[49:0]}), | |
3969 | .so({so[49:0],scan_out}), | |
3970 | .q(dout[50:0]) | |
3971 | ); | |
3972 | ||
3973 | ||
3974 | ||
3975 | ||
3976 | ||
3977 | ||
3978 | ||
3979 | ||
3980 | ||
3981 | ||
3982 | ||
3983 | ||
3984 | endmodule | |
3985 | ||
3986 | ||
3987 | ||
3988 | ||
3989 | // any PARAMS parms go into naming of macro | |
3990 | ||
3991 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_127 ( | |
3992 | din, | |
3993 | en, | |
3994 | l1clk, | |
3995 | scan_in, | |
3996 | siclk, | |
3997 | soclk, | |
3998 | dout, | |
3999 | scan_out); | |
4000 | wire [126:0] fdin; | |
4001 | wire [125:0] so; | |
4002 | ||
4003 | input [126:0] din; | |
4004 | input en; | |
4005 | input l1clk; | |
4006 | input scan_in; | |
4007 | ||
4008 | ||
4009 | input siclk; | |
4010 | input soclk; | |
4011 | ||
4012 | output [126:0] dout; | |
4013 | output scan_out; | |
4014 | assign fdin[126:0] = (din[126:0] & {127{en}}) | (dout[126:0] & ~{127{en}}); | |
4015 | ||
4016 | ||
4017 | ||
4018 | ||
4019 | ||
4020 | ||
4021 | dff #(127) d0_0 ( | |
4022 | .l1clk(l1clk), | |
4023 | .siclk(siclk), | |
4024 | .soclk(soclk), | |
4025 | .d(fdin[126:0]), | |
4026 | .si({scan_in,so[125:0]}), | |
4027 | .so({so[125:0],scan_out}), | |
4028 | .q(dout[126:0]) | |
4029 | ); | |
4030 | ||
4031 | ||
4032 | ||
4033 | ||
4034 | ||
4035 | ||
4036 | ||
4037 | ||
4038 | ||
4039 | ||
4040 | ||
4041 | ||
4042 | endmodule | |
4043 | ||
4044 | ||
4045 | ||
4046 | ||
4047 | ||
4048 | ||
4049 | ||
4050 | ||
4051 | ||
4052 | ||
4053 | ||
4054 | ||
4055 | ||
4056 | // any PARAMS parms go into naming of macro | |
4057 | ||
4058 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_47 ( | |
4059 | din, | |
4060 | en, | |
4061 | l1clk, | |
4062 | scan_in, | |
4063 | siclk, | |
4064 | soclk, | |
4065 | dout, | |
4066 | scan_out); | |
4067 | wire [46:0] fdin; | |
4068 | wire [45:0] so; | |
4069 | ||
4070 | input [46:0] din; | |
4071 | input en; | |
4072 | input l1clk; | |
4073 | input scan_in; | |
4074 | ||
4075 | ||
4076 | input siclk; | |
4077 | input soclk; | |
4078 | ||
4079 | output [46:0] dout; | |
4080 | output scan_out; | |
4081 | assign fdin[46:0] = (din[46:0] & {47{en}}) | (dout[46:0] & ~{47{en}}); | |
4082 | ||
4083 | ||
4084 | ||
4085 | ||
4086 | ||
4087 | ||
4088 | dff #(47) d0_0 ( | |
4089 | .l1clk(l1clk), | |
4090 | .siclk(siclk), | |
4091 | .soclk(soclk), | |
4092 | .d(fdin[46:0]), | |
4093 | .si({scan_in,so[45:0]}), | |
4094 | .so({so[45:0],scan_out}), | |
4095 | .q(dout[46:0]) | |
4096 | ); | |
4097 | ||
4098 | ||
4099 | ||
4100 | ||
4101 | ||
4102 | ||
4103 | ||
4104 | ||
4105 | ||
4106 | ||
4107 | ||
4108 | ||
4109 | endmodule | |
4110 | ||
4111 | ||
4112 | ||
4113 | ||
4114 | ||
4115 | ||
4116 | ||
4117 | ||
4118 | ||
4119 | ||
4120 | ||
4121 | ||
4122 | ||
4123 | // any PARAMS parms go into naming of macro | |
4124 | ||
4125 | module ncu_c2iscd_ctl_msff_ctl_macro__width_16 ( | |
4126 | din, | |
4127 | l1clk, | |
4128 | scan_in, | |
4129 | siclk, | |
4130 | soclk, | |
4131 | dout, | |
4132 | scan_out); | |
4133 | wire [15:0] fdin; | |
4134 | wire [14:0] so; | |
4135 | ||
4136 | input [15:0] din; | |
4137 | input l1clk; | |
4138 | input scan_in; | |
4139 | ||
4140 | ||
4141 | input siclk; | |
4142 | input soclk; | |
4143 | ||
4144 | output [15:0] dout; | |
4145 | output scan_out; | |
4146 | assign fdin[15:0] = din[15:0]; | |
4147 | ||
4148 | ||
4149 | ||
4150 | ||
4151 | ||
4152 | ||
4153 | dff #(16) d0_0 ( | |
4154 | .l1clk(l1clk), | |
4155 | .siclk(siclk), | |
4156 | .soclk(soclk), | |
4157 | .d(fdin[15:0]), | |
4158 | .si({scan_in,so[14:0]}), | |
4159 | .so({so[14:0],scan_out}), | |
4160 | .q(dout[15:0]) | |
4161 | ); | |
4162 | ||
4163 | ||
4164 | ||
4165 | ||
4166 | ||
4167 | ||
4168 | ||
4169 | ||
4170 | ||
4171 | ||
4172 | ||
4173 | ||
4174 | endmodule | |
4175 | ||
4176 | ||
4177 | ||
4178 | ||
4179 | // any PARAMS parms go into naming of macro | |
4180 | ||
4181 | module ncu_c2iscd_ctl_msff_ctl_macro__width_128 ( | |
4182 | din, | |
4183 | l1clk, | |
4184 | scan_in, | |
4185 | siclk, | |
4186 | soclk, | |
4187 | dout, | |
4188 | scan_out); | |
4189 | wire [127:0] fdin; | |
4190 | wire [126:0] so; | |
4191 | ||
4192 | input [127:0] din; | |
4193 | input l1clk; | |
4194 | input scan_in; | |
4195 | ||
4196 | ||
4197 | input siclk; | |
4198 | input soclk; | |
4199 | ||
4200 | output [127:0] dout; | |
4201 | output scan_out; | |
4202 | assign fdin[127:0] = din[127:0]; | |
4203 | ||
4204 | ||
4205 | ||
4206 | ||
4207 | ||
4208 | ||
4209 | dff #(128) d0_0 ( | |
4210 | .l1clk(l1clk), | |
4211 | .siclk(siclk), | |
4212 | .soclk(soclk), | |
4213 | .d(fdin[127:0]), | |
4214 | .si({scan_in,so[126:0]}), | |
4215 | .so({so[126:0],scan_out}), | |
4216 | .q(dout[127:0]) | |
4217 | ); | |
4218 | ||
4219 | ||
4220 | ||
4221 | ||
4222 | ||
4223 | ||
4224 | ||
4225 | ||
4226 | ||
4227 | ||
4228 | ||
4229 | ||
4230 | endmodule | |
4231 | ||
4232 | ||
4233 | ||
4234 | ||
4235 | ||
4236 | ||
4237 | ||
4238 | // any PARAMS parms go into naming of macro | |
4239 | ||
4240 | module ncu_c2iscd_ctl_msff_ctl_macro__width_32 ( | |
4241 | din, | |
4242 | l1clk, | |
4243 | scan_in, | |
4244 | siclk, | |
4245 | soclk, | |
4246 | dout, | |
4247 | scan_out); | |
4248 | wire [31:0] fdin; | |
4249 | wire [30:0] so; | |
4250 | ||
4251 | input [31:0] din; | |
4252 | input l1clk; | |
4253 | input scan_in; | |
4254 | ||
4255 | ||
4256 | input siclk; | |
4257 | input soclk; | |
4258 | ||
4259 | output [31:0] dout; | |
4260 | output scan_out; | |
4261 | assign fdin[31:0] = din[31:0]; | |
4262 | ||
4263 | ||
4264 | ||
4265 | ||
4266 | ||
4267 | ||
4268 | dff #(32) d0_0 ( | |
4269 | .l1clk(l1clk), | |
4270 | .siclk(siclk), | |
4271 | .soclk(soclk), | |
4272 | .d(fdin[31:0]), | |
4273 | .si({scan_in,so[30:0]}), | |
4274 | .so({so[30:0],scan_out}), | |
4275 | .q(dout[31:0]) | |
4276 | ); | |
4277 | ||
4278 | ||
4279 | ||
4280 | ||
4281 | ||
4282 | ||
4283 | ||
4284 | ||
4285 | ||
4286 | ||
4287 | ||
4288 | ||
4289 | endmodule | |
4290 | ||
4291 | ||
4292 | ||
4293 | ||
4294 | ||
4295 | ||
4296 | // any PARAMS parms go into naming of macro | |
4297 | ||
4298 | module ncu_c2iscd_ctl_msff_ctl_macro__en_1__width_16 ( | |
4299 | din, | |
4300 | en, | |
4301 | l1clk, | |
4302 | scan_in, | |
4303 | siclk, | |
4304 | soclk, | |
4305 | dout, | |
4306 | scan_out); | |
4307 | wire [15:0] fdin; | |
4308 | wire [14:0] so; | |
4309 | ||
4310 | input [15:0] din; | |
4311 | input en; | |
4312 | input l1clk; | |
4313 | input scan_in; | |
4314 | ||
4315 | ||
4316 | input siclk; | |
4317 | input soclk; | |
4318 | ||
4319 | output [15:0] dout; | |
4320 | output scan_out; | |
4321 | assign fdin[15:0] = (din[15:0] & {16{en}}) | (dout[15:0] & ~{16{en}}); | |
4322 | ||
4323 | ||
4324 | ||
4325 | ||
4326 | ||
4327 | ||
4328 | dff #(16) d0_0 ( | |
4329 | .l1clk(l1clk), | |
4330 | .siclk(siclk), | |
4331 | .soclk(soclk), | |
4332 | .d(fdin[15:0]), | |
4333 | .si({scan_in,so[14:0]}), | |
4334 | .so({so[14:0],scan_out}), | |
4335 | .q(dout[15:0]) | |
4336 | ); | |
4337 | ||
4338 | ||
4339 | ||
4340 | ||
4341 | ||
4342 | ||
4343 | ||
4344 | ||
4345 | ||
4346 | ||
4347 | ||
4348 | ||
4349 | endmodule | |
4350 | ||
4351 | ||
4352 | ||
4353 | ||
4354 | ||
4355 | ||
4356 | ||
4357 |