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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / niu / rtl / niu_pio_fifo16d.v
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: niu_pio_fifo16d.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
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8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
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16// GNU General Public License for more details.
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34// ========== Copyright Header End ============================================
35/*%W% %G%*/
36
37/*************************************************************************
38 *
39 * File Name : niu_pio_fifo16d.v
40 * Author Name : John Lo
41 * Description : This is a 16 deep, 112 bit wide FIFO.
42 * Parent Module: niu
43 * Child Module:
44 * Interface Mod: many.
45 * Date Created : 3/29/2004
46 *
47 * Copyright (c) 2020, Sun Microsystems, Inc.
48 * Sun Proprietary and Confidential
49 *
50 * Modification :
51 *
52 * Synthesis Notes:
53 *
54 *************************************************************************/
55`include "niu_pio.h"
56
57module niu_pio_fifo16d(
58clk,
59reset,
60rd,
61wr,
62din,
63dout,
64pio_peu_afull,
65full,
66empty,
67rd_ptr,
68wr_ptr
69);
70
71/* 0in fifo
72 -enq wr
73 -deq rd
74 -depth 16
75 -value -enq_data din -deq_data dout
76 -clock clk
77 -reset reset
78 -message "0in-ERROR : niu_pio FIFO 16d failed"
79*/
80
81 input clk;
82 input reset;
83 input rd;
84 input wr;
85 input [`PIO_FIFO_W_R] din;
86 output [`PIO_FIFO_W_R] dout;
87 output pio_peu_afull;
88 output full;
89 output empty;
90 output [`PIO_FIFO_PTR] rd_ptr;
91 output [`PIO_FIFO_PTR] wr_ptr;
92
93 wire ld0;
94 wire ld1;
95 wire ld2;
96 wire ld3;
97 wire ld4;
98 wire ld5;
99 wire ld6;
100 wire ld7;
101 wire ld8;
102 wire ld9;
103 wire lda;
104 wire ldb;
105 wire ldc;
106 wire ldd;
107 wire lde;
108 wire ldf;
109 wire [`PIO_FIFO_W_R] word0;
110 wire [`PIO_FIFO_W_R] word1;
111 wire [`PIO_FIFO_W_R] word2;
112 wire [`PIO_FIFO_W_R] word3;
113 wire [`PIO_FIFO_W_R] word4;
114 wire [`PIO_FIFO_W_R] word5;
115 wire [`PIO_FIFO_W_R] word6;
116 wire [`PIO_FIFO_W_R] word7;
117 wire [`PIO_FIFO_W_R] word8;
118 wire [`PIO_FIFO_W_R] word9;
119 wire [`PIO_FIFO_W_R] worda;
120 wire [`PIO_FIFO_W_R] wordb;
121 wire [`PIO_FIFO_W_R] wordc;
122 wire [`PIO_FIFO_W_R] wordd;
123 wire [`PIO_FIFO_W_R] worde;
124 wire [`PIO_FIFO_W_R] wordf;
125 wire [`PIO_FIFO_PTR] rd_ptr;
126 wire [`PIO_FIFO_PTR] wr_ptr;
127 wire [`PIO_FIFO_W_R] din;
128 reg [`PIO_FIFO_W_R] dout;
129
130 wire full = (rd_ptr[`PIO_FIFO_A_R] == wr_ptr[`PIO_FIFO_A_R]) & (rd_ptr[`PIO_FIFO_A]!=wr_ptr[`PIO_FIFO_A]);
131
132 wire empty = (rd_ptr[`PIO_FIFO_PTR] == wr_ptr[`PIO_FIFO_PTR]);
133
134 wire [`PIO_FIFO_PTR] empty_space =
135 (wr_ptr[`PIO_FIFO_A] == rd_ptr[`PIO_FIFO_A]) ?
136 `PIO_FIFO_D - ({1'b0,wr_ptr[`PIO_FIFO_A_R]} - {1'b0,rd_ptr[`PIO_FIFO_A_R]}):
137 ({1'b0,rd_ptr[`PIO_FIFO_A_R]} - {1'b0,wr_ptr[`PIO_FIFO_A_R]}) ;
138
139 wire afull = empty_space < 5'd2;
140 reg pio_peu_afull;
141
142 always @ (posedge clk)
143 begin
144 if (reset)
145 pio_peu_afull <= 1'b0;
146 else
147 pio_peu_afull <= afull;
148 end
149
150 wire wr_en = ~full & wr;
151 wire rd_en = ~empty & rd;
152
153 wire [`PIO_FIFO_PTR] wr_ptr_in = wr_en ? wr_ptr + 1 : wr_ptr;
154 wire [`PIO_FIFO_PTR] rd_ptr_in = rd_en ? rd_ptr + 1 : rd_ptr;
155dffr #(5) wr_ptr_dffr(.d(wr_ptr_in),.reset(reset),.clk(clk),.q(wr_ptr));
156dffr #(5) rd_ptr_dffr(.d(rd_ptr_in),.reset(reset),.clk(clk),.q(rd_ptr));
157
158 assign ld0 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h0) & wr_en);
159 assign ld1 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h1) & wr_en);
160 assign ld2 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h2) & wr_en);
161 assign ld3 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h3) & wr_en);
162 assign ld4 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h4) & wr_en);
163 assign ld5 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h5) & wr_en);
164 assign ld6 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h6) & wr_en);
165 assign ld7 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h7) & wr_en);
166 assign ld8 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h8) & wr_en);
167 assign ld9 = ((wr_ptr[`PIO_FIFO_A_R] == 4'h9) & wr_en);
168 assign lda = ((wr_ptr[`PIO_FIFO_A_R] == 4'ha) & wr_en);
169 assign ldb = ((wr_ptr[`PIO_FIFO_A_R] == 4'hb) & wr_en);
170 assign ldc = ((wr_ptr[`PIO_FIFO_A_R] == 4'hc) & wr_en);
171 assign ldd = ((wr_ptr[`PIO_FIFO_A_R] == 4'hd) & wr_en);
172 assign lde = ((wr_ptr[`PIO_FIFO_A_R] == 4'he) & wr_en);
173 assign ldf = ((wr_ptr[`PIO_FIFO_A_R] == 4'hf) & wr_en);
174
175dffre #(`PIO_FIFO_W) word0_dffr(.d(din),.reset(reset),.en(ld0),.clk(clk),.q(word0));
176dffre #(`PIO_FIFO_W) word1_dffr(.d(din),.reset(reset),.en(ld1),.clk(clk),.q(word1));
177dffre #(`PIO_FIFO_W) word2_dffr(.d(din),.reset(reset),.en(ld2),.clk(clk),.q(word2));
178dffre #(`PIO_FIFO_W) word3_dffr(.d(din),.reset(reset),.en(ld3),.clk(clk),.q(word3));
179dffre #(`PIO_FIFO_W) word4_dffr(.d(din),.reset(reset),.en(ld4),.clk(clk),.q(word4));
180dffre #(`PIO_FIFO_W) word5_dffr(.d(din),.reset(reset),.en(ld5),.clk(clk),.q(word5));
181dffre #(`PIO_FIFO_W) word6_dffr(.d(din),.reset(reset),.en(ld6),.clk(clk),.q(word6));
182dffre #(`PIO_FIFO_W) word7_dffr(.d(din),.reset(reset),.en(ld7),.clk(clk),.q(word7));
183dffre #(`PIO_FIFO_W) word8_dffr(.d(din),.reset(reset),.en(ld8),.clk(clk),.q(word8));
184dffre #(`PIO_FIFO_W) word9_dffr(.d(din),.reset(reset),.en(ld9),.clk(clk),.q(word9));
185dffre #(`PIO_FIFO_W) worda_dffr(.d(din),.reset(reset),.en(lda),.clk(clk),.q(worda));
186dffre #(`PIO_FIFO_W) wordb_dffr(.d(din),.reset(reset),.en(ldb),.clk(clk),.q(wordb));
187dffre #(`PIO_FIFO_W) wordc_dffr(.d(din),.reset(reset),.en(ldc),.clk(clk),.q(wordc));
188dffre #(`PIO_FIFO_W) wordd_dffr(.d(din),.reset(reset),.en(ldd),.clk(clk),.q(wordd));
189dffre #(`PIO_FIFO_W) worde_dffr(.d(din),.reset(reset),.en(lde),.clk(clk),.q(worde));
190dffre #(`PIO_FIFO_W) wordf_dffr(.d(din),.reset(reset),.en(ldf),.clk(clk),.q(wordf));
191
192// read decoder
193always @(/*AUTOSENSE*/rd_ptr or word0 or word1 or word2 or word3
194 or word4 or word5 or word6 or word7 or word8 or word9
195 or worda or wordb or wordc or wordd or worde or wordf)
196 begin
197 case (rd_ptr[`PIO_FIFO_A_R])
198 4'h0: dout = word0;
199 4'h1: dout = word1;
200 4'h2: dout = word2;
201 4'h3: dout = word3;
202 4'h4: dout = word4;
203 4'h5: dout = word5;
204 4'h6: dout = word6;
205 4'h7: dout = word7;
206 4'h8: dout = word8;
207 4'h9: dout = word9;
208 4'ha: dout = worda;
209 4'hb: dout = wordb;
210 4'hc: dout = wordc;
211 4'hd: dout = wordd;
212 4'he: dout = worde;
213 4'hf: dout = wordf;
214 default: dout = {69'b0,32'hdead_beef};
215 endcase
216 end
217
218endmodule // niu_pio_fifo16d
219
220
221
Full OpenSPARC design & verification tarball including full HDL.