Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / niu / rtl / niu_pio_ucb_out32.v
CommitLineData
86530b38
AT
1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: niu_pio_ucb_out32.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35////////////////////////////////////////////////////////////////////////////////
36//
37//
38// Copyright (C) 2003 by Sun Microsystems, Inc.
39//
40// All rights reserved. No part of this design may be reproduced,
41// stored in a retrieval system, or transmitted, in any form or by
42// any means, electronic, mechanical, photocopying, recording, or
43// otherwise, without prior written permission of Sun Microsystems,
44// Inc.
45//
46// Sun Proprietary/Confidential
47//
48//
49// Primary Contact: Jimmy.Lau@sun.com x48745
50// Description: This interface is modified based on Niagra ucb_bus_in.
51// Instaniated by UCB modules and NCU to receive
52// packets on the UCB bus. This module supports 32 bit
53// data bus in.
54//
55// Revision: 1. March 08, 2004 - John Lo
56// Changed modules name from
57// ucb_bus_out32_niu.v to niu_pio_ucb_out32
58//
59// Changed enl2clk to clk.
60//
61//
62////////////////////////////////////////////////////////////////////////////////
63
64
65module niu_pio_ucb_out32 (
66 // Global //
67 clk,
68 reset,
69 // UCB bus //
70 vld,
71 data,
72 stall,
73 // Local unit //
74 outdata_buf_busy,
75 outdata_buf_wr,
76 outdata_buf_in,
77 outdata_vec_in );
78
79
80// Globals
81input clk;
82input reset;
83
84// UCB bus interface
85output vld;
86output [31:0] data;
87input stall;
88
89// Local interface
90output outdata_buf_busy;
91input outdata_buf_wr;
92input [127:0] outdata_buf_in;
93input [3:0] outdata_vec_in;
94
95
96
97// Local signals
98wire stall_d1;
99wire [3:0] outdata_vec;
100wire [3:0] outdata_vec_next;
101wire [127:0] outdata_buf;
102wire [127:0] outdata_buf_next;
103wire load_outdata;
104wire shift_outdata;
105
106
107////////////////////////////////////////////////////////////////////////
108// Code starts here
109////////////////////////////////////////////////////////////////////////
110/************************************************************
111* UCB bus interface flops
112************************************************************/
113assign vld = outdata_vec[0];
114assign data[31:0] = outdata_buf[31:0];
115
116dffr #(1) stall_d1_ff (.d(stall),
117 .clk(clk),
118 .reset(reset),
119 .q(stall_d1) );
120
121
122/************************************************************
123* Outbound Data
124************************************************************/
125// accept new data only if there is none being processed
126assign load_outdata = outdata_buf_wr & ~outdata_buf_busy;
127
128assign outdata_buf_busy = outdata_vec[0] | stall_d1;
129
130assign shift_outdata = outdata_vec[0] & ~stall_d1;
131
132assign outdata_vec_next[3:0] = load_outdata ? outdata_vec_in[3:0]:
133 shift_outdata ? (outdata_vec[3:0] >> 1) :
134 outdata_vec[3:0];
135
136dffr #(4) outdata_vec_ff (.d(outdata_vec_next[3:0]),
137 .clk(clk),
138 .reset(reset),
139 .q(outdata_vec[3:0]) );
140
141assign outdata_buf_next[127:0] = load_outdata ? outdata_buf_in[127:0]:
142 shift_outdata ? (outdata_buf[127:0] >> 32):
143 outdata_buf[127:0];
144df1 #(96) outdata_buf_msw_ff (.d(outdata_buf_next[127:32]),
145 .clk(clk),
146 .q(outdata_buf[127:32]) );
147
148dffr #(32) outdata_buf_lsw_ff (.d(outdata_buf_next[31:0]),
149 .clk(clk),
150 .reset(reset),
151 .q(outdata_buf[31:0]) );
152
153
154endmodule // niu_pio_ucb_out32
155
156
157
158
159
160
161