Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / niu / rtl / niu_txc_mac_ifc.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: niu_txc_mac_ifc.v
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34// ========== Copyright Header End ============================================
35/*********************************************************************
36 *
37 * niu_txc_mac_ifc.v
38 *
39 * MACs to NIU TXC Grouped Interface
40 *
41 * Orignal Author(s): Rahoul Puri
42 * Modifier(s):
43 * Project(s): Neptune
44 *
45 * Copyright (c) 2005 Sun Microsystems, Inc.
46 *
47 * All Rights Reserved.
48 *
49 * This verilog model is the confidential and proprietary property of
50 * Sun Microsystems, Inc., and the possession or use of this model
51 * requires a written license from Sun Microsystems, Inc.
52 *
53 **********************************************************************/
54
55`include "timescale.v"
56
57module niu_txc_mac_ifc (
58 SysClk,
59 Reset_L,
60`ifdef NEPTUNE
61 Mac_Txc_Req3,
62 Mac_Req3,
63 Mac_Txc_Req2,
64 Mac_Req2,
65`endif
66 Mac_Txc_Req1,
67 Mac_Req1,
68 Mac_Txc_Req0,
69 Mac_Req0
70 );
71
72`include "txc_defines.h"
73
74// Global Signals
75input SysClk;
76input Reset_L;
77
78// Mac Port 0 Req Signal Flop-In->Flop-Out
79input Mac_Txc_Req0;
80
81output Mac_Req0;
82
83reg Mac_Req0;
84
85// Mac Port 1 Req Signal Flop-In->Flop-Out
86input Mac_Txc_Req1;
87
88output Mac_Req1;
89
90reg Mac_Req1;
91
92`ifdef NEPTUNE
93// Mac Port 2 Req Signal Flop-In->Flop-Out
94input Mac_Txc_Req2;
95
96output Mac_Req2;
97
98reg Mac_Req2;
99
100// Mac Port 3 Req Signal Flop-In->Flop-Out
101input Mac_Txc_Req3;
102
103output Mac_Req3;
104
105reg Mac_Req3;
106`endif
107
108/*--------------------------------------------------------------*/
109// Wires & Registers
110/*--------------------------------------------------------------*/
111
112/*--------------------------------------------------------------*/
113// Assigns
114/*--------------------------------------------------------------*/
115
116/*--------------------------------------------------------------*/
117// Logic
118/*--------------------------------------------------------------*/
119always @(posedge SysClk)
120 if (!Reset_L) Mac_Req0 <= #`SD 1'b0;
121 else Mac_Req0 <= #`SD Mac_Txc_Req0;
122
123always @(posedge SysClk)
124 if (!Reset_L) Mac_Req1 <= #`SD 1'b0;
125 else Mac_Req1 <= #`SD Mac_Txc_Req1;
126
127`ifdef NEPTUNE
128always @(posedge SysClk)
129 if (!Reset_L) Mac_Req2 <= #`SD 1'b0;
130 else Mac_Req2 <= #`SD Mac_Txc_Req2;
131
132always @(posedge SysClk)
133 if (!Reset_L) Mac_Req3 <= #`SD 1'b0;
134 else Mac_Req3 <= #`SD Mac_Txc_Req3;
135`endif
136
137
138endmodule