Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / niu / rtl / niu_zcp_fflp_intf.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: niu_zcp_fflp_intf.v
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35/*%W% %G%*/
36
37/***************************************************************
38 *
39 * File Name : niu_zcp_fflp_intf.v
40 * Author Name : John Lo
41 * Description : niu_zcp_fflp_intf
42 * Parent Module:
43 * Child Module:
44 * Interface Mod:
45 * Date Created : 3/18/05
46 *
47 * Copyright (c) 2020, Sun Microsystems, Inc.
48 * Sun Proprietary and Confidential
49 *
50 * Modification :
51 *
52 * Synthesis Notes:
53 *
54 * Design Notes: When adding more CAL states DON'T forget to
55 * modify tt_atomic_op.
56 *
57 *
58 **************************************************************/
59
60
61module niu_zcp_fflp_intf
62 (/*AUTOARG*/
63 // Outputs
64 ififo_ren, ififo_dout, ififo_overrun, ififo_state,
65 // Inputs
66 clk, fflp_reset, fflp_zcp_wr, fflp_zcp_data
67 );
68
69
70 input clk;
71 input [5:0] fflp_reset;
72 input [4:0] fflp_zcp_wr;
73 input [`IFIFO_W_R] fflp_zcp_data;// 27 bytes = 216 bits
74 // outputs
75 output [2:0] ififo_ren;
76 output [`IFIFO_W_R] ififo_dout;
77 output ififo_overrun;
78 output [2:0] ififo_state;
79
80 wire [2:0] ififo_ren;
81 wire [5:0] reset = fflp_reset;
82
83/*AUTOWIRE*/
84// Beginning of automatic wires (for undeclared instantiated-module outputs)
85wire empty; // From niu_zcp_fflp_ififo of niu_zcp_ififo.v
86wire ififo_ren1; // From niu_zcp_ififo_sm of niu_zcp_ififo_sm.v
87// End of automatics
88
89niu_zcp_ififo niu_zcp_fflp_ififo
90 (/*AUTOINST*/
91 // Outputs
92 .ififo_dout (ififo_dout[`IFIFO_W_R]),
93 .empty (empty),
94 .ififo_overrun (ififo_overrun),
95 // Inputs
96 .clk (clk),
97 .reset (reset[4:0]),
98 .ififo_ren1 (ififo_ren1),
99 .fflp_zcp_wr (fflp_zcp_wr[4:0]),
100 .fflp_zcp_data (fflp_zcp_data[`IFIFO_W_R]));
101
102niu_zcp_ififo_sm niu_zcp_ififo_sm
103 (/*AUTOINST*/
104 // Outputs
105 .ififo_ren1 (ififo_ren1),
106 .ififo_ren (ififo_ren[2:0]),
107 .ififo_state (ififo_state[2:0]),
108 // Inputs
109 .clk (clk),
110 .reset (reset[5]),
111 .empty (empty));
112
113
114
115endmodule // niu_zcp_fflp_intf
116