projects / OpenSPARC-T2-DV / blame
? search:
summary | tags | clone url | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / niu / rtl / niu_zcp_q_cal.v
CommitLineData
86530b38
AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: niu_zcp_q_cal.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35/*%W% %G%*/
36
37/*************************************************************************
38 *
39 * File Name : niu_zcp_q_cal.v
40 * Authors Name : John Lo
41 * Description : wb_HoQ, win_HoQ, cross_q_end calculation.
42 * Parent Module: niu_zcp_tt_dpath.v
43 * Child Module:
44 * Interface Mod:
45 * Date Created : 7/7/2004
46 *
47 * Copyright (c) 2020, Sun Microsystems, Inc.
48 * Sun Proprietary and Confidential
49 *
50 * Design Notes:
51 *
52 * Synthesis Notes:
53 *
54 *************************************************************************/
55
56
57module niu_zcp_q_cal
58 (/*AUTOARG*/
59 // Outputs
60 buf_req_ok, wb_HoQ, win_HoQ, cross_q_end,
61 // Inputs
62 clk, reset, ring_size, HoQ, ToQ, num_buf_requested, num_buf,
63 wb_win_buf_offset
64 );
65
66 input clk;
67 input reset;
68 input [3:0] ring_size;
69 input [15:0] HoQ;
70 input [15:0] ToQ;
71 input [5:0] num_buf_requested;
72 input [5:0] num_buf;
73 input [5:0] wb_win_buf_offset;
74 output buf_req_ok;
75 output [15:0] wb_HoQ;
76 output [15:0] win_HoQ;
77 output cross_q_end;
78
79 // has to have enough buffers for unmapping and prefetching.
80 // This is the only chance to reuquest buffers.
81 reg buf_req_ok;
82 reg [15:0] wb_HoQ;
83 reg [15:0] la_HoQ; // look ahead HoQ = wb_HoQ + num_buf
84 reg [15:0] win_HoQ;
85 reg cross_q_end;
86 reg [15:0] full_space;
87
88 // wb_win_buf_offset = first_byte_buf[5:0];
89 // num_buf_requested = wb_win_buf_offset[5:0] + dmaw_type [1:0] + reach_buf_end;
90 // num_buf_requested == num_buf_will_be_unmapped
91 wire [15:0] wb_HoQ_temp = HoQ[15:0] + {10'b0,num_buf_requested[5:0]};
92 wire [15:0] win_HoQ_temp = HoQ[15:0] + {10'b0,num_buf[5:0]};
93
94always @ (ring_size or wb_HoQ_temp or num_buf or ToQ or win_HoQ_temp)
95 begin
96 wb_HoQ = {12'b0,wb_HoQ_temp[`HOQ3_PTR]};
97 la_HoQ[`HOQ3_PTR] = num_buf[`HOQ3_PTR] + wb_HoQ[`HOQ3_PTR];
98 win_HoQ = {12'b0,win_HoQ_temp[`HOQ3_PTR]};
99 cross_q_end = win_HoQ[`HOQ3_MSB] != la_HoQ[`HOQ3_MSB];
100 full_space[`HOQ3_PTR] =(ToQ[`HOQ3_MSB]==la_HoQ[`HOQ3_MSB]) ? ({1'b0,ToQ[`HOQ3_A]} - {1'b0,la_HoQ[`HOQ3_A]})
101 : (`HOQ3_D - ({1'b0,la_HoQ[`HOQ3_A]}-{1'b0,ToQ[`HOQ3_A]}));
102 buf_req_ok = full_space[`HOQ3_PTR] > 0;
103 casex (ring_size[3:0]) // synopsys parallel_case full_case
104 4'd0 : begin // 8 buffer pointers; [3:0]
105 wb_HoQ = {12'b0,wb_HoQ_temp[`HOQ3_PTR]};
106 la_HoQ[`HOQ3_PTR] = num_buf[`HOQ3_PTR] + wb_HoQ[`HOQ3_PTR];
107 win_HoQ = {12'b0,win_HoQ_temp[`HOQ3_PTR]};
108 cross_q_end = win_HoQ[`HOQ3_MSB] != la_HoQ[`HOQ3_MSB];
109 full_space[`HOQ3_PTR] =(ToQ[`HOQ3_MSB]==la_HoQ[`HOQ3_MSB]) ? ({1'b0,ToQ[`HOQ3_A]} - {1'b0,la_HoQ[`HOQ3_A]})
110 : (`HOQ3_D - ({1'b0,la_HoQ[`HOQ3_A]}-{1'b0,ToQ[`HOQ3_A]}));
111 buf_req_ok = full_space[`HOQ3_PTR] > 0;
112 end
113 4'd1 : begin // 16 buffer pointers; [4:0]
114 wb_HoQ = {11'b0,wb_HoQ_temp[`HOQ4_PTR]};
115 la_HoQ[`HOQ4_PTR] = num_buf[`HOQ4_PTR] + wb_HoQ[`HOQ4_PTR];
116 win_HoQ = {11'b0,win_HoQ_temp[`HOQ4_PTR]};
117 cross_q_end = win_HoQ[`HOQ4_MSB] != la_HoQ[`HOQ4_MSB];
118 full_space[`HOQ4_PTR] =(ToQ[`HOQ4_MSB]==la_HoQ[`HOQ4_MSB]) ? ({1'b0,ToQ[`HOQ4_A]} - {1'b0,la_HoQ[`HOQ4_A]})
119 : (`HOQ4_D - ({1'b0,la_HoQ[`HOQ4_A]}-{1'b0,ToQ[`HOQ4_A]}));
120 buf_req_ok = full_space[`HOQ4_PTR] > 0;
121 end
122 4'd2 : begin // 32 buffer pointers; [5:0]
123 wb_HoQ = {10'b0,wb_HoQ_temp[`HOQ5_PTR]};
124 la_HoQ[`HOQ5_PTR] = num_buf[5:0] + wb_HoQ[`HOQ5_PTR];
125 win_HoQ = {10'b0,win_HoQ_temp[`HOQ5_PTR]};
126 cross_q_end = win_HoQ[`HOQ5_MSB] != la_HoQ[`HOQ5_MSB];
127 full_space[`HOQ5_PTR] =(ToQ[`HOQ5_MSB]==la_HoQ[`HOQ5_MSB]) ? ({1'b0,ToQ[`HOQ5_A]} - {1'b0,la_HoQ[`HOQ5_A]})
128 : (`HOQ5_D - ({1'b0,la_HoQ[`HOQ5_A]}-{1'b0,ToQ[`HOQ5_A]}));
129 buf_req_ok = full_space[`HOQ5_PTR] > 0;
130 end
131 4'd3 : begin // 64 buffer pointers; [6:0]
132 wb_HoQ = {9'b0,wb_HoQ_temp[`HOQ6_PTR]};
133 la_HoQ[`HOQ6_PTR] = {1'b0,num_buf[5:0]}+ wb_HoQ[`HOQ6_PTR];
134 win_HoQ = {9'b0,win_HoQ_temp[`HOQ6_PTR]};
135 cross_q_end = win_HoQ[`HOQ6_MSB] != la_HoQ[`HOQ6_MSB];
136 full_space[`HOQ6_PTR] =(ToQ[`HOQ6_MSB]==la_HoQ[`HOQ6_MSB]) ? ({1'b0,ToQ[`HOQ6_A]} - {1'b0,la_HoQ[`HOQ6_A]})
137 : (`HOQ6_D - ({1'b0,la_HoQ[`HOQ6_A]}-{1'b0,ToQ[`HOQ6_A]}));
138 buf_req_ok = full_space[`HOQ6_PTR] > 0;
139 end
140 4'd4 : begin // 128 buffer pointers; [7:0]
141 wb_HoQ = {8'b0,wb_HoQ_temp[`HOQ7_PTR]};
142 la_HoQ[`HOQ7_PTR] = {2'b0,num_buf[5:0]}+ wb_HoQ[`HOQ7_PTR];
143 win_HoQ = {8'b0,win_HoQ_temp[`HOQ7_PTR]};
144 cross_q_end = win_HoQ[`HOQ7_MSB] != la_HoQ[`HOQ7_MSB];
145 full_space[`HOQ7_PTR] =(ToQ[`HOQ7_MSB]==la_HoQ[`HOQ7_MSB]) ? ({1'b0,ToQ[`HOQ7_A]} - {1'b0,la_HoQ[`HOQ7_A]})
146 : (`HOQ7_D - ({1'b0,la_HoQ[`HOQ7_A]}-{1'b0,ToQ[`HOQ7_A]}));
147 buf_req_ok = full_space[`HOQ7_PTR] > 0;
148 end
149 4'd5 : begin // 256 buffer pointers; [8:0]
150 wb_HoQ = {7'b0,wb_HoQ_temp[`HOQ8_PTR]};
151 la_HoQ[`HOQ8_PTR] = {3'b0,num_buf[5:0]}+ wb_HoQ[`HOQ8_PTR];
152 win_HoQ = {7'b0,win_HoQ_temp[`HOQ8_PTR]};
153 cross_q_end = win_HoQ[`HOQ8_MSB] != la_HoQ[`HOQ8_MSB];
154 full_space[`HOQ8_PTR] =(ToQ[`HOQ8_MSB]==la_HoQ[`HOQ8_MSB]) ? ({1'b0,ToQ[`HOQ8_A]} - {1'b0,la_HoQ[`HOQ8_A]})
155 : (`HOQ8_D - ({1'b0,la_HoQ[`HOQ8_A]}-{1'b0,ToQ[`HOQ8_A]}));
156 buf_req_ok = full_space[`HOQ8_PTR] > 0;
157 end
158 4'd6 : begin // 512 buffer pointers; [9:0]
159 wb_HoQ = {6'b0,wb_HoQ_temp[`HOQ9_PTR]};
160 la_HoQ[`HOQ9_PTR] = {4'b0,num_buf[5:0]}+ wb_HoQ[`HOQ9_PTR];
161 win_HoQ = {6'b0,win_HoQ_temp[`HOQ9_PTR]};
162 cross_q_end = win_HoQ[`HOQ9_MSB] != la_HoQ[`HOQ9_MSB];
163 full_space[`HOQ9_PTR] =(ToQ[`HOQ9_MSB]==la_HoQ[`HOQ9_MSB]) ? ({1'b0,ToQ[`HOQ9_A]} - {1'b0,la_HoQ[`HOQ9_A]})
164 : (`HOQ9_D - ({1'b0,la_HoQ[`HOQ9_A]}-{1'b0,ToQ[`HOQ9_A]}));
165 buf_req_ok = full_space[`HOQ9_PTR] > 0;
166 end
167 4'd7 : begin //1024: 1K buffer pointers; [10:0]
168 wb_HoQ = {5'b0,wb_HoQ_temp[`HOQ10_PTR]};
169 la_HoQ[`HOQ10_PTR] = {5'b0,num_buf[5:0]}+ wb_HoQ[`HOQ10_PTR];
170 win_HoQ = {5'b0,win_HoQ_temp[`HOQ10_PTR]};
171 cross_q_end = win_HoQ[`HOQ10_MSB] != la_HoQ[`HOQ10_MSB];
172 full_space[`HOQ10_PTR] =(ToQ[`HOQ10_MSB]==la_HoQ[`HOQ10_MSB]) ? ({1'b0,ToQ[`HOQ10_A]} - {1'b0,la_HoQ[`HOQ10_A]})
173 : (`HOQ10_D - ({1'b0,la_HoQ[`HOQ10_A]}-{1'b0,ToQ[`HOQ10_A]}));
174 buf_req_ok = full_space[`HOQ10_PTR] > 0;
175 end
176 4'd8 : begin //2048: 2K buffer pointers; [11:0]
177 wb_HoQ = {4'b0,wb_HoQ_temp[`HOQ11_PTR]};
178 la_HoQ[`HOQ11_PTR] = {6'b0,num_buf[5:0]}+ wb_HoQ[`HOQ11_PTR];
179 win_HoQ = {4'b0,win_HoQ_temp[`HOQ11_PTR]};
180 cross_q_end = win_HoQ[`HOQ11_MSB] != la_HoQ[`HOQ11_MSB];
181 full_space[`HOQ11_PTR] =(ToQ[`HOQ11_MSB]==la_HoQ[`HOQ11_MSB]) ? ({1'b0,ToQ[`HOQ11_A]} - {1'b0,la_HoQ[`HOQ11_A]})
182 : (`HOQ11_D - ({1'b0,la_HoQ[`HOQ11_A]}-{1'b0,ToQ[`HOQ11_A]}));
183 buf_req_ok = full_space[`HOQ11_PTR] > 0;
184 end
185 4'd9 : begin //4096: 4K buffer pointers; [12:0]
186 wb_HoQ = {3'b0,wb_HoQ_temp[`HOQ12_PTR]};
187 la_HoQ[`HOQ12_PTR] = {7'b0,num_buf[5:0]}+ wb_HoQ[`HOQ12_PTR];
188 win_HoQ = {3'b0,win_HoQ_temp[`HOQ12_PTR]};
189 cross_q_end = win_HoQ[`HOQ12_MSB] != la_HoQ[`HOQ12_MSB];
190 full_space[`HOQ12_PTR] =(ToQ[`HOQ12_MSB]==la_HoQ[`HOQ12_MSB]) ? ({1'b0,ToQ[`HOQ12_A]} - {1'b0,la_HoQ[`HOQ12_A]})
191 : (`HOQ12_D - ({1'b0,la_HoQ[`HOQ12_A]}-{1'b0,ToQ[`HOQ12_A]}));
192 buf_req_ok = full_space[`HOQ12_PTR] > 0;
193 end
194 4'd10 : begin //8192: 8K buffer pointers; [13:0]
195 wb_HoQ = {2'b0,wb_HoQ_temp[`HOQ13_PTR]};
196 la_HoQ[`HOQ13_PTR] = {8'b0,num_buf[5:0]}+ wb_HoQ[`HOQ13_PTR];
197 win_HoQ = {2'b0,win_HoQ_temp[`HOQ13_PTR]};
198 cross_q_end = win_HoQ[`HOQ13_MSB] != la_HoQ[`HOQ13_MSB];
199 full_space[`HOQ13_PTR] =(ToQ[`HOQ13_MSB]==la_HoQ[`HOQ13_MSB]) ? ({1'b0,ToQ[`HOQ13_A]} - {1'b0,la_HoQ[`HOQ13_A]})
200 : (`HOQ13_D - ({1'b0,la_HoQ[`HOQ13_A]}-{1'b0,ToQ[`HOQ13_A]}));
201 buf_req_ok = full_space[`HOQ13_PTR] > 0;
202 end
203 4'd11 : begin //16384: 16K buffer pointers; [14:0]
204 wb_HoQ = {1'b0,wb_HoQ_temp[`HOQ14_PTR]};
205 la_HoQ[`HOQ14_PTR] = {9'b0,num_buf[5:0]}+ wb_HoQ[`HOQ14_PTR];
206 win_HoQ = {1'b0,win_HoQ_temp[`HOQ14_PTR]};
207 cross_q_end = win_HoQ[`HOQ14_MSB] != la_HoQ[`HOQ14_MSB];
208 full_space[`HOQ14_PTR] =(ToQ[`HOQ14_MSB]==la_HoQ[`HOQ14_MSB]) ? ({1'b0,ToQ[`HOQ14_A]} - {1'b0,la_HoQ[`HOQ14_A]})
209 : (`HOQ14_D - ({1'b0,la_HoQ[`HOQ14_A]}-{1'b0,ToQ[`HOQ14_A]}));
210 buf_req_ok = full_space[`HOQ14_PTR] > 0;
211 end
212 4'd12 : begin //32768: 32K buffer pointers; [15:0]
213 wb_HoQ = wb_HoQ_temp[`HOQ15_PTR];
214 la_HoQ[`HOQ15_PTR] = {10'b0,num_buf[5:0]}+ wb_HoQ[`HOQ15_PTR];
215 win_HoQ = win_HoQ_temp[`HOQ15_PTR];
216 cross_q_end = win_HoQ[`HOQ15_MSB] != la_HoQ[`HOQ15_MSB];
217 full_space[`HOQ15_PTR] =(ToQ[`HOQ15_MSB]==la_HoQ[`HOQ15_MSB]) ? ({1'b0,ToQ[`HOQ15_A]} - {1'b0,la_HoQ[`HOQ15_A]})
218 : (`HOQ15_D - ({1'b0,la_HoQ[`HOQ15_A]}-{1'b0,ToQ[`HOQ15_A]}));
219 buf_req_ok = full_space[`HOQ15_PTR] > 0;
220 end
221 default: begin
222 wb_HoQ = {12'b0,wb_HoQ_temp[`HOQ3_PTR]};
223 la_HoQ[`HOQ3_PTR] = num_buf[`HOQ3_PTR] + wb_HoQ[`HOQ3_PTR];
224 win_HoQ = {12'b0,win_HoQ_temp[`HOQ3_PTR]};
225 cross_q_end = win_HoQ[`HOQ3_MSB] != la_HoQ[`HOQ3_MSB];
226 full_space[`HOQ3_PTR] =(ToQ[`HOQ3_MSB]==la_HoQ[`HOQ3_MSB]) ? ({1'b0,ToQ[`HOQ3_A]} - {1'b0,la_HoQ[`HOQ3_A]})
227 : (`HOQ3_D - ({1'b0,la_HoQ[`HOQ3_A]}-{1'b0,ToQ[`HOQ3_A]}));
228 buf_req_ok = full_space[`HOQ3_PTR] > 0;
229 end
230 endcase // casex(ring_size[3:0])
231 end
232
233
234endmodule // niu_zcp_q_cal
235
236 /* ----- begin comments -----
237
238// wire [38:0] ring_base_addr; // 39b
239// wire [19:0] handle; // 20b
240// 2'b0 to take care of 32 bits (4B) va ptr address. It has to be 4 bytes aligned.
241
242ring_size == 4'd0 : 8 pointers -> {handle,ring_base_addr[38:0],win_HoQ[2:0], 2'b0}
243ring_size == 4'd1 : 16 pointers -> {handle,ring_base_addr[38:1],win_HoQ[3:0], 2'b0}
244ring_size == 4'd2 : 32 pointers -> {handle,ring_base_addr[38:2],win_HoQ[4:0], 2'b0}
245ring_size == 4'd3 : 64 pointers -> {handle,ring_base_addr[38:3],win_HoQ[5:0], 2'b0}
246ring_size == 4'd4 :128 pointers -> {handle,ring_base_addr[38:4],win_HoQ[6:0], 2'b0}
247ring_size == 4'd5 :256 pointers -> {handle,ring_base_addr[38:5],win_HoQ[7:0], 2'b0}
248ring_size == 4'd6 :512 pointers -> {handle,ring_base_addr[38:6],win_HoQ[8:0], 2'b0}
249ring_size == 4'd7 : 1k pointers -> {handle,ring_base_addr[38:7],win_HoQ[9:0], 2'b0}
250ring_size == 4'd8 : 2k pointers -> {handle,ring_base_addr[38:8],win_HoQ[10:0],2'b0}
251ring_size == 4'd9 : 4K pointers -> {handle,ring_base_addr[38:9],win_HoQ[11:0],2'b0}
252ring_size == 4'd10: 8K pointers -> {handle,ring_base_addr[38:10],win_HoQ[12:0],2'b0}
253ring_size == 4'd11: 16K pointers -> {handle,ring_base_addr[38:11],win_HoQ[13:0],2'b0}
254ring_size == 4'd12: 32K pointers -> {handle,ring_base_addr[38:12],win_HoQ[14:0],2'b0}
255
256 ----- end comments ----- */
257
258
Full OpenSPARC design & verification tarball including full HDL.