Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / niu / rtl / rx_xdecap.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: rx_xdecap.v
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35/*%W% %G%*/
36
37/*************************************************************************
38 *
39 * File Name : rx_xdecap.v
40 * Author Name : John Lo
41 * Description : receive misllaneous logic
42 * Parent Module: rx_xmac
43 * Child Module:
44 * Interface Mod: many.
45 * Date Created : 5/9/00
46 *
47 * Copyright (c) 2002, Sun Microsystems, Inc.
48 * Sun Proprietary and Confidential
49 *
50 * Modification :
51 *
52 * Synthesis Notes:
53 *
54 *************************************************************************/
55
56`include "xmac.h"
57
58module rx_xdecap(
59rx_clk,
60rx_reset,
61warning_msg_en,
62strip_crc,
63err_chk_dis,
64pass_fc,
65crc_error,
66rxfifo_full_rxclk,
67rxfifo_afull_rxclk,
68rx_fc_pkt,
69no_rx_min_pkt_size_chk,
70rx_min_pkt_size,
71max_pkt_size,
72valid_data,
73rx_dv,
74rx_err,
75rx_dv_8bit_reg0_gmux,
76eop,
77// start of ALT_ADDR_AND_HASH_FUNC specific signals
78hash_hit_match,
79hash_value,
80mac_ctrl_word,
81mac_ctrl_word_wr_en,
82// end of ALT_ADDR_AND_HASH_FUNC specific signals
83// outputs
84min_pkt_size_limit,
85max_pkt_size_limit,
86rx_good_pkt,
87inc_code_viol_count,
88inc_crc_err_count,
89inc_min_pkt_err_count,
90inc_max_pkt_err_count,
91toggle_rx_bcount,
92abort_bit,
93bad_pkt_bit,
94rx_byte_count, // for observation.
95mod_rx_byte_count, // for observation.
96rx_status
97 );
98
99
100 input rx_clk;
101 input rx_reset;
102 // vlint flag_dangling_net_within_module off
103 // vlint flag_net_has_no_load off
104 // vlint flag_input_port_not_connected off
105 input warning_msg_en;
106 // vlint flag_input_port_not_connected on
107 // vlint flag_net_has_no_load on
108 // vlint flag_dangling_net_within_module on
109 input strip_crc;
110 input err_chk_dis;
111 input pass_fc;
112 input crc_error;
113 input rxfifo_full_rxclk;
114 input rxfifo_afull_rxclk;
115 input rx_fc_pkt;
116 input no_rx_min_pkt_size_chk;
117 input [9:0] rx_min_pkt_size;
118 input [13:0] max_pkt_size;
119 input valid_data;
120 input rx_dv;
121 input rx_err;
122 input [7:0] rx_dv_8bit_reg0_gmux;
123 input eop;
124 // start of ALT_ADDR_AND_HASH_FUNC specific signals
125 input hash_hit_match;
126 input [5:0] hash_value;
127 input [`MAC_CTRL] mac_ctrl_word;
128 input mac_ctrl_word_wr_en;
129 // end of ALT_ADDR_AND_HASH_FUNC specific signals
130 // outputs
131 output min_pkt_size_limit;
132 output max_pkt_size_limit;
133 output rx_good_pkt;
134 output inc_code_viol_count;
135 output inc_crc_err_count;
136 output inc_min_pkt_err_count;
137 output inc_max_pkt_err_count;
138 output toggle_rx_bcount;
139 output abort_bit;
140 output bad_pkt_bit;
141 output [13:0] rx_byte_count;
142 output [13:0] mod_rx_byte_count;
143 output [`TBITS] rx_status;
144
145 wire [13:0] rx_byte_count,mod_rx_byte_count;
146 wire crc_err,abort_bit,bad_pkt_bit;
147 // vlint flag_dangling_net_within_module off
148 // vlint flag_net_has_no_load off
149 wire [13:0] nx_rx_byte_count;
150 // vlint flag_net_has_no_load on
151 // vlint flag_dangling_net_within_module on
152
153 /* ------------------------- rx_byte counter --------------------------- */
154
155 wire reset_rx_byte_counter = rx_reset | eop;
156 byte_counter rx_byte_counter(
157 .clk(rx_clk),
158 .reset(reset_rx_byte_counter),
159 .byte_count_en(valid_data),
160 .dv_en_8bit(rx_dv_8bit_reg0_gmux),
161 .byte_count(rx_byte_count),
162 .nx_byte_count(nx_rx_byte_count));
163
164/**************************************************************************
165 * error detection logic
166 * ************************************************************************/
167
168 /* ------------- min_pkt_size_err --- rlm_sm is not aware of it. use EOP */
169 // min_pkt_size_limit should be a pulse. It is pulsed by eop at eop time.
170
171 assign min_pkt_size_limit = ~no_rx_min_pkt_size_chk & eop &
172 (rx_byte_count < {4'b0,rx_min_pkt_size});
173
174 /* ------------- max_pkt_size_err --- rlm_sm knows it.------------------ */
175 // max_pkt_size_limit will cause xrlm_sm to generate eop and
176 // valid_data = 0 which inturn will cause rx_dv == 0.
177 // Therefore max_pkt_size_limit itself should be a pulse.
178 // Do NOT use "eop" to generate a pulse. It will cause a logic loop.
179 // Max_pkt_size_limit is a PULSE.
180 assign max_pkt_size_limit = (rx_byte_count > max_pkt_size) &
181 rx_dv;
182
183 /* ------------- rx_err -- xrlm_sm sees it instantly. ------------------ */
184 // rx_err = rxc_err; from rx_mac_xmii.v; generated by sfd_sm and is
185 // delayed by 1 clock to match rx_data_64bit_reg0 and let rlm_sm sees it.
186
187 /* --------------------------- Rx Status Word -------------------------- */
188
189// assign rx_fc_pkt_ok = eop & rx_fc_pkt & ~bad_pkt_bit;// address_decoder.v
190// rx_fc_pkt is a level signal
191
192 assign abort_bit = !err_chk_dis &
193 (crc_err | rx_err | rxfifo_full_rxclk | rxfifo_afull_rxclk |
194 min_pkt_size_limit | max_pkt_size_limit) |
195 (!pass_fc & rx_fc_pkt & eop);
196
197 // crc is checked at eop time.
198 assign crc_err = crc_error & eop;
199 assign bad_pkt_bit = !min_pkt_size_limit & (crc_err | rx_err);
200
201 // fcs modification
202 assign mod_rx_byte_count = strip_crc ? (rx_byte_count - 4) : rx_byte_count;
203
204 // total23b TIBTS:[22:0]
205 wire [`TBITS] rx_status = (mac_ctrl_word_wr_en & ~eop) ?
206 {3'b0,mac_ctrl_word[`MAC_CTRL]} // mac_ctrl_word: 20 bits
207 :
208 {hash_hit_match, // 1b
209 hash_value[5:0], // 6b .Reged at 1st word time
210 abort_bit,bad_pkt_bit,mod_rx_byte_count} // 16b
211 ;
212
213// synopsys translate_off
214// diag
215always @ (negedge rx_clk)
216 if ((~rx_reset) & (crc_err) & !err_chk_dis & warning_msg_en)
217 $display("\n (* ERROR: at sim time = %d, at rxmac eop time, crc_err = %b *) \n", $time, crc_err);
218 else ;
219// synopsys translate_on
220
221 /* --------------------------------------------------------------------- */
222
223 /* ------------------------ Frame Error Checking ----------------------- */
224 // rx_err == rxc_err;
225 // code violation is checked by sfd_sm and the result is delayed by one
226 // clock to match rx_data_64bit_reg0 and to let xrlm_sm sees it.
227 assign rx_good_pkt = eop & !max_pkt_size_limit & !min_pkt_size_limit &
228 !crc_err & !rx_err;
229
230 // loj @9-01-06 fixed (~rxfifo_afull_rxclk) metal eco with label MAC_RTL_3.5.
231 // loj @9-05-06 fixed (~max_pkt_size_limit) metal eco with label MAC_RTL_3.6.
232 // Truncated bad CRC should not increase crc_err_count.
233 assign inc_crc_err_count = crc_err & !err_chk_dis & (~rxfifo_afull_rxclk) & (~max_pkt_size_limit);
234 assign inc_code_viol_count = rx_err & !err_chk_dis;
235 assign inc_min_pkt_err_count = min_pkt_size_limit & !err_chk_dis;
236 assign inc_max_pkt_err_count = max_pkt_size_limit & !err_chk_dis;
237
238
239 /* ------------------------------- RMON Support --------------------- */
240// wire [2:0] rx_bcount_prescaler;
241//
242// counter_X3 RX_BCOUNT_PRESCALER_CNTR(rx_clk,
243// rx_reset,
244// rx_dv,
245// rx_bcount_prescaler);
246// assign new_toggle_rx_bcount = rx_reset ? 1'b0 :
247// ((rx_bcount_prescaler == 3'h7) & rx_dv) ?
248// !toggle_rx_bcount : toggle_rx_bcount;
249// FD1 INC_RX_BCNT_FF(.D(new_toggle_rx_bcount),.CP(rx_clk),.Q(toggle_rx_bcount));
250//
251
252// no need for prescaler. It is for 1G mac that count 1 byte a time.
253TFF toggle_rx_bcount_TFF(.toggle(rx_dv),
254 .clk(rx_clk),
255 .reset(rx_reset),
256 .qout(toggle_rx_bcount));
257
258 /* ------------------------------------------------------------------ */
259
260
261
262endmodule // rx_xdecap
263
264