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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: txc_defines.h | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | /********************************************************************* * | |
39 | * txc_defines.h | |
40 | * | |
41 | * Txc Defines Header Include File | |
42 | * | |
43 | * Orignal Author(s) Rahoul Puri | |
44 | * Modifier(s) | |
45 | * Project(s) Neptune | |
46 | * | |
47 | * Copyright (c) 2004 Sun Microsystems, Inc. | |
48 | * | |
49 | * All Rights Reserved. | |
50 | * | |
51 | * This verilog model is the confidential and proprietary property of | |
52 | * Sun Microsystems, Inc., and the possession or use of this model | |
53 | * requires a written license from Sun Microsystems, Inc. | |
54 | * | |
55 | **********************************************************************/ | |
56 | ||
57 | /*--------------------------------------------------------------*/ | |
58 | // SD - Synchronous Delay | |
59 | // AD - Asynchronous Delay | |
60 | /*--------------------------------------------------------------*/ | |
61 | `define SD 1 | |
62 | `define AD 0 | |
63 | ||
64 | /*--------------------------------------------------------------*/ | |
65 | // MAC Ports | |
66 | /*--------------------------------------------------------------*/ | |
67 | `define FIFO_SIZE_1024 11'd1024 | |
68 | `define FIFO_SIZE_1024_MINUS_1 11'd1023 | |
69 | `define FIFO_SIZE_640 11'd640 | |
70 | `define FIFO_SIZE_640_MINUS_1 11'd639 | |
71 | ||
72 | /*--------------------------------------------------------------*/ | |
73 | // MAC Ports | |
74 | /*--------------------------------------------------------------*/ | |
75 | `define PORT_ZERO 2'h0 | |
76 | `define PORT_ONE 2'h1 | |
77 | `define PORT_TWO 2'h2 | |
78 | `define PORT_THREE 2'h3 | |
79 | ||
80 | /*--------------------------------------------------------------*/ | |
81 | // TX Control Header defines | |
82 | /*--------------------------------------------------------------*/ | |
83 | ||
84 | `define CKSUM_EN_PKT_TYPE 63:62 | |
85 | `define IP_VER 61 | |
86 | `define LLC_SNAP_PACKET 57 | |
87 | `define VLAN_PACKET 56 | |
88 | `define IHL 55:52 | |
89 | `define L3START 51:48 | |
90 | `define L4START 45:40 | |
91 | `define L4STUFF 37:32 | |
92 | `define TOT_XFER_LENGTH 29:16 | |
93 | `define PAD 2:0 | |
94 | ||
95 | ||
96 | `define IPV4 2'b01 | |
97 | `define IPV6 2'b10 | |
98 | `define ETHERNET_PKT 2'b00 | |
99 | `define VLAN_ONLY 2'b01 | |
100 | `define LLC_SNAP_ONLY 2'b10 | |
101 | `define LLC_SNAP_PLUS_VLAN 2'b11 | |
102 | ||
103 | // Don't need, remove | |
104 | //`define IPV4_HEADER_CHECKSUM 60 | |
105 | //`define LAYER4_PROTOCOL 59:58 | |
106 | //`define LAYER4_CRC_32C 57 | |
107 | ||
108 | /*--------------------------------------------------------------*/ | |
109 | // Number of Bytes | |
110 | /*--------------------------------------------------------------*/ | |
111 | `define ONE_BYTE 7'd1 | |
112 | `define TWO_BYTES 7'd2 | |
113 | `define THREE_BYTES 7'd3 | |
114 | `define FOUR_BYTES 7'd4 | |
115 | `define FIVE_BYTES 7'd5 | |
116 | `define SIX_BYTES 7'd6 | |
117 | `define SEVEN_BYTES 7'd7 | |
118 | ||
119 | `define OFFSET_ZERO 3'h0 | |
120 | `define OFFSET_ONE 3'h1 | |
121 | `define OFFSET_TWO 3'h2 | |
122 | `define OFFSET_THREE 3'h3 | |
123 | `define OFFSET_FOUR 3'h4 | |
124 | `define OFFSET_FIVE 3'h5 | |
125 | `define OFFSET_SIX 3'h6 | |
126 | `define OFFSET_SEVEN 3'h7 | |
127 | ||
128 | /*--------------------------------------------------------------*/ | |
129 | // Number of Shifts | |
130 | /*--------------------------------------------------------------*/ | |
131 | `define SHIFT_ZERO_BYTE 16'bxxxx_xxxx_xxxx_xxx1 | |
132 | `define SHIFT_ONE_BYTE 16'bxxxx_xxxx_xxxx_xx10 | |
133 | `define SHIFT_TWO_BYTES 16'bxxxx_xxxx_xxxx_x100 | |
134 | `define SHIFT_THREE_BYTES 16'bxxxx_xxxx_xxxx_1000 | |
135 | `define SHIFT_FOUR_BYTES 16'bxxxx_xxxx_xxx1_0000 | |
136 | `define SHIFT_FIVE_BYTES 16'bxxxx_xxxx_xx10_0000 | |
137 | `define SHIFT_SIX_BYTES 16'bxxxx_xxxx_x100_0000 | |
138 | `define SHIFT_SEVEN_BYTES 16'bxxxx_xxxx_1000_0000 | |
139 | `define SHIFT_EIGHT_BYTES 16'bxxxx_xxx1_0000_0000 | |
140 | `define SHIFT_NINE_BYTES 16'bxxxx_xx10_0000_0000 | |
141 | `define SHIFT_TEN_BYTES 16'bxxxx_x100_0000_0000 | |
142 | `define SHIFT_ELEVEN_BYTES 16'bxxxx_1000_0000_0000 | |
143 | `define SHIFT_TWELVE_BYTES 16'bxxx1_0000_0000_0000 | |
144 | `define SHIFT_THIRTEEN_BYTES 16'bxx10_0000_0000_0000 | |
145 | `define SHIFT_FOURTEEN_BYTES 16'bx100_0000_0000_0000 | |
146 | `define SHIFT_FIFTEEN_BYTES 16'b1000_0000_0000_0000 | |
147 | ||
148 | /*--------------------------------------------------------------*/ | |
149 | // Meta Commands | |
150 | /*--------------------------------------------------------------*/ | |
151 | `define RESPONSE_WITH_DATA 8'h05 | |
152 | `define RESPONSE_NO_DATA 8'h06 | |
153 | `define RESPONSE_TIMEOUT 4'hF | |
154 | `define RESPONSE_GOOD 4'h0 | |
155 | ||
156 | /*--------------------------------------------------------------*/ | |
157 | // TX DMA Commands | |
158 | /*--------------------------------------------------------------*/ | |
159 | `define TXC_MEM_READ_ORDERED_64 8'b0001_1000 | |
160 | `define TXC_MEM_READ_ORDERED_32 8'b0001_0000 | |
161 | `define TXC_MEM_READ_BYPASS_64 8'b0000_1000 | |
162 | `define TXC_MEM_READ_BYPASS_32 8'b0000_0000 | |
163 | ||
164 | `define TXC_MEM_WRITE_POSTED 8'b0010_0001 | |
165 | `define TXC_MEM_WRITE_ORDERED 8'b0001_0001 | |
166 | `define TXC_MEM_WRITE_BYPASS 8'b0000_1001 | |
167 | ||
168 | `define TXC_COMP_READ 8'b0000_0100 | |
169 | ||
170 | `define TXC_COMP_WRITE_POSTED 8'b0010_0101 | |
171 | `define TXC_COMP_WRITE_ORDERED 8'b0001_0101 | |
172 | `define TXC_COMP_WRITE_BYPASS 8'b0000_1101 | |
173 | ||
174 | /*--------------------------------------------------------------*/ | |
175 | // DMA Channel Numbers | |
176 | /*--------------------------------------------------------------*/ | |
177 | `define DMA_CHANNEL_ZERO 5'd0 | |
178 | `define DMA_CHANNEL_ONE 5'd1 | |
179 | `define DMA_CHANNEL_TWO 5'd2 | |
180 | `define DMA_CHANNEL_THREE 5'd3 | |
181 | `define DMA_CHANNEL_FOUR 5'd4 | |
182 | `define DMA_CHANNEL_FIVE 5'd5 | |
183 | `define DMA_CHANNEL_SIX 5'd6 | |
184 | `define DMA_CHANNEL_SEVEN 5'd7 | |
185 | `define DMA_CHANNEL_EIGHT 5'd8 | |
186 | `define DMA_CHANNEL_NINE 5'd9 | |
187 | `define DMA_CHANNEL_TEN 5'd10 | |
188 | `define DMA_CHANNEL_ELEVEN 5'd11 | |
189 | `define DMA_CHANNEL_TWELVE 5'd12 | |
190 | `define DMA_CHANNEL_THIRTEEN 5'd13 | |
191 | `define DMA_CHANNEL_FOURTEEN 5'd14 | |
192 | `define DMA_CHANNEL_FIFTEEN 5'd15 | |
193 | `define DMA_CHANNEL_SIXTEEN 5'd16 | |
194 | `define DMA_CHANNEL_SEVENTEEN 5'd17 | |
195 | `define DMA_CHANNEL_EIGHTEEN 5'd18 | |
196 | `define DMA_CHANNEL_NINETEEN 5'd19 | |
197 | `define DMA_CHANNEL_TWENTY 5'd20 | |
198 | `define DMA_CHANNEL_TWENTYONE 5'd21 | |
199 | `define DMA_CHANNEL_TWENTYTWO 5'd22 | |
200 | `define DMA_CHANNEL_TWENTYTHREE 5'd23 | |
201 | `define DMA_CHANNEL_TWENTYFOUR 5'd24 | |
202 | `define DMA_CHANNEL_TWENTYFIVE 5'd25 | |
203 | `define DMA_CHANNEL_TWENTYSIX 5'd26 | |
204 | `define DMA_CHANNEL_TWENTYSEVEN 5'd27 | |
205 | `define DMA_CHANNEL_TWENTYEIGHT 5'd28 | |
206 | `define DMA_CHANNEL_TWENTYNINE 5'd29 | |
207 | `define DMA_CHANNEL_THIRTY 5'd30 | |
208 | `define DMA_CHANNEL_THIRTYONE 5'd31 | |
209 | ||
210 | /*--------------------------------------------------------------*/ | |
211 | // Transaction Ids | |
212 | /*--------------------------------------------------------------*/ | |
213 | `define TID_ZERO 5'd0 | |
214 | `define TID_ONE 5'd1 | |
215 | `define TID_TWO 5'd2 | |
216 | `define TID_THREE 5'd3 | |
217 | `define TID_FOUR 5'd4 | |
218 | `define TID_FIVE 5'd5 | |
219 | `define TID_SIX 5'd6 | |
220 | `define TID_SEVEN 5'd7 | |
221 | `define TID_EIGHT 5'd8 | |
222 | `define TID_NINE 5'd9 | |
223 | `define TID_TEN 5'd10 | |
224 | `define TID_ELEVEN 5'd11 | |
225 | `define TID_TWELVE 5'd12 | |
226 | `define TID_THIRTEEN 5'd13 | |
227 | `define TID_FOURTEEN 5'd14 | |
228 | `define TID_FIFTEEN 5'd15 | |
229 | `define TID_SIXTEEN 5'd16 | |
230 | `define TID_SEVENTEEN 5'd17 | |
231 | `define TID_EIGHTEEN 5'd18 | |
232 | `define TID_NINETEEN 5'd19 | |
233 | `define TID_TWENTY 5'd20 | |
234 | `define TID_TWENTYONE 5'd21 | |
235 | `define TID_TWENTYTWO 5'd22 | |
236 | `define TID_TWENTYTHREE 5'd23 | |
237 | `define TID_TWENTYFOUR 5'd24 | |
238 | `define TID_TWENTYFIVE 5'd25 | |
239 | `define TID_TWENTYSIX 5'd26 | |
240 | `define TID_TWENTYSEVEN 5'd27 | |
241 | `define TID_TWENTYEIGHT 5'd28 | |
242 | `define TID_TWENTYNINE 5'd29 | |
243 | `define TID_THIRTY 5'd30 | |
244 | `define TID_THIRTYONE 5'd31 | |
245 | ||
246 | /*--------------------------------------------------------------*/ | |
247 | // Reorder ff Data Out Field | |
248 | /*--------------------------------------------------------------*/ | |
249 | `define ROFF_PKTDATA_ECC 151:136 | |
250 | `define ROFF_RESERVED 153 | |
251 | `define ROFF_BYTEOFFSET 134:130 | |
252 | `define ROFF_SOP 129 | |
253 | `define ROFF_EOP 128 | |
254 | `define ROFF_PKTDATA 127:0 | |
255 | `define ROFF_ABORT 135 | |
256 | ||
257 | ||
258 | `define CTRLHDR_STARTPKT_PAD 2:0 | |
259 | ||
260 | /*--------------------------------------------------------------*/ | |
261 | // Little Endian byte reference | |
262 | /*--------------------------------------------------------------*/ | |
263 | `define TXC_B14_B0 119:0 | |
264 | `define TXC_B13_B0 111:0 | |
265 | `define TXC_B12_B0 103:0 | |
266 | `define TXC_B11_B0 95:0 | |
267 | `define TXC_B10_B0 87:0 | |
268 | `define TXC_B9_B0 79:0 | |
269 | `define TXC_B8_B0 71:0 | |
270 | `define TXC_B7_B0 63:0 | |
271 | `define TXC_B6_B0 55:0 | |
272 | `define TXC_B5_B0 47:0 | |
273 | `define TXC_B4_B0 39:0 | |
274 | `define TXC_B3_B0 31:0 | |
275 | `define TXC_B2_B0 23:0 | |
276 | `define TXC_B1_B0 15:0 | |
277 | `define TXC_B0 7:0 | |
278 | ||
279 | `define TXC_B15_B1 127:8 | |
280 | `define TXC_B15_B2 127:16 | |
281 | `define TXC_B15_B3 127:24 | |
282 | `define TXC_B15_B4 127:32 | |
283 | `define TXC_B15_B5 127:40 | |
284 | `define TXC_B15_B6 127:48 | |
285 | `define TXC_B15_B7 127:56 | |
286 | `define TXC_B15_B8 127:64 | |
287 | `define TXC_B15_B9 127:72 | |
288 | `define TXC_B15_B10 127:80 | |
289 | `define TXC_B15_B11 127:88 | |
290 | `define TXC_B15_B12 127:96 | |
291 | `define TXC_B15_B13 127:104 | |
292 | `define TXC_B15_B14 127:112 | |
293 | `define TXC_B15 127:120 | |
294 | ||
295 | `define TXC_B1 15:8 | |
296 | `define TXC_B2 23:16 | |
297 | `define TXC_B3 31:24 | |
298 | `define TXC_B4 39:32 | |
299 | `define TXC_B5 47:40 | |
300 | `define TXC_B6 55:48 | |
301 | `define TXC_B7 63:56 | |
302 | `define TXC_B8 71:64 | |
303 | `define TXC_B9 79:72 | |
304 | `define TXC_B10 87:80 | |
305 | `define TXC_B11 95:88 | |
306 | `define TXC_B12 103:96 | |
307 | `define TXC_B13 111:104 | |
308 | `define TXC_B14 119:112 | |
309 | ||
310 | /*--------------------------------------------------------------*/ | |
311 | // Debug Port Select Defines | |
312 | /*--------------------------------------------------------------*/ | |
313 | `define DATA_FETCH_ENGINE 6'h00 | |
314 | `define PORT0_ENGINE 6'h01 | |
315 | `define PORT0_CKSUM 6'h02 | |
316 | `define PORT0_DRR 6'h03 | |
317 | `define PORT1_ENGINE 6'h04 | |
318 | `define PORT1_CKSUM 6'h05 | |
319 | `define PORT1_DRR 6'h06 | |
320 | `define PORT2_ENGINE 6'h07 | |
321 | `define PORT2_CKSUM 6'h08 | |
322 | `define PORT2_DRR 6'h09 | |
323 | `define PORT3_ENGINE 6'h0A | |
324 | `define PORT3_CKSUM 6'h0B | |
325 | `define PORT3_DRR 6'h0C | |
326 | `define TRAINING_SET 6'h3E | |
327 | `define TRAINING_LOAD 6'h3F |