Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / pcie_common / rtl / dmu_csrtool_enable_all.h
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: dmu_csrtool_enable_all.h
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
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31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38`define FIRE_DAEMON_TIMEOUT 1000
39
40`define FIRE_DLC_CRU_A_DAEMON
41`define FIRE_DLC_CRU_A_OMNI
42// `define FIRE_DLC_CRU_B_DAEMON
43// `define FIRE_DLC_CRU_B_OMNI
44`define FIRE_DLC_ILU_CIB_A_DAEMON
45`define FIRE_DLC_ILU_CIB_A_OMNI
46// `define FIRE_DLC_ILU_CIB_B_DAEMON
47// `define FIRE_DLC_ILU_CIB_B_OMNI
48`define FIRE_DLC_IMU_EQS_A_DAEMON
49`define FIRE_DLC_IMU_EQS_A_OMNI
50// `define FIRE_DLC_IMU_EQS_B_DAEMON
51// `define FIRE_DLC_IMU_EQS_B_OMNI
52`define FIRE_DLC_IMU_ICS_A_DAEMON
53`define FIRE_DLC_IMU_ICS_A_OMNI
54// `define FIRE_DLC_IMU_ICS_B_DAEMON
55// `define FIRE_DLC_IMU_ICS_B_OMNI
56`define FIRE_DLC_IMU_ISS_A_DAEMON
57`define FIRE_DLC_IMU_ISS_A_OMNI
58// `define FIRE_DLC_IMU_ISS_B_DAEMON
59// `define FIRE_DLC_IMU_ISS_B_OMNI
60`define FIRE_DLC_IMU_RDS_INTX_A_DAEMON
61`define FIRE_DLC_IMU_RDS_INTX_A_OMNI
62// `define FIRE_DLC_IMU_RDS_INTX_B_DAEMON
63// `define FIRE_DLC_IMU_RDS_INTX_B_OMNI
64`define FIRE_DLC_IMU_RDS_MESS_A_DAEMON
65`define FIRE_DLC_IMU_RDS_MESS_A_OMNI
66// `define FIRE_DLC_IMU_RDS_MESS_B_DAEMON
67// `define FIRE_DLC_IMU_RDS_MESS_B_OMNI
68`define FIRE_DLC_IMU_RDS_MSI_A_DAEMON
69`define FIRE_DLC_IMU_RDS_MSI_A_OMNI
70// `define FIRE_DLC_IMU_RDS_MSI_B_DAEMON
71// `define FIRE_DLC_IMU_RDS_MSI_B_OMNI
72`define FIRE_DLC_MMU_CSR_A_DAEMON
73`define FIRE_DLC_MMU_CSR_A_OMNI
74// `define FIRE_DLC_MMU_CSR_B_DAEMON
75// `define FIRE_DLC_MMU_CSR_B_OMNI
76`define FIRE_DLC_PSB_A_DAEMON
77`define FIRE_DLC_PSB_A_OMNI
78// `define FIRE_DLC_PSB_B_DAEMON
79// `define FIRE_DLC_PSB_B_OMNI
80`define FIRE_DLC_TSB_A_DAEMON
81`define FIRE_DLC_TSB_A_OMNI
82// `define FIRE_DLC_TSB_B_DAEMON
83// `define FIRE_DLC_TSB_B_OMNI
84`define FIRE_JLC_CSR_JCS_JCS_DAEMON
85`define FIRE_JLC_CSR_JCS_JCS_OMNI
86`define FIRE_PLC_TLU_CTB_LPR_A_DAEMON
87`define FIRE_PLC_TLU_CTB_LPR_A_OMNI
88`define FIRE_PLC_TLU_CTB_LPR_B_DAEMON
89`define FIRE_PLC_TLU_CTB_LPR_B_OMNI
90`define FIRE_PLC_TLU_CTB_TLR_A_DAEMON
91`define FIRE_PLC_TLU_CTB_TLR_A_OMNI
92`define FIRE_PLC_TLU_CTB_TLR_B_DAEMON
93`define FIRE_PLC_TLU_CTB_TLR_B_OMNI