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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: rdp.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | // ########################################################## | |
36 | // # | |
37 | // # File Name : rdp_clkhdr.vp | |
38 | // # Author Name : Maya Suresh | |
39 | // # Description : | |
40 | // # Parent Module: | |
41 | // # Child Module: | |
42 | // # Interface Mod: | |
43 | // # | |
44 | // # Copyright (c) 2020, Sun Microsystems, Inc. | |
45 | // # Sun Proprietary and Confidential | |
46 | // # | |
47 | // # Modification : | |
48 | // # | |
49 | // ########################################################## | |
50 | ||
51 | // VPERL: PERL_BEG | |
52 | // | |
53 | // $VPERL_PORT_COMM = 1; | |
54 | // &MODULE ("rdp"); | |
55 | // # | |
56 | ||
57 | // &DECLARE ("input", "tcu_atpg_mode"); | |
58 | // &DECLARE ("input", "tcu_wr_inhibit"); | |
59 | ||
60 | // &DECLARE ("input", "scan_in"); | |
61 | // &DECLARE ("output", "scan_out"); | |
62 | ||
63 | // &DECLARE ("output", "pio_clients_wdata[63:0]"); | |
64 | // &DECLARE ("output", "pio_clients_addr[19:0]"); | |
65 | // &DECLARE ("output", "pio_clients_rd"); | |
66 | ||
67 | // &DECLARE ("input", "dbg1_niu_dbg_sel[4:0]"); | |
68 | // &DECLARE ("output", "niu_mio_debug_clock[1:0]"); | |
69 | // &DECLARE ("output", "niu_mio_debug_data[31:0]"); | |
70 | ||
71 | // &DECLARE ("output", "niu_efu_ram0_data"); | |
72 | // &DECLARE ("output", "niu_efu_ram1_data"); | |
73 | ||
74 | // &DECLARE ("input", "tcu_rdp_io_clk_stop"); | |
75 | ||
76 | // &DECLARE ("input","tdmc_pio_intri[31:0]"); | |
77 | // &DECLARE ("input","tdmc_pio_intrj[31:0]"); | |
78 | // #################################### | |
79 | ||
80 | // &INSTANCE ("/vobs/neptune/design/niu/rdp/rtl/rdp_dmoreg.v", "rdp_dmoreg"); | |
81 | // &INSTANCE ("/vobs/neptune/design/niu/rdp/rtl/n2_niu_pio.v", "niu_pio"); | |
82 | // &INSTANCE ("/vobs/neptune/design/niu/ucb/rtl/niu_pio_ucb.v", "niu_pio_ucb"); | |
83 | // &INSTANCE ("/vobs/neptune/design/niu/rdp/rtl/n2_debug.v", "debug"); | |
84 | // &INSTANCE ("/vobs/neptune/design/niu/rdp/rtl/n2_niu_rdmc.v", "niu_rdmc"); | |
85 | // &INSTANCE ("/vobs/neptune/design/niu/rdp/rtl/rdp_clkgen_rdp_io.v", "rdp_clkgen_rdp_io"); | |
86 | // &INSTANCE ("/vobs/neptune/design/niu/rdp/rtl/rdp_clkgen_rdp_io2x.v", "rdp_clkgen_rdp_io2x"); | |
87 | // &INSTANCE ("/vobs/neptune/design/niu/rdp/rtl/rdp_n2_efuhdr4a_ctl.v", "rdmc_sram_header_0"); | |
88 | // &INSTANCE ("/vobs/neptune/design/niu/rdp/rtl/rdp_n2_efuhdr4b_ctl.v", "rdmc_sram_header_1"); | |
89 | ||
90 | // #################################### | |
91 | // # SRAM Header | |
92 | // #################################### | |
93 | ||
94 | // &CONNECT ("debug.debug_port_sel_in", "dbg1_niu_dbg_sel[4:0]"); | |
95 | // &CONNECT ("debug.debug_clock0_out", "niu_mio_debug_clock[0]"); | |
96 | // &CONNECT ("debug.debug_clock1_out", "niu_mio_debug_clock[1]"); | |
97 | // &CONNECT ("debug.debug_port_data_out", "niu_mio_debug_data[31:0]"); | |
98 | ||
99 | // &CONNECT ("niu_pio.niu_clk", "l1clk"); | |
100 | // &CONNECT ("niu_rdmc.niu_clk", "l1clk"); | |
101 | // &CONNECT ("debug.niu_clk", "l1clk"); | |
102 | // &CONNECT ("rdp_dmoreg.clk", "l1clk"); | |
103 | // &CONNECT ("rdmc_sram_header_0.l2clk", "l1clk"); | |
104 | // &CONNECT ("rdmc_sram_header_1.l2clk", "l1clk"); | |
105 | // &CONNECT ("rdmc_sram_header_0.reset_l", "niu_reset_l"); | |
106 | // &CONNECT ("rdmc_sram_header_1.reset_l", "niu_reset_l"); | |
107 | // &CONNECT ("niu_rdmc.l2clk_2x", "io2xl2clk"); | |
108 | // &CONNECT ("niu_rdmc.iol2clk", "iol2clk"); | |
109 | ||
110 | // &CONNECT ("niu_pio_ucb.niu_clk", "l1clk"); | |
111 | // &CONNECT ("niu_pio_ucb.niu_reset_l", "reset"); | |
112 | // &CONNECT ("niu_pio.dmc_pio_intri", "{tdmc_pio_intri[31:0],rdmc_pio_intr_ldf_a}"); | |
113 | // &CONNECT ("niu_pio.dmc_pio_intrj", "{tdmc_pio_intrj[31:0],rdmc_pio_intr_ldf_b}"); | |
114 | ||
115 | // ## &CONNECT ("niu_rdmc.rdmc_pio_intr_ldf_a", "dmc_pio_intri[31:0]"); | |
116 | // ## &CONNECT ("niu_rdmc.rdmc_pio_intr_ldf_b", "dmc_pio_intri[63:32]"); | |
117 | ||
118 | // &CONNECT ("niu_rdmc.pio_rdmc_wdata", "pio_clients_wdata[63:0]"); | |
119 | // &CONNECT ("niu_rdmc.pio_rdmc_addr", "pio_clients_addr[19:0]"); | |
120 | // &CONNECT ("niu_rdmc.pio_rdmc_rd", "pio_clients_rd"); | |
121 | ||
122 | // &FORCE ("wire","rdmc_pio_port_int"); | |
123 | ||
124 | // #################################### | |
125 | ||
126 | // &CONNECT ("niu_rdmc.hdr_sram_rvalue_rdmc0", "hdr_sram_rvalue_rdmc0[6:0]"); | |
127 | // &CONNECT ("niu_rdmc.hdr_sram_rid_rdmc0", "hdr_sram_rid_rdmc0[1:0]"); | |
128 | // &CONNECT ("niu_rdmc.hdr_sram_wr_en_rdmc0", "hdr_sram_wr_en_rdmc0"); | |
129 | // &CONNECT ("niu_rdmc.hdr_sram_red_clr_rdmc0", "hdr_sram_red_clr_rdmc0"); | |
130 | // &CONNECT ("niu_rdmc.sram_hdr_read_data_rdmc0", "sram_hdr_read_data_rdmc0[6:0]"); | |
131 | ||
132 | // &CONNECT ("rdmc_sram_header_0.hdr_sram_rvalue", "{Unconnected_3[10:7],hdr_sram_rvalue_rdmc0[6:0]}"); | |
133 | // &CONNECT ("rdmc_sram_header_0.hdr_sram_rid", "{Unconnected_1[10:2],hdr_sram_rid_rdmc0[1:0]}"); | |
134 | // &CONNECT ("rdmc_sram_header_0.hdr_sram_wr_en", "hdr_sram_wr_en_rdmc0"); | |
135 | // &CONNECT ("rdmc_sram_header_0.hdr_sram_red_clr", "hdr_sram_red_clr_rdmc0"); | |
136 | // &CONNECT ("rdmc_sram_header_0.sram_hdr_read_data", "{4'b0,sram_hdr_read_data_rdmc0[6:0]}"); | |
137 | ||
138 | // &CONNECT ("niu_rdmc.hdr_sram_rvalue_rdmc1", "hdr_sram_rvalue_rdmc1[6:0]"); | |
139 | // &CONNECT ("niu_rdmc.hdr_sram_rid_rdmc1", "hdr_sram_rid_rdmc1[1:0]"); | |
140 | // &CONNECT ("niu_rdmc.hdr_sram_wr_en_rdmc1", "hdr_sram_wr_en_rdmc1"); | |
141 | // &CONNECT ("niu_rdmc.hdr_sram_red_clr_rdmc1", "hdr_sram_red_clr_rdmc1"); | |
142 | // &CONNECT ("niu_rdmc.sram_hdr_read_data_rdmc1", "sram_hdr_read_data_rdmc1[6:0]"); | |
143 | ||
144 | // &CONNECT ("rdmc_sram_header_1.hdr_sram_rvalue", "{Unconnected_4[10:7],hdr_sram_rvalue_rdmc1[6:0]}"); | |
145 | // &CONNECT ("rdmc_sram_header_1.hdr_sram_rid", "{Unconnected_2[10:2],hdr_sram_rid_rdmc1[1:0]}"); | |
146 | // &CONNECT ("rdmc_sram_header_1.hdr_sram_wr_en", "hdr_sram_wr_en_rdmc1"); | |
147 | // &CONNECT ("rdmc_sram_header_1.hdr_sram_red_clr", "hdr_sram_red_clr_rdmc1"); | |
148 | // &CONNECT ("rdmc_sram_header_1.sram_hdr_read_data", "{4'b0,sram_hdr_read_data_rdmc1[6:0]}"); | |
149 | ||
150 | // &CONNECT ("rdmc_sram_header_0.efu_hdr_write_data", "efu_niu_ram_data"); | |
151 | // &CONNECT ("rdmc_sram_header_0.efu_hdr_xfer_en", "efu_niu_ram0_xfer_en"); | |
152 | // &CONNECT ("rdmc_sram_header_0.efu_hdr_clr", "efu_niu_ram0_clr"); | |
153 | // &CONNECT ("rdmc_sram_header_0.hdr_efu_read_data", "niu_efu_ram0_data"); | |
154 | // &CONNECT ("rdmc_sram_header_0.hdr_efu_xfer_en", "niu_efu_ram0_xfer_en"); | |
155 | // &CONNECT ("rdmc_sram_header_0.scan_in", "1'b0"); | |
156 | // &CONNECT ("rdmc_sram_header_0.scan_out", "not_used0"); | |
157 | ||
158 | // &CONNECT ("rdmc_sram_header_1.efu_hdr_write_data", "efu_niu_ram_data"); | |
159 | // &CONNECT ("rdmc_sram_header_1.efu_hdr_xfer_en", "efu_niu_ram1_xfer_en"); | |
160 | // &CONNECT ("rdmc_sram_header_1.efu_hdr_clr", "efu_niu_ram1_clr"); | |
161 | // &CONNECT ("rdmc_sram_header_1.hdr_efu_read_data", "niu_efu_ram1_data"); | |
162 | // &CONNECT ("rdmc_sram_header_1.hdr_efu_xfer_en", "niu_efu_ram1_xfer_en"); | |
163 | // &CONNECT ("rdmc_sram_header_1.scan_in", "1'b0"); | |
164 | // ########### Temorary Tie to RDP scan_out ################ | |
165 | // &CONNECT ("rdmc_sram_header_1.scan_out", "scan_out"); | |
166 | ||
167 | // &FORCE ("wire", "not_used0"); | |
168 | // &FORCE ("wire", "Unconnected_1[10:2]"); | |
169 | // &FORCE ("wire", "Unconnected_2[10:2]"); | |
170 | // &FORCE ("wire", "Unconnected_3[10:7]"); | |
171 | // &FORCE ("wire", "Unconnected_4[10:7]"); | |
172 | ||
173 | // #################################### | |
174 | // | |
175 | // | |
176 | // &CONNECT ("rdp_clkgen_rdp_io.gclk", "cmp_gclk_c0_rdp"); | |
177 | // &CONNECT ("rdp_clkgen_rdp_io.l1clk", "l1clk"); | |
178 | // &CONNECT ("rdp_clkgen_rdp_io.por_", "niu_reset_l"); | |
179 | // | |
180 | // &CONNECT ("rdp_clkgen_rdp_io.tcu_clk_stop", "tcu_rdp_io_clk_stop"); | |
181 | // &CONNECT ("rdp_clkgen_rdp_io.ccu_cmp_slow_sync_en", "1'b0"); | |
182 | // &CONNECT ("rdp_clkgen_rdp_io.ccu_slow_cmp_sync_en", "1'b0"); | |
183 | // &CONNECT ("rdp_clkgen_rdp_io.ccu_div_ph", "gl_rdp_io_out"); | |
184 | // | |
185 | // &CONNECT ("rdp_clkgen_rdp_io.rst_wmr_protect", "1'b0"); | |
186 | // &CONNECT ("rdp_clkgen_rdp_io.rst_wmr_", "1'b0"); | |
187 | // &CONNECT ("rdp_clkgen_rdp_io.cmp_slow_sync_en", ""); | |
188 | // &CONNECT ("rdp_clkgen_rdp_io.slow_cmp_sync_en", ""); | |
189 | // &CONNECT ("rdp_clkgen_rdp_io.wmr_", ""); | |
190 | // &CONNECT ("rdp_clkgen_rdp_io.wmr_protect", ""); | |
191 | // &CONNECT ("rdp_clkgen_rdp_io.aclk_wmr", ""); | |
192 | // &CONNECT ("rdp_clkgen_rdp_io.pce_ov", "pce_ov"); | |
193 | // &CONNECT ("rdp_clkgen_rdp_io.cluster_div_en", "1'b1"); | |
194 | // &CONNECT ("rdp_clkgen_rdp_io.tcu_scan_en", "tcu_scan_en"); | |
195 | // &CONNECT ("rdp_clkgen_rdp_io.scan_in", "scan_in"); | |
196 | // &CONNECT ("rdp_clkgen_rdp_io.scan_out", "ioclk_scan_out"); | |
197 | ||
198 | // ########################################################## | |
199 | // &CONNECT ("rdp_clkgen_rdp_io2x.io2xl2clk", "io2xl2clk"); | |
200 | // &CONNECT ("rdp_clkgen_rdp_io2x.aclk", "x2aclk"); | |
201 | // &CONNECT ("rdp_clkgen_rdp_io2x.bclk", "x2bclk"); | |
202 | // &CONNECT ("rdp_clkgen_rdp_io2x.scan_out", "x2so"); | |
203 | // &CONNECT ("rdp_clkgen_rdp_io2x.pce_ov", "x2pce_ov"); | |
204 | // &CONNECT ("rdp_clkgen_rdp_io2x.tcu_pce_ov", "pce_ov"); | |
205 | // &CONNECT ("rdp_clkgen_rdp_io2x.wmr_protect", "x2wmr_protect"); | |
206 | // &CONNECT ("rdp_clkgen_rdp_io2x.wmr_", "x2wmr"); | |
207 | // &CONNECT ("rdp_clkgen_rdp_io2x.por_", "x2por"); | |
208 | // &CONNECT ("rdp_clkgen_rdp_io2x.tcu_clk_stop", "tcu_rdp_io_clk_stop"); | |
209 | // &CONNECT ("rdp_clkgen_rdp_io2x.cmp_slow_sync_en", "x2_cmp_slow_sync_en"); | |
210 | // &CONNECT ("rdp_clkgen_rdp_io2x.slow_cmp_sync_en", "x2_slow_cmp_sync_en"); | |
211 | // &CONNECT ("rdp_clkgen_rdp_io2x.aclk_wmr", "x2aclk_wmr"); | |
212 | // &CONNECT ("rdp_clkgen_rdp_io2x.rst_wmr_protect", "1'b1"); | |
213 | // &CONNECT ("rdp_clkgen_rdp_io2x.rst_wmr_", "1'b0"); | |
214 | // &CONNECT ("rdp_clkgen_rdp_io2x.ccu_cmp_slow_sync_en", "1'b0"); | |
215 | // &CONNECT ("rdp_clkgen_rdp_io2x.ccu_slow_cmp_sync_en", "1'b0"); | |
216 | // &CONNECT ("rdp_clkgen_rdp_io2x.ccu_div_ph", "gl_rdp_io2x_out"); | |
217 | // &CONNECT ("rdp_clkgen_rdp_io2x.cluster_div_en", "1'b1"); | |
218 | // &CONNECT ("rdp_clkgen_rdp_io2x.tcu_scan_en", "tcu_scan_en"); | |
219 | // &CONNECT ("rdp_clkgen_rdp_io2x.scan_in", "ioclk_scan_out"); | |
220 | // &CONNECT ("rdp_clkgen_rdp_io2x.scan_out", "io2xclk_scan_out"); | |
221 | // &CONNECT ("rdp_clkgen_rdp_io2x.tcu_wr_inhibit", "1'b0"); | |
222 | // &CONNECT ("rdp_clkgen_rdp_io2x.array_wr_inhibit", "x2_array_wr_inhibit"); | |
223 | // &CONNECT ("rdp_clkgen_rdp_io2x.gclk", "cmp_gclk_c0_rdp "); | |
224 | ||
225 | // &FORCE ("wire","io2xclk_scan_out"); | |
226 | // &FORCE ("wire","x2aclk"); | |
227 | // &FORCE ("wire","x2bclk"); | |
228 | // &FORCE ("wire","x2por"); | |
229 | // &FORCE ("wire","x2wmr"); | |
230 | // &FORCE ("wire","x2wmr_protect"); | |
231 | // &FORCE ("wire","x2aclk_wmr"); | |
232 | // &FORCE ("wire", "x2_cmp_slow_sync_en"); | |
233 | // &FORCE ("wire", "x2_slow_cmp_sync_en"); | |
234 | // &FORCE ("wire", "x2pce_ov"); | |
235 | // &FORCE ("wire", "x2_array_wr_inhibit"); | |
236 | ||
237 | // ########################################################## | |
238 | // &CONNECT ("rdmc_sram_header_0.tcu_clk_stop", "tcu_rdp_io_clk_stop"); | |
239 | // &CONNECT ("rdmc_sram_header_1.tcu_clk_stop", "tcu_rdp_io_clk_stop"); | |
240 | // ########################################################## | |
241 | ||
242 | // ######################################################## | |
243 | // &CONNECT ("rdp_clkgen_rdp_io2x.tcu_aclk", "aclk"); | |
244 | // &CONNECT ("rdp_clkgen_rdp_io2x.tcu_bclk", "bclk"); | |
245 | // &CONNECT ("niu_rdmc.tcu_aclk", "aclk"); | |
246 | // &CONNECT ("niu_rdmc.tcu_bclk", "bclk"); | |
247 | // &CONNECT ("niu_rdmc.tcu_array_wr_inhibit", "array_wr_inhibit"); | |
248 | // &CONNECT ("rdmc_sram_header_0.tcu_aclk", "aclk"); | |
249 | // &CONNECT ("rdmc_sram_header_0.tcu_bclk", "bclk"); | |
250 | // &CONNECT ("rdmc_sram_header_0.tcu_pce_ov", "pce_ov"); | |
251 | // &CONNECT ("rdmc_sram_header_1.tcu_aclk", "aclk"); | |
252 | // &CONNECT ("rdmc_sram_header_1.tcu_bclk", "bclk"); | |
253 | // &CONNECT ("rdmc_sram_header_1.tcu_pce_ov", "pce_ov"); | |
254 | ||
255 | ||
256 | // VPERL: PERL_END | |
257 | // VPERL: GENERATED_BEG | |
258 | ||
259 | module rdp ( | |
260 | tcu_atpg_mode, | |
261 | tcu_wr_inhibit, | |
262 | scan_in, | |
263 | scan_out, | |
264 | pio_clients_wdata, | |
265 | pio_clients_addr, | |
266 | pio_clients_rd, | |
267 | dbg1_niu_dbg_sel, | |
268 | niu_mio_debug_clock, | |
269 | niu_mio_debug_data, | |
270 | niu_efu_ram0_data, | |
271 | niu_efu_ram1_data, | |
272 | tcu_rdp_io_clk_stop, | |
273 | tdmc_pio_intri, | |
274 | tdmc_pio_intrj, | |
275 | arb_pio_all_npwdirty, | |
276 | arb_pio_all_rddirty, | |
277 | arb_pio_dirtid_npwstatus, | |
278 | arb_pio_dirtid_rdstatus, | |
279 | cluster_arst_l, | |
280 | cmp_gclk_c0_rdp, | |
281 | efu_niu_ram0_clr, | |
282 | efu_niu_ram0_xfer_en, | |
283 | efu_niu_ram1_clr, | |
284 | efu_niu_ram1_xfer_en, | |
285 | efu_niu_ram_data, | |
286 | fflp_debug_port, | |
287 | fflp_pio_ack, | |
288 | fflp_pio_err, | |
289 | fflp_pio_intr, | |
290 | fflp_pio_rdata, | |
291 | gl_rdp_io2x_out, | |
292 | gl_rdp_io_out, | |
293 | ipp_debug_port, | |
294 | ipp_dmc_dat_ack0, | |
295 | ipp_dmc_dat_ack1, | |
296 | ipp_dmc_dat_err0, | |
297 | ipp_dmc_dat_err1, | |
298 | ipp_dmc_data0, | |
299 | ipp_dmc_data1, | |
300 | ipp_dmc_ful_pkt0, | |
301 | ipp_dmc_ful_pkt1, | |
302 | ipp_pio_ack, | |
303 | ipp_pio_err, | |
304 | ipp_pio_intr, | |
305 | ipp_pio_rdata, | |
306 | mac_debug_port, | |
307 | mac_pio_ack, | |
308 | mac_pio_err, | |
309 | mac_pio_intr0, | |
310 | mac_pio_intr1, | |
311 | mac_pio_rdata, | |
312 | meta0_rdmc_rcr_ack_client, | |
313 | meta0_rdmc_rcr_ack_cmd, | |
314 | meta0_rdmc_rcr_ack_cmd_status, | |
315 | meta0_rdmc_rcr_ack_dma_num, | |
316 | meta0_rdmc_rcr_ack_ready, | |
317 | meta0_rdmc_rcr_data_req, | |
318 | meta0_rdmc_rcr_req_accept, | |
319 | meta0_rdmc_wr_data_req, | |
320 | meta0_rdmc_wr_req_accept, | |
321 | meta1_rdmc_rbr_req_accept, | |
322 | meta1_rdmc_rbr_req_error, | |
323 | meta1_rdmc_rbr_resp_byteenable, | |
324 | meta1_rdmc_rbr_resp_client, | |
325 | meta1_rdmc_rbr_resp_cmd, | |
326 | meta1_rdmc_rbr_resp_cmd_status, | |
327 | meta1_rdmc_rbr_resp_comp, | |
328 | meta1_rdmc_rbr_resp_data, | |
329 | meta1_rdmc_rbr_resp_data_status, | |
330 | meta1_rdmc_rbr_resp_data_valid, | |
331 | meta1_rdmc_rbr_resp_dma_num, | |
332 | meta1_rdmc_rbr_resp_ready, | |
333 | meta1_rdmc_rbr_resp_trans_comp, | |
334 | meta_arb_debug_port, | |
335 | mif_pio_intr, | |
336 | ncu_niu_data, | |
337 | ncu_niu_stall, | |
338 | ncu_niu_vld, | |
339 | rdp_rdmc_mbist_scan_in, | |
340 | rst_por_, | |
341 | smx_debug_port, | |
342 | smx_pio_intr, | |
343 | smx_pio_status, | |
344 | tcu_aclk, | |
345 | tcu_bclk, | |
346 | tcu_div_bypass, | |
347 | tcu_mbist_bisi_en, | |
348 | tcu_mbist_user_mode, | |
349 | tcu_pce_ov, | |
350 | tcu_rdp_rdmc_mbist_start, | |
351 | tcu_scan_en, | |
352 | tcu_se_scancollar_in, | |
353 | tcu_se_scancollar_out, | |
354 | tdmc_debug_port, | |
355 | tdmc_pio_ack, | |
356 | tdmc_pio_err, | |
357 | tdmc_pio_rdata, | |
358 | txc_debug_port, | |
359 | txc_pio_ack, | |
360 | txc_pio_err, | |
361 | txc_pio_intr, | |
362 | txc_pio_rdata, | |
363 | zcp_debug_port, | |
364 | zcp_dmc_ack0, | |
365 | zcp_dmc_ack1, | |
366 | zcp_dmc_dat0, | |
367 | zcp_dmc_dat1, | |
368 | zcp_dmc_dat_err0, | |
369 | zcp_dmc_dat_err1, | |
370 | zcp_dmc_ful_pkt0, | |
371 | zcp_dmc_ful_pkt1, | |
372 | zcp_pio_ack, | |
373 | zcp_pio_err, | |
374 | zcp_pio_intr, | |
375 | zcp_pio_rdata, | |
376 | dmc_ipp_dat_req0, | |
377 | dmc_ipp_dat_req1, | |
378 | dmc_zcp_req0, | |
379 | dmc_zcp_req1, | |
380 | mac_reset0, | |
381 | mac_reset1, | |
382 | niu_efu_ram0_xfer_en, | |
383 | niu_efu_ram1_xfer_en, | |
384 | niu_ncu_data, | |
385 | niu_ncu_stall, | |
386 | niu_ncu_vld, | |
387 | pio_arb_ctrl, | |
388 | pio_arb_debug_vector, | |
389 | pio_arb_dirtid_clr, | |
390 | pio_arb_dirtid_enable, | |
391 | pio_arb_np_threshold, | |
392 | pio_arb_rd_threshold, | |
393 | pio_fflp_sel, | |
394 | pio_ipp_sel, | |
395 | pio_mac_sel, | |
396 | pio_smx_cfg_data, | |
397 | pio_smx_clear_intr, | |
398 | pio_smx_ctrl, | |
399 | pio_smx_debug_vector, | |
400 | pio_tdmc_sel, | |
401 | pio_txc_sel, | |
402 | pio_zcp_sel, | |
403 | rdmc_meta0_rcr_ack_accept, | |
404 | rdmc_meta0_rcr_data, | |
405 | rdmc_meta0_rcr_data_valid, | |
406 | rdmc_meta0_rcr_req, | |
407 | rdmc_meta0_rcr_req_address, | |
408 | rdmc_meta0_rcr_req_byteenable, | |
409 | rdmc_meta0_rcr_req_cmd, | |
410 | rdmc_meta0_rcr_req_dma_num, | |
411 | rdmc_meta0_rcr_req_func_num, | |
412 | rdmc_meta0_rcr_req_length, | |
413 | rdmc_meta0_rcr_req_port_num, | |
414 | rdmc_meta0_rcr_status, | |
415 | rdmc_meta0_rcr_transfer_comp, | |
416 | rdmc_meta0_wr_data, | |
417 | rdmc_meta0_wr_data_valid, | |
418 | rdmc_meta0_wr_req, | |
419 | rdmc_meta0_wr_req_address, | |
420 | rdmc_meta0_wr_req_byteenable, | |
421 | rdmc_meta0_wr_req_cmd, | |
422 | rdmc_meta0_wr_req_dma_num, | |
423 | rdmc_meta0_wr_req_func_num, | |
424 | rdmc_meta0_wr_req_length, | |
425 | rdmc_meta0_wr_req_port_num, | |
426 | rdmc_meta0_wr_status, | |
427 | rdmc_meta0_wr_transfer_comp, | |
428 | rdmc_meta1_rbr_req, | |
429 | rdmc_meta1_rbr_req_address, | |
430 | rdmc_meta1_rbr_req_cmd, | |
431 | rdmc_meta1_rbr_req_dma_num, | |
432 | rdmc_meta1_rbr_req_func_num, | |
433 | rdmc_meta1_rbr_req_length, | |
434 | rdmc_meta1_rbr_req_port_num, | |
435 | rdmc_meta1_rbr_resp_accept, | |
436 | rdp_rdmc_mbist_scan_out, | |
437 | rdp_rdmc_tcu_mbist_done, | |
438 | rdp_rdmc_tcu_mbist_fail, | |
439 | rdp_tcu_dmo_dout | |
440 | ); | |
441 | ||
442 | input arb_pio_all_npwdirty; | |
443 | input arb_pio_all_rddirty; | |
444 | input [5:0] arb_pio_dirtid_npwstatus; | |
445 | input [5:0] arb_pio_dirtid_rdstatus; | |
446 | input cluster_arst_l; | |
447 | input cmp_gclk_c0_rdp; | |
448 | input efu_niu_ram0_clr; | |
449 | input efu_niu_ram0_xfer_en; | |
450 | input efu_niu_ram1_clr; | |
451 | input efu_niu_ram1_xfer_en; | |
452 | input efu_niu_ram_data; | |
453 | input [31:0] fflp_debug_port; | |
454 | input fflp_pio_ack; | |
455 | input fflp_pio_err; | |
456 | input fflp_pio_intr; | |
457 | input [63:0] fflp_pio_rdata; | |
458 | input gl_rdp_io2x_out; | |
459 | input gl_rdp_io_out; | |
460 | input [31:0] ipp_debug_port; | |
461 | input ipp_dmc_dat_ack0; | |
462 | input ipp_dmc_dat_ack1; | |
463 | input ipp_dmc_dat_err0; | |
464 | input ipp_dmc_dat_err1; | |
465 | input [129:0] ipp_dmc_data0; | |
466 | input [129:0] ipp_dmc_data1; | |
467 | input ipp_dmc_ful_pkt0; | |
468 | input ipp_dmc_ful_pkt1; | |
469 | input ipp_pio_ack; | |
470 | input ipp_pio_err; | |
471 | input ipp_pio_intr; | |
472 | input [63:0] ipp_pio_rdata; | |
473 | input [31:0] mac_debug_port; | |
474 | input mac_pio_ack; | |
475 | input mac_pio_err; | |
476 | input mac_pio_intr0; | |
477 | input mac_pio_intr1; | |
478 | input [63:0] mac_pio_rdata; | |
479 | input meta0_rdmc_rcr_ack_client; | |
480 | input [7:0] meta0_rdmc_rcr_ack_cmd; | |
481 | input [3:0] meta0_rdmc_rcr_ack_cmd_status; | |
482 | input [4:0] meta0_rdmc_rcr_ack_dma_num; | |
483 | input meta0_rdmc_rcr_ack_ready; | |
484 | input meta0_rdmc_rcr_data_req; | |
485 | input meta0_rdmc_rcr_req_accept; | |
486 | input meta0_rdmc_wr_data_req; | |
487 | input meta0_rdmc_wr_req_accept; | |
488 | input meta1_rdmc_rbr_req_accept; | |
489 | input meta1_rdmc_rbr_req_error; | |
490 | input [15:0] meta1_rdmc_rbr_resp_byteenable; | |
491 | input meta1_rdmc_rbr_resp_client; | |
492 | input [7:0] meta1_rdmc_rbr_resp_cmd; | |
493 | input [3:0] meta1_rdmc_rbr_resp_cmd_status; | |
494 | input meta1_rdmc_rbr_resp_comp; | |
495 | input [127:0] meta1_rdmc_rbr_resp_data; | |
496 | input [3:0] meta1_rdmc_rbr_resp_data_status; | |
497 | input meta1_rdmc_rbr_resp_data_valid; | |
498 | input [4:0] meta1_rdmc_rbr_resp_dma_num; | |
499 | input meta1_rdmc_rbr_resp_ready; | |
500 | input meta1_rdmc_rbr_resp_trans_comp; | |
501 | input [31:0] meta_arb_debug_port; | |
502 | input mif_pio_intr; | |
503 | input [31:0] ncu_niu_data; | |
504 | input ncu_niu_stall; | |
505 | input ncu_niu_vld; | |
506 | input rdp_rdmc_mbist_scan_in; | |
507 | input rst_por_; | |
508 | input [31:0] smx_debug_port; | |
509 | input smx_pio_intr; | |
510 | input [31:0] smx_pio_status; | |
511 | input tcu_aclk; | |
512 | input tcu_bclk; | |
513 | input tcu_div_bypass; // bypasses clk divider to mux in ext clk | |
514 | input tcu_mbist_bisi_en; | |
515 | input tcu_mbist_user_mode; | |
516 | input tcu_pce_ov; | |
517 | input tcu_rdp_rdmc_mbist_start; | |
518 | input tcu_scan_en; // unused as of today - feb 10, 05 | |
519 | input tcu_se_scancollar_in; | |
520 | input tcu_se_scancollar_out; | |
521 | input [31:0] tdmc_debug_port; | |
522 | input tdmc_pio_ack; | |
523 | input tdmc_pio_err; | |
524 | input [63:0] tdmc_pio_rdata; | |
525 | input [31:0] txc_debug_port; | |
526 | input txc_pio_ack; | |
527 | input txc_pio_err; | |
528 | input txc_pio_intr; | |
529 | input [63:0] txc_pio_rdata; | |
530 | input [31:0] zcp_debug_port; | |
531 | input zcp_dmc_ack0; | |
532 | input zcp_dmc_ack1; | |
533 | input [129:0] zcp_dmc_dat0; | |
534 | input [129:0] zcp_dmc_dat1; | |
535 | input zcp_dmc_dat_err0; | |
536 | input zcp_dmc_dat_err1; | |
537 | input zcp_dmc_ful_pkt0; | |
538 | input zcp_dmc_ful_pkt1; | |
539 | input zcp_pio_ack; | |
540 | input zcp_pio_err; | |
541 | input zcp_pio_intr; | |
542 | input [63:0] zcp_pio_rdata; | |
543 | output dmc_ipp_dat_req0; | |
544 | output dmc_ipp_dat_req1; | |
545 | output dmc_zcp_req0; | |
546 | output dmc_zcp_req1; | |
547 | output mac_reset0; | |
548 | output mac_reset1; | |
549 | output niu_efu_ram0_xfer_en; | |
550 | output niu_efu_ram1_xfer_en; | |
551 | output [31:0] niu_ncu_data; | |
552 | output niu_ncu_stall; | |
553 | output niu_ncu_vld; | |
554 | output [31:0] pio_arb_ctrl; | |
555 | output [31:0] pio_arb_debug_vector; | |
556 | output pio_arb_dirtid_clr; | |
557 | output pio_arb_dirtid_enable; | |
558 | output [5:0] pio_arb_np_threshold; | |
559 | output [5:0] pio_arb_rd_threshold; | |
560 | output pio_fflp_sel; | |
561 | output pio_ipp_sel; | |
562 | output pio_mac_sel; | |
563 | output [31:0] pio_smx_cfg_data; | |
564 | output pio_smx_clear_intr; | |
565 | output [31:0] pio_smx_ctrl; | |
566 | output [31:0] pio_smx_debug_vector; | |
567 | output pio_tdmc_sel; | |
568 | output pio_txc_sel; | |
569 | output pio_zcp_sel; | |
570 | output rdmc_meta0_rcr_ack_accept; | |
571 | output [127:0] rdmc_meta0_rcr_data; | |
572 | output rdmc_meta0_rcr_data_valid; | |
573 | output rdmc_meta0_rcr_req; | |
574 | output [63:0] rdmc_meta0_rcr_req_address; | |
575 | output [15:0] rdmc_meta0_rcr_req_byteenable; | |
576 | output [7:0] rdmc_meta0_rcr_req_cmd; | |
577 | output [4:0] rdmc_meta0_rcr_req_dma_num; | |
578 | output [1:0] rdmc_meta0_rcr_req_func_num; | |
579 | output [13:0] rdmc_meta0_rcr_req_length; | |
580 | output [1:0] rdmc_meta0_rcr_req_port_num; | |
581 | output [3:0] rdmc_meta0_rcr_status; | |
582 | output rdmc_meta0_rcr_transfer_comp; | |
583 | output [127:0] rdmc_meta0_wr_data; | |
584 | output rdmc_meta0_wr_data_valid; | |
585 | output rdmc_meta0_wr_req; | |
586 | output [63:0] rdmc_meta0_wr_req_address; | |
587 | output [15:0] rdmc_meta0_wr_req_byteenable; | |
588 | output [7:0] rdmc_meta0_wr_req_cmd; | |
589 | output [4:0] rdmc_meta0_wr_req_dma_num; | |
590 | output [1:0] rdmc_meta0_wr_req_func_num; | |
591 | output [13:0] rdmc_meta0_wr_req_length; | |
592 | output [1:0] rdmc_meta0_wr_req_port_num; | |
593 | output [3:0] rdmc_meta0_wr_status; | |
594 | output rdmc_meta0_wr_transfer_comp; | |
595 | output rdmc_meta1_rbr_req; | |
596 | output [63:0] rdmc_meta1_rbr_req_address; | |
597 | output [7:0] rdmc_meta1_rbr_req_cmd; | |
598 | output [4:0] rdmc_meta1_rbr_req_dma_num; | |
599 | output [1:0] rdmc_meta1_rbr_req_func_num; | |
600 | output [13:0] rdmc_meta1_rbr_req_length; | |
601 | output [1:0] rdmc_meta1_rbr_req_port_num; | |
602 | output rdmc_meta1_rbr_resp_accept; | |
603 | output rdp_rdmc_mbist_scan_out; | |
604 | output rdp_rdmc_tcu_mbist_done; | |
605 | output rdp_rdmc_tcu_mbist_fail; | |
606 | output [39:0] rdp_tcu_dmo_dout; | |
607 | ||
608 | wire [26:0] addr_in; | |
609 | wire [63:0] data_in; | |
610 | wire [63:0] data_out; | |
611 | wire [31:0] pio_debug_port; | |
612 | wire [31:0] rdmc_debug_port; | |
613 | wire [31:0] rdmc_pio_intr_ldf_a; | |
614 | wire [31:0] rdmc_pio_intr_ldf_b; | |
615 | wire [63:0] rdmc_pio_rdata; | |
616 | wire [39:0] rdp_tcu_dmo_data_out; | |
617 | wire [10:2] Unconnected_1; | |
618 | wire [10:2] Unconnected_2; | |
619 | wire [10:7] Unconnected_3; | |
620 | wire [10:7] Unconnected_4; | |
621 | wire aclk; | |
622 | wire array_wr_inhibit; | |
623 | wire bclk; | |
624 | wire [1:0] buf_id_in; | |
625 | wire [1:0] buf_id_out; | |
626 | wire [6:0] dev_id; | |
627 | wire hdr_sram_red_clr_rdmc0; | |
628 | wire hdr_sram_red_clr_rdmc1; | |
629 | wire [1:0] hdr_sram_rid_rdmc0; | |
630 | wire [1:0] hdr_sram_rid_rdmc1; | |
631 | wire [6:0] hdr_sram_rvalue_rdmc0; | |
632 | wire [6:0] hdr_sram_rvalue_rdmc1; | |
633 | wire hdr_sram_wr_en_rdmc0; | |
634 | wire hdr_sram_wr_en_rdmc1; | |
635 | wire int_busy; | |
636 | wire int_vld; | |
637 | wire io2xclk_scan_out; | |
638 | wire io2xl2clk; | |
639 | wire ioclk_scan_out; | |
640 | wire iol2clk; | |
641 | wire l1clk; | |
642 | wire niu_reset_l; | |
643 | wire not_used0; | |
644 | wire pce_ov; | |
645 | wire pio_rdmc_sel; | |
646 | wire rack_busy; | |
647 | wire rd_ack_vld; | |
648 | wire rd_nack_vld; | |
649 | wire rd_req_vld; | |
650 | wire rdmc_pio_ack; | |
651 | wire rdmc_pio_err; | |
652 | wire rdmc_pio_port_int; | |
653 | wire req_accepted; | |
654 | wire reset; | |
655 | wire [6:0] sram_hdr_read_data_rdmc0; | |
656 | wire [6:0] sram_hdr_read_data_rdmc1; | |
657 | wire [5:0] thr_id_in; | |
658 | wire [5:0] thr_id_out; | |
659 | wire wr_req_vld; | |
660 | wire x2_array_wr_inhibit; | |
661 | wire x2_cmp_slow_sync_en; | |
662 | wire x2_slow_cmp_sync_en; | |
663 | wire x2aclk; | |
664 | wire x2aclk_wmr; | |
665 | wire x2bclk; | |
666 | wire x2pce_ov; | |
667 | wire x2por; | |
668 | wire x2wmr; | |
669 | wire x2wmr_protect; | |
670 | input tcu_atpg_mode; // New | |
671 | input tcu_wr_inhibit; // New | |
672 | input scan_in; // unused as of today - feb 10, 05 | |
673 | output scan_out; // unused as of today - feb 10, 05 | |
674 | output [63:0] pio_clients_wdata; | |
675 | output [19:0] pio_clients_addr; | |
676 | output pio_clients_rd; | |
677 | input [4:0] dbg1_niu_dbg_sel; | |
678 | output [1:0] niu_mio_debug_clock; | |
679 | output [31:0] niu_mio_debug_data; | |
680 | output niu_efu_ram0_data; | |
681 | output niu_efu_ram1_data; | |
682 | input tcu_rdp_io_clk_stop; | |
683 | input [31:0] tdmc_pio_intri; | |
684 | input [31:0] tdmc_pio_intrj; | |
685 | ||
686 | rdp_dmoreg rdp_dmoreg ( | |
687 | .clk (l1clk), | |
688 | .rdp_tcu_dmo_data_out (rdp_tcu_dmo_data_out[39:0]), | |
689 | .rdp_tcu_dmo_dout (rdp_tcu_dmo_dout[39:0]) | |
690 | ); | |
691 | ||
692 | niu_pio niu_pio ( | |
693 | .pio_smx_cfg_data (pio_smx_cfg_data[31:0]), | |
694 | .smx_pio_intr (smx_pio_intr), | |
695 | .smx_pio_status (smx_pio_status[31:0]), | |
696 | .pio_smx_clear_intr (pio_smx_clear_intr), | |
697 | .pio_smx_ctrl (pio_smx_ctrl[31:0]), | |
698 | .pio_smx_debug_vector (pio_smx_debug_vector[31:0]), | |
699 | .niu_reset_l (niu_reset_l), | |
700 | .niu_clk (l1clk), | |
701 | .reset (reset), | |
702 | .pio_clients_addr (pio_clients_addr[19:0]), | |
703 | .pio_clients_rd (pio_clients_rd), | |
704 | .pio_clients_wdata (pio_clients_wdata[63:0]), | |
705 | .pio_mac_sel (pio_mac_sel), | |
706 | .mac_pio_ack (mac_pio_ack), | |
707 | .mac_pio_rdata (mac_pio_rdata[63:0]), | |
708 | .mac_pio_err (mac_pio_err), | |
709 | .mac_pio_intr0 (mac_pio_intr0), | |
710 | .mac_pio_intr1 (mac_pio_intr1), | |
711 | .mif_pio_intr (mif_pio_intr), | |
712 | .pio_ipp_sel (pio_ipp_sel), | |
713 | .ipp_pio_ack (ipp_pio_ack), | |
714 | .ipp_pio_rdata (ipp_pio_rdata[63:0]), | |
715 | .ipp_pio_err (ipp_pio_err), | |
716 | .ipp_pio_intr (ipp_pio_intr), | |
717 | .pio_fflp_sel (pio_fflp_sel), | |
718 | .fflp_pio_ack (fflp_pio_ack), | |
719 | .fflp_pio_rdata (fflp_pio_rdata[63:0]), | |
720 | .fflp_pio_err (fflp_pio_err), | |
721 | .fflp_pio_intr (fflp_pio_intr), | |
722 | .pio_zcp_sel (pio_zcp_sel), | |
723 | .zcp_pio_ack (zcp_pio_ack), | |
724 | .zcp_pio_rdata (zcp_pio_rdata[63:0]), | |
725 | .zcp_pio_err (zcp_pio_err), | |
726 | .zcp_pio_intr (zcp_pio_intr), | |
727 | .pio_tdmc_sel (pio_tdmc_sel), | |
728 | .tdmc_pio_ack (tdmc_pio_ack), | |
729 | .tdmc_pio_rdata (tdmc_pio_rdata[63:0]), | |
730 | .tdmc_pio_err (tdmc_pio_err), | |
731 | .pio_rdmc_sel (pio_rdmc_sel), | |
732 | .rdmc_pio_ack (rdmc_pio_ack), | |
733 | .rdmc_pio_rdata (rdmc_pio_rdata[63:0]), | |
734 | .rdmc_pio_err (rdmc_pio_err), | |
735 | .rdmc_pio_port_int (rdmc_pio_port_int), | |
736 | .dmc_pio_intri ({tdmc_pio_intri[31:0],rdmc_pio_intr_ldf_a}), | |
737 | .dmc_pio_intrj ({tdmc_pio_intrj[31:0],rdmc_pio_intr_ldf_b}), | |
738 | .pio_txc_sel (pio_txc_sel), | |
739 | .txc_pio_ack (txc_pio_ack), | |
740 | .txc_pio_rdata (txc_pio_rdata[63:0]), | |
741 | .txc_pio_err (txc_pio_err), | |
742 | .txc_pio_intr (txc_pio_intr), | |
743 | .rd_req_vld (rd_req_vld), | |
744 | .addr_in (addr_in), | |
745 | .thr_id_in (thr_id_in[5:0]), | |
746 | .buf_id_in (buf_id_in[1:0]), | |
747 | .req_accepted (req_accepted), | |
748 | .rack_busy (rack_busy), | |
749 | .rd_ack_vld (rd_ack_vld), | |
750 | .rd_nack_vld (rd_nack_vld), | |
751 | .data_out (data_out[63:0]), | |
752 | .thr_id_out (thr_id_out[5:0]), | |
753 | .buf_id_out (buf_id_out[1:0]), | |
754 | .wr_req_vld (wr_req_vld), | |
755 | .data_in (data_in[63:0]), | |
756 | .int_busy (int_busy), | |
757 | .int_vld (int_vld), | |
758 | .dev_id (dev_id[6:0]), | |
759 | .mac_reset0 (mac_reset0), | |
760 | .mac_reset1 (mac_reset1), | |
761 | .pio_debug_port (pio_debug_port[31:0]), | |
762 | .pio_arb_dirtid_enable (pio_arb_dirtid_enable), | |
763 | .pio_arb_dirtid_clr (pio_arb_dirtid_clr), | |
764 | .pio_arb_np_threshold (pio_arb_np_threshold[5:0]), | |
765 | .pio_arb_rd_threshold (pio_arb_rd_threshold[5:0]), | |
766 | .arb_pio_dirtid_rdstatus (arb_pio_dirtid_rdstatus[5:0]), | |
767 | .arb_pio_dirtid_npwstatus (arb_pio_dirtid_npwstatus[5:0]), | |
768 | .arb_pio_all_npwdirty (arb_pio_all_npwdirty), | |
769 | .arb_pio_all_rddirty (arb_pio_all_rddirty), | |
770 | .pio_arb_ctrl (pio_arb_ctrl[31:0]), | |
771 | .pio_arb_debug_vector (pio_arb_debug_vector[31:0]) | |
772 | ); | |
773 | ||
774 | niu_pio_ucb niu_pio_ucb ( | |
775 | .niu_clk (l1clk), | |
776 | .niu_reset_l (reset), | |
777 | .ncu_niu_vld (ncu_niu_vld), | |
778 | .ncu_niu_data (ncu_niu_data[31:0]), | |
779 | .niu_ncu_stall (niu_ncu_stall), | |
780 | .niu_ncu_vld (niu_ncu_vld), | |
781 | .niu_ncu_data (niu_ncu_data[31:0]), | |
782 | .ncu_niu_stall (ncu_niu_stall), | |
783 | .rd_req_vld (rd_req_vld), | |
784 | .wr_req_vld (wr_req_vld), | |
785 | .thr_id_in (thr_id_in[5:0]), | |
786 | .buf_id_in (buf_id_in[1:0]), | |
787 | .addr_in (addr_in[26:0]), | |
788 | .data_in (data_in[63:0]), | |
789 | .req_accepted (req_accepted), | |
790 | .rd_ack_vld (rd_ack_vld), | |
791 | .rd_nack_vld (rd_nack_vld), | |
792 | .thr_id_out (thr_id_out[5:0]), | |
793 | .buf_id_out (buf_id_out[1:0]), | |
794 | .data_out (data_out[63:0]), | |
795 | .rack_busy (rack_busy), | |
796 | .int_vld (int_vld), | |
797 | .dev_id (dev_id[6:0]), | |
798 | .int_busy (int_busy) | |
799 | ); | |
800 | ||
801 | debug debug ( | |
802 | .debug_port_sel_in (dbg1_niu_dbg_sel[4:0]), | |
803 | .debug_port_data_out (niu_mio_debug_data[31:0]), | |
804 | .txc_debug_port (txc_debug_port[31:0]), | |
805 | .tdmc_debug_port (tdmc_debug_port[31:0]), | |
806 | .rdmc_debug_port (rdmc_debug_port[31:0]), | |
807 | .zcp_debug_port (zcp_debug_port[31:0]), | |
808 | .ipp_debug_port (ipp_debug_port[31:0]), | |
809 | .fflp_debug_port (fflp_debug_port[31:0]), | |
810 | .pio_debug_port (pio_debug_port[31:0]), | |
811 | .mac_debug_port (mac_debug_port[31:0]), | |
812 | .meta_arb_debug_port (meta_arb_debug_port[31:0]), | |
813 | .niu_clk (l1clk), | |
814 | .smx_debug_port (smx_debug_port[31:0]), | |
815 | .debug_clock0_out (niu_mio_debug_clock[0]), | |
816 | .debug_clock1_out (niu_mio_debug_clock[1]) | |
817 | ); | |
818 | ||
819 | niu_rdmc niu_rdmc ( | |
820 | .niu_clk (l1clk), | |
821 | .niu_reset_l (niu_reset_l), | |
822 | .pio_rdmc_wdata (pio_clients_wdata[63:0]), | |
823 | .pio_rdmc_rd (pio_clients_rd), | |
824 | .pio_rdmc_sel (pio_rdmc_sel), | |
825 | .pio_rdmc_addr (pio_clients_addr[19:0]), | |
826 | .ipp_dmc_ful_pkt0 (ipp_dmc_ful_pkt0), | |
827 | .ipp_dmc_dat_ack0 (ipp_dmc_dat_ack0), | |
828 | .ipp_dmc_dat_err0 (ipp_dmc_dat_err0), | |
829 | .ipp_dmc_data0 (ipp_dmc_data0[129:0]), | |
830 | .ipp_dmc_ful_pkt1 (ipp_dmc_ful_pkt1), | |
831 | .ipp_dmc_dat_ack1 (ipp_dmc_dat_ack1), | |
832 | .ipp_dmc_dat_err1 (ipp_dmc_dat_err1), | |
833 | .ipp_dmc_data1 (ipp_dmc_data1[129:0]), | |
834 | .zcp_dmc_ful_pkt0 (zcp_dmc_ful_pkt0), | |
835 | .zcp_dmc_ack0 (zcp_dmc_ack0), | |
836 | .zcp_dmc_dat0 (zcp_dmc_dat0[129:0]), | |
837 | .zcp_dmc_dat_err0 (zcp_dmc_dat_err0), | |
838 | .zcp_dmc_ful_pkt1 (zcp_dmc_ful_pkt1), | |
839 | .zcp_dmc_ack1 (zcp_dmc_ack1), | |
840 | .zcp_dmc_dat1 (zcp_dmc_dat1[129:0]), | |
841 | .zcp_dmc_dat_err1 (zcp_dmc_dat_err1), | |
842 | .meta0_rdmc_wr_req_accept (meta0_rdmc_wr_req_accept), | |
843 | .meta0_rdmc_wr_data_req (meta0_rdmc_wr_data_req), | |
844 | .meta0_rdmc_rcr_req_accept (meta0_rdmc_rcr_req_accept), | |
845 | .meta0_rdmc_rcr_data_req (meta0_rdmc_rcr_data_req), | |
846 | .meta0_rdmc_rcr_ack_ready (meta0_rdmc_rcr_ack_ready), | |
847 | .meta0_rdmc_rcr_ack_cmd (meta0_rdmc_rcr_ack_cmd[7:0]), | |
848 | .meta0_rdmc_rcr_ack_cmd_status (meta0_rdmc_rcr_ack_cmd_status[3:0]), | |
849 | .meta0_rdmc_rcr_ack_client (meta0_rdmc_rcr_ack_client), | |
850 | .meta0_rdmc_rcr_ack_dma_num (meta0_rdmc_rcr_ack_dma_num[4:0]), | |
851 | .meta1_rdmc_rbr_req_accept (meta1_rdmc_rbr_req_accept), | |
852 | .meta1_rdmc_rbr_req_error (meta1_rdmc_rbr_req_error), | |
853 | .meta1_rdmc_rbr_resp_ready (meta1_rdmc_rbr_resp_ready), | |
854 | .meta1_rdmc_rbr_resp_cmd (meta1_rdmc_rbr_resp_cmd[7:0]), | |
855 | .meta1_rdmc_rbr_resp_cmd_status (meta1_rdmc_rbr_resp_cmd_status[3:0]), | |
856 | .meta1_rdmc_rbr_resp_dma_num (meta1_rdmc_rbr_resp_dma_num[4:0]), | |
857 | .meta1_rdmc_rbr_resp_client (meta1_rdmc_rbr_resp_client), | |
858 | .meta1_rdmc_rbr_resp_comp (meta1_rdmc_rbr_resp_comp), | |
859 | .meta1_rdmc_rbr_resp_trans_comp (meta1_rdmc_rbr_resp_trans_comp), | |
860 | .meta1_rdmc_rbr_resp_data_valid (meta1_rdmc_rbr_resp_data_valid), | |
861 | .meta1_rdmc_rbr_resp_data (meta1_rdmc_rbr_resp_data[127:0]), | |
862 | .meta1_rdmc_rbr_resp_byteenable (meta1_rdmc_rbr_resp_byteenable[15:0]), | |
863 | .meta1_rdmc_rbr_resp_data_status (meta1_rdmc_rbr_resp_data_status[3:0]), | |
864 | .rdmc_pio_rdata (rdmc_pio_rdata[63:0]), | |
865 | .rdmc_pio_ack (rdmc_pio_ack), | |
866 | .rdmc_pio_err (rdmc_pio_err), | |
867 | .rdmc_pio_port_int (rdmc_pio_port_int), | |
868 | .rdmc_pio_intr_ldf_a (rdmc_pio_intr_ldf_a[31:0]), | |
869 | .rdmc_pio_intr_ldf_b (rdmc_pio_intr_ldf_b[31:0]), | |
870 | .dmc_ipp_dat_req0 (dmc_ipp_dat_req0), | |
871 | .dmc_ipp_dat_req1 (dmc_ipp_dat_req1), | |
872 | .dmc_zcp_req0 (dmc_zcp_req0), | |
873 | .dmc_zcp_req1 (dmc_zcp_req1), | |
874 | .rdmc_meta0_wr_req (rdmc_meta0_wr_req), | |
875 | .rdmc_meta0_wr_req_cmd (rdmc_meta0_wr_req_cmd[7:0]), | |
876 | .rdmc_meta0_wr_req_address (rdmc_meta0_wr_req_address[63:0]), | |
877 | .rdmc_meta0_wr_req_length (rdmc_meta0_wr_req_length[13:0]), | |
878 | .rdmc_meta0_wr_req_port_num (rdmc_meta0_wr_req_port_num[1:0]), | |
879 | .rdmc_meta0_wr_req_dma_num (rdmc_meta0_wr_req_dma_num[4:0]), | |
880 | .rdmc_meta0_wr_req_func_num (rdmc_meta0_wr_req_func_num[1:0]), | |
881 | .rdmc_meta0_wr_data_valid (rdmc_meta0_wr_data_valid), | |
882 | .rdmc_meta0_wr_data (rdmc_meta0_wr_data[127:0]), | |
883 | .rdmc_meta0_wr_req_byteenable (rdmc_meta0_wr_req_byteenable[15:0]), | |
884 | .rdmc_meta0_wr_transfer_comp (rdmc_meta0_wr_transfer_comp), | |
885 | .rdmc_meta0_wr_status (rdmc_meta0_wr_status[3:0]), | |
886 | .rdmc_meta0_rcr_req (rdmc_meta0_rcr_req), | |
887 | .rdmc_meta0_rcr_req_cmd (rdmc_meta0_rcr_req_cmd[7:0]), | |
888 | .rdmc_meta0_rcr_req_address (rdmc_meta0_rcr_req_address[63:0]), | |
889 | .rdmc_meta0_rcr_req_length (rdmc_meta0_rcr_req_length[13:0]), | |
890 | .rdmc_meta0_rcr_req_port_num (rdmc_meta0_rcr_req_port_num[1:0]), | |
891 | .rdmc_meta0_rcr_req_dma_num (rdmc_meta0_rcr_req_dma_num[4:0]), | |
892 | .rdmc_meta0_rcr_req_func_num (rdmc_meta0_rcr_req_func_num[1:0]), | |
893 | .rdmc_meta0_rcr_data_valid (rdmc_meta0_rcr_data_valid), | |
894 | .rdmc_meta0_rcr_data (rdmc_meta0_rcr_data[127:0]), | |
895 | .rdmc_meta0_rcr_req_byteenable (rdmc_meta0_rcr_req_byteenable[15:0]), | |
896 | .rdmc_meta0_rcr_transfer_comp (rdmc_meta0_rcr_transfer_comp), | |
897 | .rdmc_meta0_rcr_status (rdmc_meta0_rcr_status[3:0]), | |
898 | .rdmc_meta1_rbr_req (rdmc_meta1_rbr_req), | |
899 | .rdmc_meta1_rbr_req_cmd (rdmc_meta1_rbr_req_cmd[7:0]), | |
900 | .rdmc_meta1_rbr_req_address (rdmc_meta1_rbr_req_address[63:0]), | |
901 | .rdmc_meta1_rbr_req_length (rdmc_meta1_rbr_req_length[13:0]), | |
902 | .rdmc_meta1_rbr_req_dma_num (rdmc_meta1_rbr_req_dma_num[4:0]), | |
903 | .rdmc_meta1_rbr_req_port_num (rdmc_meta1_rbr_req_port_num[1:0]), | |
904 | .rdmc_meta1_rbr_req_func_num (rdmc_meta1_rbr_req_func_num[1:0]), | |
905 | .rdmc_meta1_rbr_resp_accept (rdmc_meta1_rbr_resp_accept), | |
906 | .rdmc_meta0_rcr_ack_accept (rdmc_meta0_rcr_ack_accept), | |
907 | .rdmc_debug_port (rdmc_debug_port[31:0]), | |
908 | .tcu_aclk (aclk), | |
909 | .tcu_bclk (bclk), | |
910 | .tcu_scan_en (tcu_scan_en), | |
911 | .tcu_se_scancollar_in (tcu_se_scancollar_in), | |
912 | .tcu_se_scancollar_out (tcu_se_scancollar_out), | |
913 | .tcu_mbist_bisi_en (tcu_mbist_bisi_en), | |
914 | .tcu_array_wr_inhibit (array_wr_inhibit), | |
915 | .tcu_mbist_user_mode (tcu_mbist_user_mode), | |
916 | .l2clk_2x (io2xl2clk), | |
917 | .iol2clk (iol2clk), | |
918 | .tcu_rdp_rdmc_mbist_start (tcu_rdp_rdmc_mbist_start), | |
919 | .rdp_rdmc_tcu_mbist_fail (rdp_rdmc_tcu_mbist_fail), | |
920 | .rdp_rdmc_tcu_mbist_done (rdp_rdmc_tcu_mbist_done), | |
921 | .rdp_rdmc_mbist_scan_in (rdp_rdmc_mbist_scan_in), | |
922 | .rdp_rdmc_mbist_scan_out (rdp_rdmc_mbist_scan_out), | |
923 | .rdp_tcu_dmo_data_out (rdp_tcu_dmo_data_out[39:0]), | |
924 | .hdr_sram_rvalue_rdmc0 (hdr_sram_rvalue_rdmc0[6:0]), | |
925 | .hdr_sram_rid_rdmc0 (hdr_sram_rid_rdmc0[1:0]), | |
926 | .hdr_sram_wr_en_rdmc0 (hdr_sram_wr_en_rdmc0), | |
927 | .hdr_sram_red_clr_rdmc0 (hdr_sram_red_clr_rdmc0), | |
928 | .sram_hdr_read_data_rdmc0 (sram_hdr_read_data_rdmc0[6:0]), | |
929 | .hdr_sram_rvalue_rdmc1 (hdr_sram_rvalue_rdmc1[6:0]), | |
930 | .hdr_sram_rid_rdmc1 (hdr_sram_rid_rdmc1[1:0]), | |
931 | .hdr_sram_wr_en_rdmc1 (hdr_sram_wr_en_rdmc1), | |
932 | .hdr_sram_red_clr_rdmc1 (hdr_sram_red_clr_rdmc1), | |
933 | .sram_hdr_read_data_rdmc1 (sram_hdr_read_data_rdmc1[6:0]) | |
934 | ); | |
935 | ||
936 | rdp_clkgen_rdp_io rdp_clkgen_rdp_io ( | |
937 | .array_wr_inhibit (array_wr_inhibit), | |
938 | .tcu_atpg_mode (tcu_atpg_mode), | |
939 | .tcu_wr_inhibit (tcu_wr_inhibit), | |
940 | .l1clk (l1clk), | |
941 | .iol2clk (iol2clk), | |
942 | .aclk (aclk), | |
943 | .bclk (bclk), | |
944 | .scan_out (ioclk_scan_out), | |
945 | .pce_ov (pce_ov), | |
946 | .wmr_protect (), | |
947 | .wmr_ (), | |
948 | .por_ (niu_reset_l), | |
949 | .cmp_slow_sync_en (), | |
950 | .slow_cmp_sync_en (), | |
951 | .aclk_wmr (), | |
952 | .tcu_clk_stop (tcu_rdp_io_clk_stop), | |
953 | .tcu_pce_ov (tcu_pce_ov), | |
954 | .rst_wmr_protect (1'b0), | |
955 | .rst_wmr_ (1'b0), | |
956 | .rst_por_ (rst_por_), | |
957 | .cluster_arst_l (cluster_arst_l), | |
958 | .ccu_cmp_slow_sync_en (1'b0), | |
959 | .ccu_slow_cmp_sync_en (1'b0), | |
960 | .tcu_div_bypass (tcu_div_bypass), | |
961 | .ccu_div_ph (gl_rdp_io_out), | |
962 | .cluster_div_en (1'b1), | |
963 | .gclk (cmp_gclk_c0_rdp), | |
964 | .tcu_scan_en (tcu_scan_en), | |
965 | .scan_in (scan_in), | |
966 | .tcu_aclk (tcu_aclk), | |
967 | .tcu_bclk (tcu_bclk) | |
968 | ); | |
969 | ||
970 | rdp_clkgen_rdp_io2x rdp_clkgen_rdp_io2x ( | |
971 | .io2xl2clk (io2xl2clk), | |
972 | .aclk (x2aclk), | |
973 | .bclk (x2bclk), | |
974 | .scan_out (io2xclk_scan_out), | |
975 | .aclk_wmr (x2aclk_wmr), | |
976 | .pce_ov (x2pce_ov), | |
977 | .wmr_protect (x2wmr_protect), | |
978 | .wmr_ (x2wmr), | |
979 | .por_ (x2por), | |
980 | .cmp_slow_sync_en (x2_cmp_slow_sync_en), | |
981 | .slow_cmp_sync_en (x2_slow_cmp_sync_en), | |
982 | .array_wr_inhibit (x2_array_wr_inhibit), | |
983 | .tcu_atpg_mode (tcu_atpg_mode), | |
984 | .tcu_wr_inhibit (1'b0), | |
985 | .tcu_clk_stop (tcu_rdp_io_clk_stop), | |
986 | .tcu_pce_ov (pce_ov), | |
987 | .rst_wmr_protect (1'b1), | |
988 | .rst_wmr_ (1'b0), | |
989 | .rst_por_ (rst_por_), | |
990 | .cluster_arst_l (cluster_arst_l), | |
991 | .ccu_cmp_slow_sync_en (1'b0), | |
992 | .ccu_slow_cmp_sync_en (1'b0), | |
993 | .tcu_div_bypass (tcu_div_bypass), | |
994 | .ccu_div_ph (gl_rdp_io2x_out), | |
995 | .cluster_div_en (1'b1), | |
996 | .gclk (cmp_gclk_c0_rdp ), | |
997 | .tcu_scan_en (tcu_scan_en), | |
998 | .scan_in (ioclk_scan_out), | |
999 | .tcu_aclk (aclk), | |
1000 | .tcu_bclk (bclk) | |
1001 | ); | |
1002 | ||
1003 | rdp_n2_efuhdr4a_ctl rdmc_sram_header_0 ( | |
1004 | .efu_hdr_write_data (efu_niu_ram_data), | |
1005 | .efu_hdr_xfer_en (efu_niu_ram0_xfer_en), | |
1006 | .efu_hdr_clr (efu_niu_ram0_clr), | |
1007 | .hdr_efu_read_data (niu_efu_ram0_data), | |
1008 | .hdr_efu_xfer_en (niu_efu_ram0_xfer_en), | |
1009 | .hdr_sram_rvalue ({Unconnected_3[10:7],hdr_sram_rvalue_rdmc0[6:0]}), | |
1010 | .hdr_sram_rid ({Unconnected_1[10:2],hdr_sram_rid_rdmc0[1:0]}), | |
1011 | .hdr_sram_wr_en (hdr_sram_wr_en_rdmc0), | |
1012 | .hdr_sram_red_clr (hdr_sram_red_clr_rdmc0), | |
1013 | .sram_hdr_read_data ({4'b0,sram_hdr_read_data_rdmc0[6:0]}), | |
1014 | .l2clk (l1clk), | |
1015 | .reset_l (niu_reset_l), | |
1016 | .tcu_pce_ov (pce_ov), | |
1017 | .tcu_aclk (aclk), | |
1018 | .tcu_bclk (bclk), | |
1019 | .tcu_scan_en (tcu_scan_en), | |
1020 | .tcu_clk_stop (tcu_rdp_io_clk_stop), | |
1021 | .scan_in (1'b0), | |
1022 | .scan_out (not_used0) | |
1023 | ); | |
1024 | ||
1025 | rdp_n2_efuhdr4b_ctl rdmc_sram_header_1 ( | |
1026 | .efu_hdr_write_data (efu_niu_ram_data), | |
1027 | .efu_hdr_xfer_en (efu_niu_ram1_xfer_en), | |
1028 | .efu_hdr_clr (efu_niu_ram1_clr), | |
1029 | .hdr_efu_read_data (niu_efu_ram1_data), | |
1030 | .hdr_efu_xfer_en (niu_efu_ram1_xfer_en), | |
1031 | .hdr_sram_rvalue ({Unconnected_4[10:7],hdr_sram_rvalue_rdmc1[6:0]}), | |
1032 | .hdr_sram_rid ({Unconnected_2[10:2],hdr_sram_rid_rdmc1[1:0]}), | |
1033 | .hdr_sram_wr_en (hdr_sram_wr_en_rdmc1), | |
1034 | .hdr_sram_red_clr (hdr_sram_red_clr_rdmc1), | |
1035 | .sram_hdr_read_data ({4'b0,sram_hdr_read_data_rdmc1[6:0]}), | |
1036 | .l2clk (l1clk), | |
1037 | .reset_l (niu_reset_l), | |
1038 | .tcu_pce_ov (pce_ov), | |
1039 | .tcu_aclk (aclk), | |
1040 | .tcu_bclk (bclk), | |
1041 | .tcu_scan_en (tcu_scan_en), | |
1042 | .tcu_clk_stop (tcu_rdp_io_clk_stop), | |
1043 | .scan_in (1'b0), | |
1044 | .scan_out (scan_out) | |
1045 | ); | |
1046 | // VPERL: GENERATED_END | |
1047 | ||
1048 | endmodule |