projects / OpenSPARC-T2-DV / blame
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| 86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: gkt.v | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | module gkt ( | |
| 36 | tcu_scan_en, | |
| 37 | tcu_se_scancollar_out, | |
| 38 | lbist_run, | |
| 39 | l2clk, | |
| 40 | scan_in, | |
| 41 | tcu_pce_ov, | |
| 42 | core_isolate, | |
| 43 | spc_aclk, | |
| 44 | spc_bclk, | |
| 45 | scan_out, | |
| 46 | slow_cmp_sync_en, | |
| 47 | const_cpuid, | |
| 48 | lsu_gkt_pmen, | |
| 49 | ifu_l15_valid, | |
| 50 | mmu_l15_valid, | |
| 51 | lsu_l15_valid, | |
| 52 | spu_l15_valid, | |
| 53 | lsu_l15_lock, | |
| 54 | ifu_l15_addr, | |
| 55 | mmu_l15_addr, | |
| 56 | lsu_l15_addr, | |
| 57 | spu_l15_addr, | |
| 58 | ifu_l15_cpkt, | |
| 59 | mmu_l15_cpkt, | |
| 60 | lsu_l15_cpkt, | |
| 61 | spu_l15_cpkt, | |
| 62 | lsu_l15_data, | |
| 63 | spu_l15_data, | |
| 64 | ncu_spc_pm, | |
| 65 | ncu_spc_ba01, | |
| 66 | ncu_spc_ba23, | |
| 67 | ncu_spc_ba45, | |
| 68 | ncu_spc_ba67, | |
| 69 | ncu_spc_l2_idx_hash_en, | |
| 70 | cpx_spc_data_cx, | |
| 71 | pcx_spc_grant_px, | |
| 72 | l15_spc_cpkt, | |
| 73 | l15_spc_data1, | |
| 74 | cpx_spc_data_cx_rep0, | |
| 75 | l15_mmu_valid, | |
| 76 | l15_spu_valid, | |
| 77 | l15_ifu_grant, | |
| 78 | l15_mmu_grant, | |
| 79 | l15_lsu_grant, | |
| 80 | l15_spu_grant, | |
| 81 | gkt_ifu_legal, | |
| 82 | gkt_ifu_flip_parity, | |
| 83 | l15_pmu_xbar_optype, | |
| 84 | spc_pcx_req_pq, | |
| 85 | spc_pcx_atm_pq, | |
| 86 | spc_pcx_data_pa); | |
| 87 | wire ipc_v0_ifu_new; | |
| 88 | wire ipc_v0_ifu_shft; | |
| 89 | wire ipc_v0_ifu_hold; | |
| 90 | wire ipc_v1_ifu_new; | |
| 91 | wire ipc_v1_ifu_hold; | |
| 92 | wire ipc_v0_mmu_new; | |
| 93 | wire ipc_v0_mmu_shft; | |
| 94 | wire ipc_v0_mmu_hold; | |
| 95 | wire ipc_v1_mmu_new; | |
| 96 | wire ipc_v1_mmu_hold; | |
| 97 | wire ipc_v0_lsu_new; | |
| 98 | wire ipc_v0_lsu_shft; | |
| 99 | wire ipc_v0_lsu_hold; | |
| 100 | wire ipc_v1_lsu_new; | |
| 101 | wire ipc_v1_lsu_hold; | |
| 102 | wire ipc_v0_spu_new; | |
| 103 | wire ipc_v0_spu_shft; | |
| 104 | wire ipc_v0_spu_hold; | |
| 105 | wire ipc_v1_spu_new; | |
| 106 | wire ipc_v1_spu_hold; | |
| 107 | wire [3:0] ipc_dropreg_wen; | |
| 108 | wire ipc_pq_clken; | |
| 109 | wire ipc_scanin; | |
| 110 | wire ipc_scanout; | |
| 111 | wire [8:0] pcx_spc_grant_px_buf; | |
| 112 | wire [8:0] ipd_optype; | |
| 113 | wire ipd_scanin; | |
| 114 | wire ipd_scanout; | |
| 115 | wire ncu_pm_ff; | |
| 116 | wire ncu_ba01_ff; | |
| 117 | wire ncu_ba23_ff; | |
| 118 | wire ncu_ba45_ff; | |
| 119 | wire ncu_ba67_ff; | |
| 120 | wire ipc_sel_ndrop_ifu_l1; | |
| 121 | wire ipc_sel_ndrop_mmu_l1; | |
| 122 | wire ipc_sel_ndrop_lsu_l1; | |
| 123 | wire ipc_sel_ndrop_spu_l1; | |
| 124 | wire ipc_sel_drop_ifu_l1; | |
| 125 | wire ipc_sel_drop_mmu_l1; | |
| 126 | wire ipc_sel_drop_lsu_l1; | |
| 127 | wire ipc_sel_drop_spu_l1; | |
| 128 | wire [8:0] ipc_op_req_li; | |
| 129 | wire [8:0] ipc_atm_req_li; | |
| 130 | ||
| 131 | ||
| 132 | // globals | |
| 133 | input tcu_scan_en; | |
| 134 | input tcu_se_scancollar_out; | |
| 135 | input lbist_run; | |
| 136 | input l2clk; | |
| 137 | input scan_in; | |
| 138 | input tcu_pce_ov; // scan signals | |
| 139 | input core_isolate; | |
| 140 | ||
| 141 | input spc_aclk; | |
| 142 | input spc_bclk; | |
| 143 | output scan_out; | |
| 144 | input slow_cmp_sync_en; | |
| 145 | ||
| 146 | ||
| 147 | input [2:0] const_cpuid; | |
| 148 | ||
| 149 | ||
| 150 | input lsu_gkt_pmen; | |
| 151 | ||
| 152 | // inputs from core | |
| 153 | input ifu_l15_valid; | |
| 154 | input mmu_l15_valid; | |
| 155 | input lsu_l15_valid; | |
| 156 | input spu_l15_valid; | |
| 157 | ||
| 158 | ||
| 159 | input lsu_l15_lock; | |
| 160 | ||
| 161 | ||
| 162 | input [39:0] ifu_l15_addr; | |
| 163 | input [39:4] mmu_l15_addr; | |
| 164 | input [39:0] lsu_l15_addr; | |
| 165 | input [38:3] spu_l15_addr; | |
| 166 | ||
| 167 | ||
| 168 | input [7:0] ifu_l15_cpkt; | |
| 169 | input [4:0] mmu_l15_cpkt; | |
| 170 | input [25:0] lsu_l15_cpkt; | |
| 171 | input [12:0] spu_l15_cpkt; | |
| 172 | ||
| 173 | input [63:0] lsu_l15_data; | |
| 174 | input [63:0] spu_l15_data; | |
| 175 | ||
| 176 | // inputs from ncu | |
| 177 | input ncu_spc_pm; | |
| 178 | input ncu_spc_ba01; | |
| 179 | input ncu_spc_ba23; | |
| 180 | input ncu_spc_ba45; | |
| 181 | input ncu_spc_ba67; | |
| 182 | input ncu_spc_l2_idx_hash_en; | |
| 183 | ||
| 184 | // inputs from CPX crossbar | |
| 185 | input [145:0] cpx_spc_data_cx; | |
| 186 | ||
| 187 | // input from PCX crossbar | |
| 188 | input [8:0] pcx_spc_grant_px; | |
| 189 | ||
| 190 | ||
| 191 | // output to SPARC core | |
| 192 | output [17:0] l15_spc_cpkt; | |
| 193 | ||
| 194 | output [127:0] l15_spc_data1; | |
| 195 | output [145:0] cpx_spc_data_cx_rep0; | |
| 196 | ||
| 197 | ||
| 198 | ||
| 199 | output l15_mmu_valid; | |
| 200 | output l15_spu_valid; | |
| 201 | ||
| 202 | output l15_ifu_grant; | |
| 203 | output l15_mmu_grant; | |
| 204 | output l15_lsu_grant; | |
| 205 | output l15_spu_grant; | |
| 206 | ||
| 207 | // output legal opcode decode and flip parity | |
| 208 | ||
| 209 | output [3:0] gkt_ifu_legal; | |
| 210 | output [3:0] gkt_ifu_flip_parity; | |
| 211 | ||
| 212 | ||
| 213 | // output to pmu | |
| 214 | output [6:0] l15_pmu_xbar_optype; | |
| 215 | ||
| 216 | // output to PCX crossbar | |
| 217 | output [8:0] spc_pcx_req_pq; | |
| 218 | output [8:0] spc_pcx_atm_pq; | |
| 219 | output [129:0] spc_pcx_data_pa; | |
| 220 | ||
| 221 | ||
| 222 | // assertions | |
| 223 | // lock has to be asserted only on CAS1 packet | |
| 224 | /* 0in assert_together -leader (lsu_l15_valid & (lsu_l15_cpkt[24:20] == 5'b0010)) -follower lsu_l15_lock | |
| 225 | -message "l1g: CAS1 packet does not have lock asserted" */ | |
| 226 | /* 0in assert_together -leader (~lsu_l15_valid | (lsu_l15_cpkt[24:20] != 5'b0010)) -follower !lsu_l15_lock | |
| 227 | -message "l1g: Non CAS1 packet has lock asserted" */ | |
| 228 | /* 0in assert_follower -leader lsu_l15_lock -follower !lsu_l15_lock -max 1 | |
| 229 | -message "l1g: lsu_l15_lock asserted for more than one cycle"*/ | |
| 230 | ||
| 231 | //////////////////////////////////////////////////////////////////////////////// | |
| 232 | /* | |
| 233 | gkt_ipc_ctl AUTO_TEMPLATE | |
| 234 | ( | |
| 235 | .pcx_grant (pcx_spc_grant_px_buf[8:0]), | |
| 236 | .ifu_l15_addr39_37 (ifu_l15_addr[39:37]), | |
| 237 | .mmu_l15_addr39_37 (mmu_l15_addr[39:37]), | |
| 238 | .lsu_l15_addr39_37 (lsu_l15_addr[39:37]), | |
| 239 | .spu_l15_addr39_37 (spu_l15_addr[39:37]), | |
| 240 | .ifu_l15_addr8_6 (ifu_l15_addr[8:6]), | |
| 241 | .mmu_l15_addr8_6 (mmu_l15_addr[8:6]), | |
| 242 | .lsu_l15_addr8_6 (lsu_l15_addr[8:6]), | |
| 243 | .spu_l15_addr8_6 (spu_l15_addr[8:6]), | |
| 244 | ) | |
| 245 | */ | |
| 246 | ||
| 247 | gkt_ipc_ctl ipc (/*AUTOINST*/ | |
| 248 | // Outputs | |
| 249 | .ipc_v0_ifu_new (ipc_v0_ifu_new), | |
| 250 | .ipc_v0_ifu_shft (ipc_v0_ifu_shft), | |
| 251 | .ipc_v0_ifu_hold (ipc_v0_ifu_hold), | |
| 252 | .ipc_v1_ifu_new (ipc_v1_ifu_new), | |
| 253 | .ipc_v1_ifu_hold (ipc_v1_ifu_hold), | |
| 254 | .ipc_v0_mmu_new (ipc_v0_mmu_new), | |
| 255 | .ipc_v0_mmu_shft (ipc_v0_mmu_shft), | |
| 256 | .ipc_v0_mmu_hold (ipc_v0_mmu_hold), | |
| 257 | .ipc_v1_mmu_new (ipc_v1_mmu_new), | |
| 258 | .ipc_v1_mmu_hold (ipc_v1_mmu_hold), | |
| 259 | .ipc_v0_lsu_new (ipc_v0_lsu_new), | |
| 260 | .ipc_v0_lsu_shft (ipc_v0_lsu_shft), | |
| 261 | .ipc_v0_lsu_hold (ipc_v0_lsu_hold), | |
| 262 | .ipc_v1_lsu_new (ipc_v1_lsu_new), | |
| 263 | .ipc_v1_lsu_hold (ipc_v1_lsu_hold), | |
| 264 | .ipc_v0_spu_new (ipc_v0_spu_new), | |
| 265 | .ipc_v0_spu_shft (ipc_v0_spu_shft), | |
| 266 | .ipc_v0_spu_hold (ipc_v0_spu_hold), | |
| 267 | .ipc_v1_spu_new (ipc_v1_spu_new), | |
| 268 | .ipc_v1_spu_hold (ipc_v1_spu_hold), | |
| 269 | .l15_ifu_grant (l15_ifu_grant), | |
| 270 | .l15_mmu_grant (l15_mmu_grant), | |
| 271 | .l15_lsu_grant (l15_lsu_grant), | |
| 272 | .l15_spu_grant (l15_spu_grant), | |
| 273 | .ipc_dropreg_wen (ipc_dropreg_wen[3:0]), | |
| 274 | .ipc_pq_clken (ipc_pq_clken), | |
| 275 | // Inputs | |
| 276 | .scan_in(ipc_scanin), | |
| 277 | .scan_out(ipc_scanout), | |
| 278 | .l2clk (l2clk), | |
| 279 | .ifu_l15_valid (ifu_l15_valid), | |
| 280 | .mmu_l15_valid (mmu_l15_valid), | |
| 281 | .lsu_l15_valid (lsu_l15_valid), | |
| 282 | .spu_l15_valid (spu_l15_valid), | |
| 283 | .ifu_l15_addr39_37 (ifu_l15_addr[39:37]), // Templated | |
| 284 | .ifu_l15_addr8_6 (ifu_l15_addr[8:6]), // Templated | |
| 285 | .mmu_l15_addr39_37 (mmu_l15_addr[39:37]), // Templated | |
| 286 | .mmu_l15_addr8_6 (mmu_l15_addr[8:6]), // Templated | |
| 287 | .lsu_l15_addr39_37 (lsu_l15_addr[39:37]), // Templated | |
| 288 | .lsu_l15_addr8_6 (lsu_l15_addr[8:6]), // Templated | |
| 289 | .spu_l15_addr39_37 ({1'b0,spu_l15_addr[38:37]}), // Templated | |
| 290 | .spu_l15_addr8_6 (spu_l15_addr[8:6]), // Templated | |
| 291 | .lsu_l15_lock (lsu_l15_lock), | |
| 292 | .pcx_grant (pcx_spc_grant_px_buf[8:0]), // Templated | |
| 293 | .ipd_optype (ipd_optype[8:0]), | |
| 294 | .tcu_scan_en(tcu_scan_en), | |
| 295 | .lbist_run(lbist_run), | |
| 296 | .tcu_pce_ov(tcu_pce_ov), | |
| 297 | .spc_aclk(spc_aclk), | |
| 298 | .spc_bclk(spc_bclk), | |
| 299 | .lsu_gkt_pmen(lsu_gkt_pmen), | |
| 300 | .ncu_pm_ff(ncu_pm_ff), | |
| 301 | .ncu_ba01_ff(ncu_ba01_ff), | |
| 302 | .ncu_ba23_ff(ncu_ba23_ff), | |
| 303 | .ncu_ba45_ff(ncu_ba45_ff), | |
| 304 | .ncu_ba67_ff(ncu_ba67_ff), | |
| 305 | .ipc_sel_ndrop_ifu_l1(ipc_sel_ndrop_ifu_l1), | |
| 306 | .ipc_sel_ndrop_mmu_l1(ipc_sel_ndrop_mmu_l1), | |
| 307 | .ipc_sel_ndrop_lsu_l1(ipc_sel_ndrop_lsu_l1), | |
| 308 | .ipc_sel_ndrop_spu_l1(ipc_sel_ndrop_spu_l1), | |
| 309 | .ipc_sel_drop_ifu_l1(ipc_sel_drop_ifu_l1), | |
| 310 | .ipc_sel_drop_mmu_l1(ipc_sel_drop_mmu_l1), | |
| 311 | .ipc_sel_drop_lsu_l1(ipc_sel_drop_lsu_l1), | |
| 312 | .ipc_sel_drop_spu_l1(ipc_sel_drop_spu_l1), | |
| 313 | .ipc_op_req_li(ipc_op_req_li[8:0]), | |
| 314 | .ipc_atm_req_li(ipc_atm_req_li[8:0]), | |
| 315 | .l15_pmu_xbar_optype(l15_pmu_xbar_optype[6:0])); | |
| 316 | ||
| 317 | /* | |
| 318 | gkt_ipd_dp AUTO_TEMPLATE | |
| 319 | ( | |
| 320 | .l15_spc_cpkt (l15_spu_cpkt[17:0]), | |
| 321 | .l15_spc_valid (l15_spu_valid), | |
| 322 | ); | |
| 323 | */ | |
| 324 | ||
| 325 | gkt_ipd_dp ipd (/*AUTOINST*/ | |
| 326 | // Outputs | |
| 327 | .spc_pcx_req_pq (spc_pcx_req_pq[8:0]), | |
| 328 | .spc_pcx_atm_pq (spc_pcx_atm_pq[8:0]), | |
| 329 | .spc_pcx_data_pa (spc_pcx_data_pa[129:0]), | |
| 330 | .l15_spc_data1 (l15_spc_data1[127:0]), | |
| 331 | .l15_spc_cpkt (l15_spc_cpkt[17:0]), | |
| 332 | .l15_mmu_valid (l15_mmu_valid), | |
| 333 | .l15_spu_valid (l15_spu_valid), | |
| 334 | .ipd_optype (ipd_optype[8:0]), | |
| 335 | // Inputs | |
| 336 | .scan_in(ipd_scanin), | |
| 337 | .scan_out(ipd_scanout), | |
| 338 | .l2clk (l2clk), | |
| 339 | .ipc_v0_ifu_new (ipc_v0_ifu_new), | |
| 340 | .ipc_v0_ifu_shft (ipc_v0_ifu_shft), | |
| 341 | .ipc_v0_ifu_hold (ipc_v0_ifu_hold), | |
| 342 | .ipc_v1_ifu_new (ipc_v1_ifu_new), | |
| 343 | .ipc_v1_ifu_hold (ipc_v1_ifu_hold), | |
| 344 | .ipc_v0_mmu_new (ipc_v0_mmu_new), | |
| 345 | .ipc_v0_mmu_shft (ipc_v0_mmu_shft), | |
| 346 | .ipc_v0_mmu_hold (ipc_v0_mmu_hold), | |
| 347 | .ipc_v1_mmu_new (ipc_v1_mmu_new), | |
| 348 | .ipc_v1_mmu_hold (ipc_v1_mmu_hold), | |
| 349 | .ipc_v0_lsu_new (ipc_v0_lsu_new), | |
| 350 | .ipc_v0_lsu_shft (ipc_v0_lsu_shft), | |
| 351 | .ipc_v0_lsu_hold (ipc_v0_lsu_hold), | |
| 352 | .ipc_v1_lsu_new (ipc_v1_lsu_new), | |
| 353 | .ipc_v1_lsu_hold (ipc_v1_lsu_hold), | |
| 354 | .ipc_v0_spu_new (ipc_v0_spu_new), | |
| 355 | .ipc_v0_spu_shft (ipc_v0_spu_shft), | |
| 356 | .ipc_v0_spu_hold (ipc_v0_spu_hold), | |
| 357 | .ipc_v1_spu_new (ipc_v1_spu_new), | |
| 358 | .ipc_v1_spu_hold (ipc_v1_spu_hold), | |
| 359 | .ipc_pq_clken (ipc_pq_clken), | |
| 360 | .ipc_dropreg_wen (ipc_dropreg_wen[3:0]), | |
| 361 | .tcu_scan_en(tcu_scan_en), | |
| 362 | .tcu_se_scancollar_out(tcu_se_scancollar_out), | |
| 363 | .tcu_pce_ov(tcu_pce_ov), | |
| 364 | .core_isolate(core_isolate), | |
| 365 | .spc_aclk(spc_aclk), | |
| 366 | .spc_bclk(spc_bclk), | |
| 367 | .slow_cmp_sync_en(slow_cmp_sync_en), | |
| 368 | .const_cpuid(const_cpuid[2:0]), | |
| 369 | .ncu_spc_pm(ncu_spc_pm), | |
| 370 | .ncu_spc_ba01(ncu_spc_ba01), | |
| 371 | .ncu_spc_ba23(ncu_spc_ba23), | |
| 372 | .ncu_spc_ba45(ncu_spc_ba45), | |
| 373 | .ncu_spc_ba67(ncu_spc_ba67), | |
| 374 | .ncu_pm_ff(ncu_pm_ff), | |
| 375 | .ncu_ba01_ff(ncu_ba01_ff), | |
| 376 | .ncu_ba23_ff(ncu_ba23_ff), | |
| 377 | .ncu_ba45_ff(ncu_ba45_ff), | |
| 378 | .ncu_ba67_ff(ncu_ba67_ff), | |
| 379 | .cpx_spc_data_cx_rep0(cpx_spc_data_cx_rep0[145:0]), | |
| 380 | .pcx_spc_grant_px_buf(pcx_spc_grant_px_buf[8:0]), | |
| 381 | .cpx_spc_data_cx(cpx_spc_data_cx[145:0]), | |
| 382 | .pcx_spc_grant_px(pcx_spc_grant_px[8:0]), | |
| 383 | .ifu_l15_addr(ifu_l15_addr[39:0]), | |
| 384 | .mmu_l15_addr(mmu_l15_addr[39:4]), | |
| 385 | .lsu_l15_addr(lsu_l15_addr[39:0]), | |
| 386 | .spu_l15_addr(spu_l15_addr[38:3]), | |
| 387 | .ifu_l15_valid(ifu_l15_valid), | |
| 388 | .mmu_l15_valid(mmu_l15_valid), | |
| 389 | .spu_l15_valid(spu_l15_valid), | |
| 390 | .ifu_l15_cpkt(ifu_l15_cpkt[7:0]), | |
| 391 | .mmu_l15_cpkt(mmu_l15_cpkt[4:0]), | |
| 392 | .lsu_l15_cpkt(lsu_l15_cpkt[25:0]), | |
| 393 | .spu_l15_cpkt(spu_l15_cpkt[12:0]), | |
| 394 | .lsu_l15_data(lsu_l15_data[63:0]), | |
| 395 | .spu_l15_data(spu_l15_data[63:0]), | |
| 396 | .ipc_sel_ndrop_ifu_l1(ipc_sel_ndrop_ifu_l1), | |
| 397 | .ipc_sel_ndrop_mmu_l1(ipc_sel_ndrop_mmu_l1), | |
| 398 | .ipc_sel_ndrop_lsu_l1(ipc_sel_ndrop_lsu_l1), | |
| 399 | .ipc_sel_ndrop_spu_l1(ipc_sel_ndrop_spu_l1), | |
| 400 | .ipc_sel_drop_ifu_l1(ipc_sel_drop_ifu_l1), | |
| 401 | .ipc_sel_drop_mmu_l1(ipc_sel_drop_mmu_l1), | |
| 402 | .ipc_sel_drop_lsu_l1(ipc_sel_drop_lsu_l1), | |
| 403 | .ipc_sel_drop_spu_l1(ipc_sel_drop_spu_l1), | |
| 404 | .ipc_op_req_li(ipc_op_req_li[8:0]), | |
| 405 | .ipc_atm_req_li(ipc_atm_req_li[8:0]), | |
| 406 | .ncu_spc_l2_idx_hash_en(ncu_spc_l2_idx_hash_en)); | |
| 407 | ||
| 408 | ||
| 409 | gkt_leg_ctl leg0 ( | |
| 410 | .instr (l15_spc_data1[31:0]), | |
| 411 | .legal (gkt_ifu_legal[0]), | |
| 412 | .flip_parity (gkt_ifu_flip_parity[0]) | |
| 413 | ); | |
| 414 | ||
| 415 | gkt_leg_ctl leg1 ( | |
| 416 | .instr (l15_spc_data1[63:32]), | |
| 417 | .legal (gkt_ifu_legal[1]), | |
| 418 | .flip_parity (gkt_ifu_flip_parity[1]) | |
| 419 | ); | |
| 420 | ||
| 421 | gkt_leg_ctl leg2 ( | |
| 422 | .instr (l15_spc_data1[95:64]), | |
| 423 | .legal (gkt_ifu_legal[2]), | |
| 424 | .flip_parity (gkt_ifu_flip_parity[2]) | |
| 425 | ); | |
| 426 | ||
| 427 | gkt_leg_ctl leg3 ( | |
| 428 | .instr (l15_spc_data1[127:96]), | |
| 429 | .legal (gkt_ifu_legal[3]), | |
| 430 | .flip_parity (gkt_ifu_flip_parity[3]) | |
| 431 | ); | |
| 432 | ||
| 433 | ||
| 434 | // fixscan start: | |
| 435 | assign ipc_scanin = scan_in ; | |
| 436 | assign ipd_scanin = ipc_scanout ; | |
| 437 | assign scan_out = ipd_scanout ; | |
| 438 | // fixscan end: | |
| 439 | endmodule |