[OpenSPARC-T2-DV] / design / sys / iop / spc / ifu / rtl / ifu_cmu_cmt_ctl.v

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: ifu_cmu_cmt_ctl.v
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
// otherwise unspecified. 
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
// CA 95054 USA or visit www.sun.com if you need additional information or 
// have any questions. 
// 
// ========== Copyright Header End ============================================
module ifu_cmu_cmt_ctl (
  scan_in, 
  tcu_pce_ov, 
  spc_aclk, 
  spc_bclk, 
  tcu_scan_en, 
  l2clk, 
  ftu_cmiss, 
  ftu_redirect, 
  mct_fill_complete, 
  ftu_inv_req, 
  lsc_l15_valid, 
  cmu_data_ready, 
  cmu_has_dup_miss, 
  mct_rst_dupmiss, 
  mdp_mbhit_q, 
  mct_ignore_cmiss, 
  csm_valid_req, 
  cmu_null_st, 
  cmu_dupmiss_st, 
  cmu_req_st, 
  cmu_canleave_st, 
  scan_out) ;
wire pce_ov;
wire stop;
wire se;
wire siclk;
wire soclk;
wire l1clk;
wire cmu_mbhit_c;
wire csm0_scanin;
wire csm0_scanout;
wire csm1_scanin;
wire csm1_scanout;
wire csm2_scanin;
wire csm2_scanout;
wire csm3_scanin;
wire csm3_scanout;
wire csm4_scanin;
wire csm4_scanout;
wire csm5_scanin;
wire csm5_scanout;
wire csm6_scanin;
wire csm6_scanout;
wire csm7_scanin;
wire csm7_scanout;
wire spares_scanin;
wire spares_scanout;


input scan_in;
input tcu_pce_ov;		// scan signals
input spc_aclk;
input spc_bclk;
input tcu_scan_en ;
input l2clk;

input [7:0] ftu_cmiss;
input [7:0] ftu_redirect;
input [7:0] mct_fill_complete;
input [7:0] ftu_inv_req;

input [7:0] lsc_l15_valid;

input [7:0] cmu_data_ready;
input [7:0] cmu_has_dup_miss;

input [7:0] mct_rst_dupmiss;
input [7:0] mdp_mbhit_q;
input       mct_ignore_cmiss;

output [7:0] csm_valid_req;
//output [7:0] cmu_cmiss_is_sent;
output [7:0] cmu_null_st;
output [7:0] cmu_dupmiss_st;
output [7:0] cmu_req_st;
output [7:0] cmu_canleave_st;
   
output scan_out;

// scan renames
assign pce_ov = tcu_pce_ov;
assign stop = 1'b0;
assign se = tcu_scan_en ;
assign siclk = spc_aclk;
assign soclk = spc_bclk;
// end scan

///////////////////////////////////////////////////
// clock header
///////////////////////////////////////////////////
ifu_cmu_cmt_ctl_l1clkhdr_ctl_macro clkgen (
 .l2clk(l2clk),
 .l1en (1'b1 ),
 .l1clk(l1clk),
  .pce_ov(pce_ov),
  .stop(stop),
  .se(se)
);

assign cmu_mbhit_c = |(mdp_mbhit_q[7:0]);

/*
// ifu_cmu_csm_ctl AUTO_TEMPLATE
 (
.ftu_inv_req(ftu_inv_req[@]),                      
.ftu_cmiss(ftu_cmiss[@]),
.lsc_l15_valid(lsc_l15_valid[@]),
.mct_fill_complete(mct_fill_complete[@]),
.cmu_data_ready(cmu_data_ready[@]),
.cmu_has_dup_miss(cmu_has_dup_miss[@]),
.cmu_mbhit_c(cmu_mbhit_c),
.ftu_redirect(ftu_redirect[@]),
.mct_rst_dupmiss(mct_rst_dupmiss[@]),
.mdp_mbhit_q(mdp_mbhit_q[@]),
.csm_valid_req(csm_valid_req[@]),
.cmu_null_st(cmu_null_st[@]),
.cmu_req_st(cmu_req_st[@]),
.cmu_canleave_st(cmu_canleave_st[@]),
.cmu_dupmiss_st(cmu_dupmiss_st[@]),
 );
 */

ifu_cmu_csm_ctl csm0 (
                      /*AUTOINST*/
                      // Outputs
                      .csm_valid_req      (csm_valid_req[0]),        // Templated
                      .cmu_null_st(cmu_null_st[0]),  // Templated
                      .cmu_req_st(cmu_req_st[0]),  // Templated
                      .cmu_canleave_st(cmu_canleave_st[0]),  // Templated
                      .cmu_dupmiss_st(cmu_dupmiss_st[0]),  // Templated
                      // Inputs
                      .scan_in(csm0_scanin),
                      .scan_out(csm0_scanout),
                      .l1clk            (l1clk),
                      .spc_aclk     (spc_aclk),
                      .spc_bclk     (spc_bclk),
                      .ftu_cmiss        (ftu_cmiss[0]),          // Templated
                      .ftu_inv_req      (ftu_inv_req[0]),        // Templated
                      .lsc_l15_valid      (lsc_l15_valid[0]),        // Templated
                      .mct_fill_complete(mct_fill_complete[0]),  // Templated
                      .cmu_data_ready   (cmu_data_ready[0]),     // Templated
                      .cmu_has_dup_miss (cmu_has_dup_miss[0]),   // Templated
                      .cmu_mbhit_c      (cmu_mbhit_c),           // Templated
                      .ftu_redirect     (ftu_redirect[0]),       // Templated
                      .mct_rst_dupmiss  (mct_rst_dupmiss[0]),    // Templated
                      .mdp_mbhit_q      (mdp_mbhit_q[0]),        // Templated
                      .mct_ignore_cmiss (mct_ignore_cmiss));

ifu_cmu_csm_ctl csm1 (
                      /*AUTOINST*/
                      // Outputs
                      .csm_valid_req      (csm_valid_req[1]),        // Templated
                      .cmu_null_st(cmu_null_st[1]),  // Templated
                      .cmu_req_st(cmu_req_st[1]),  // Templated
                      .cmu_canleave_st(cmu_canleave_st[1]),  // Templated
                      .cmu_dupmiss_st(cmu_dupmiss_st[1]),  // Templated
                      // Inputs
                      .scan_in(csm1_scanin),
                      .scan_out(csm1_scanout),
                      .l1clk            (l1clk),
                      .spc_aclk     (spc_aclk),
                      .spc_bclk     (spc_bclk),
                      .ftu_cmiss        (ftu_cmiss[1]),          // Templated
                      .ftu_inv_req      (ftu_inv_req[1]),        // Templated
                      .lsc_l15_valid      (lsc_l15_valid[1]),        // Templated
                      .mct_fill_complete(mct_fill_complete[1]),  // Templated
                      .cmu_data_ready   (cmu_data_ready[1]),     // Templated
                      .cmu_has_dup_miss (cmu_has_dup_miss[1]),   // Templated
                      .cmu_mbhit_c      (cmu_mbhit_c),           // Templated
                      .ftu_redirect     (ftu_redirect[1]),       // Templated
                      .mct_rst_dupmiss  (mct_rst_dupmiss[1]),    // Templated
                      .mdp_mbhit_q      (mdp_mbhit_q[1]),        // Templated
                      .mct_ignore_cmiss (mct_ignore_cmiss));

ifu_cmu_csm_ctl csm2 (
                      /*AUTOINST*/
                      // Outputs
                      .csm_valid_req      (csm_valid_req[2]),        // Templated
                      .cmu_null_st(cmu_null_st[2]),  // Templated
                      .cmu_req_st(cmu_req_st[2]),  // Templated
                      .cmu_canleave_st(cmu_canleave_st[2]),  // Templated
                      .cmu_dupmiss_st(cmu_dupmiss_st[2]),  // Templated
                      // Inputs
                      .scan_in(csm2_scanin),
                      .scan_out(csm2_scanout),
                      .l1clk            (l1clk),
                      .spc_aclk     (spc_aclk),
                      .spc_bclk     (spc_bclk),
                      .ftu_cmiss        (ftu_cmiss[2]),          // Templated
                      .ftu_inv_req      (ftu_inv_req[2]),        // Templated
                      .lsc_l15_valid      (lsc_l15_valid[2]),        // Templated
                      .mct_fill_complete(mct_fill_complete[2]),  // Templated
                      .cmu_data_ready   (cmu_data_ready[2]),     // Templated
                      .cmu_has_dup_miss (cmu_has_dup_miss[2]),   // Templated
                      .cmu_mbhit_c      (cmu_mbhit_c),           // Templated
                      .ftu_redirect     (ftu_redirect[2]),       // Templated
                      .mct_rst_dupmiss  (mct_rst_dupmiss[2]),    // Templated
                      .mdp_mbhit_q      (mdp_mbhit_q[2]),        // Templated
                      .mct_ignore_cmiss (mct_ignore_cmiss));

ifu_cmu_csm_ctl csm3 (
                      /*AUTOINST*/
                      // Outputs
                      .csm_valid_req      (csm_valid_req[3]),        // Templated
                      .cmu_null_st(cmu_null_st[3]),  // Templated
                      .cmu_req_st(cmu_req_st[3]),  // Templated
                      .cmu_canleave_st(cmu_canleave_st[3]),  // Templated
                      .cmu_dupmiss_st(cmu_dupmiss_st[3]),  // Templated
                      // Inputs
                      .scan_in(csm3_scanin),
                      .scan_out(csm3_scanout),
                      .l1clk            (l1clk),
                      .spc_aclk     (spc_aclk),
                      .spc_bclk     (spc_bclk),
                      .ftu_cmiss        (ftu_cmiss[3]),          // Templated
                      .ftu_inv_req      (ftu_inv_req[3]),        // Templated
                      .lsc_l15_valid      (lsc_l15_valid[3]),        // Templated
                      .mct_fill_complete(mct_fill_complete[3]),  // Templated
                      .cmu_data_ready   (cmu_data_ready[3]),     // Templated
                      .cmu_has_dup_miss (cmu_has_dup_miss[3]),   // Templated
                      .cmu_mbhit_c      (cmu_mbhit_c),           // Templated
                      .ftu_redirect     (ftu_redirect[3]),       // Templated
                      .mct_rst_dupmiss  (mct_rst_dupmiss[3]),    // Templated
                      .mdp_mbhit_q      (mdp_mbhit_q[3]),        // Templated
                      .mct_ignore_cmiss (mct_ignore_cmiss));

ifu_cmu_csm_ctl csm4 (
                      /*AUTOINST*/
                      // Outputs
                      .csm_valid_req      (csm_valid_req[4]),        // Templated
                      .cmu_null_st(cmu_null_st[4]),  // Templated
                      .cmu_req_st(cmu_req_st[4]),  // Templated
                      .cmu_canleave_st(cmu_canleave_st[4]),  // Templated
                      .cmu_dupmiss_st(cmu_dupmiss_st[4]),  // Templated
                      // Inputs
                      .scan_in(csm4_scanin),
                      .scan_out(csm4_scanout),
                      .l1clk            (l1clk),
                      .spc_aclk     (spc_aclk),
                      .spc_bclk     (spc_bclk),
                      .ftu_cmiss        (ftu_cmiss[4]),          // Templated
                      .ftu_inv_req      (ftu_inv_req[4]),        // Templated
                      .lsc_l15_valid      (lsc_l15_valid[4]),        // Templated
                      .mct_fill_complete(mct_fill_complete[4]),  // Templated
                      .cmu_data_ready   (cmu_data_ready[4]),     // Templated
                      .cmu_has_dup_miss (cmu_has_dup_miss[4]),   // Templated
                      .cmu_mbhit_c      (cmu_mbhit_c),           // Templated
                      .ftu_redirect     (ftu_redirect[4]),       // Templated
                      .mct_rst_dupmiss  (mct_rst_dupmiss[4]),    // Templated
                      .mdp_mbhit_q      (mdp_mbhit_q[4]),        // Templated
                      .mct_ignore_cmiss (mct_ignore_cmiss));

ifu_cmu_csm_ctl csm5 (
                      /*AUTOINST*/
                      // Outputs
                      .csm_valid_req      (csm_valid_req[5]),        // Templated
                      .cmu_null_st(cmu_null_st[5]),  // Templated
                      .cmu_req_st(cmu_req_st[5]),  // Templated
                      .cmu_canleave_st(cmu_canleave_st[5]),  // Templated
                      .cmu_dupmiss_st(cmu_dupmiss_st[5]),  // Templated
                      // Inputs
                      .scan_in(csm5_scanin),
                      .scan_out(csm5_scanout),
                      .l1clk            (l1clk),
                      .spc_aclk     (spc_aclk),
                      .spc_bclk     (spc_bclk),
                      .ftu_cmiss        (ftu_cmiss[5]),          // Templated
                      .ftu_inv_req      (ftu_inv_req[5]),        // Templated
                      .lsc_l15_valid      (lsc_l15_valid[5]),        // Templated
                      .mct_fill_complete(mct_fill_complete[5]),  // Templated
                      .cmu_data_ready   (cmu_data_ready[5]),     // Templated
                      .cmu_has_dup_miss (cmu_has_dup_miss[5]),   // Templated
                      .cmu_mbhit_c      (cmu_mbhit_c),           // Templated
                      .ftu_redirect     (ftu_redirect[5]),       // Templated
                      .mct_rst_dupmiss  (mct_rst_dupmiss[5]),    // Templated
                      .mdp_mbhit_q      (mdp_mbhit_q[5]),        // Templated
                      .mct_ignore_cmiss (mct_ignore_cmiss));

ifu_cmu_csm_ctl csm6 (
                      /*AUTOINST*/
                      // Outputs
                      .csm_valid_req      (csm_valid_req[6]),        // Templated
                      .cmu_null_st(cmu_null_st[6]),  // Templated
                      .cmu_req_st(cmu_req_st[6]),  // Templated
                      .cmu_canleave_st(cmu_canleave_st[6]),  // Templated
                      .cmu_dupmiss_st(cmu_dupmiss_st[6]),  // Templated
                      // Inputs
                      .scan_in(csm6_scanin),
                      .scan_out(csm6_scanout),
                      .l1clk            (l1clk),
                      .spc_aclk     (spc_aclk),
                      .spc_bclk     (spc_bclk),
                      .ftu_cmiss        (ftu_cmiss[6]),          // Templated
                      .ftu_inv_req      (ftu_inv_req[6]),        // Templated
                      .lsc_l15_valid      (lsc_l15_valid[6]),        // Templated
                      .mct_fill_complete(mct_fill_complete[6]),  // Templated
                      .cmu_data_ready   (cmu_data_ready[6]),     // Templated
                      .cmu_has_dup_miss (cmu_has_dup_miss[6]),   // Templated
                      .cmu_mbhit_c      (cmu_mbhit_c),           // Templated
                      .ftu_redirect     (ftu_redirect[6]),       // Templated
                      .mct_rst_dupmiss  (mct_rst_dupmiss[6]),    // Templated
                      .mdp_mbhit_q      (mdp_mbhit_q[6]),        // Templated
                      .mct_ignore_cmiss (mct_ignore_cmiss));

ifu_cmu_csm_ctl csm7 (
                      /*AUTOINST*/
                      // Outputs
                      .csm_valid_req      (csm_valid_req[7]),        // Templated
                      .cmu_null_st(cmu_null_st[7]),  // Templated
                      .cmu_req_st(cmu_req_st[7]),  // Templated
                      .cmu_canleave_st(cmu_canleave_st[7]),  // Templated
                      .cmu_dupmiss_st(cmu_dupmiss_st[7]),  // Templated
                      // Inputs
                      .scan_in(csm7_scanin),
                      .scan_out(csm7_scanout),
                      .l1clk            (l1clk),
                      .spc_aclk     (spc_aclk),
                      .spc_bclk     (spc_bclk),
                      .ftu_cmiss        (ftu_cmiss[7]),          // Templated
                      .ftu_inv_req      (ftu_inv_req[7]),        // Templated
                      .lsc_l15_valid      (lsc_l15_valid[7]),        // Templated
                      .mct_fill_complete(mct_fill_complete[7]),  // Templated
                      .cmu_data_ready   (cmu_data_ready[7]),     // Templated
                      .cmu_has_dup_miss (cmu_has_dup_miss[7]),   // Templated
                      .cmu_mbhit_c      (cmu_mbhit_c),           // Templated
                      .ftu_redirect     (ftu_redirect[7]),       // Templated
                      .mct_rst_dupmiss  (mct_rst_dupmiss[7]),    // Templated
                      .mdp_mbhit_q      (mdp_mbhit_q[7]),        // Templated
                      .mct_ignore_cmiss (mct_ignore_cmiss));


////////////////////////////////////////////////////////
// SPARE CELLS
////////////////////////////////////////////////////////
ifu_cmu_cmt_ctl_spare_ctl_macro__num_1 spares  (
	.scan_in(spares_scanin),
	.scan_out(spares_scanout),
	.l1clk	(l1clk),
  .siclk(siclk),
  .soclk(soclk)
);
////////////////////////////////////////////////////////

supply0 vss;
supply1 vdd;
// fixscan start:
assign csm0_scanin               = scan_in                  ;
assign csm1_scanin               = csm0_scanout             ;
assign csm2_scanin               = csm1_scanout             ;
assign csm3_scanin               = csm2_scanout             ;
assign csm4_scanin               = csm3_scanout             ;
assign csm5_scanin               = csm4_scanout             ;
assign csm6_scanin               = csm5_scanout             ;
assign csm7_scanin               = csm6_scanout             ;
assign spares_scanin             = csm7_scanout             ;
assign scan_out                  = spares_scanout           ;

// fixscan end:
endmodule

// Local Variables:
// verilog-library-directories:("." "v")
// End:


// any PARAMS parms go into naming of macro

module ifu_cmu_cmt_ctl_l1clkhdr_ctl_macro (
  l2clk, 
  l1en, 
  pce_ov, 
  stop, 
  se, 
  l1clk);


  input l2clk;
  input l1en;
  input pce_ov;
  input stop;
  input se;
  output l1clk;


cl_sc1_l1hdr_8x c_0 (


   .l2clk(l2clk),
   .pce(l1en),
   .l1clk(l1clk),
  .se(se),
  .pce_ov(pce_ov),
  .stop(stop)
);


endmodule


// any PARAMS parms go into naming of macro

module ifu_cmu_cmt_ctl_msff_ctl_macro__width_1 (
  din, 
  l1clk, 
  scan_in, 
  siclk, 
  soclk, 
  dout, 
  scan_out);
wire [0:0] fdin;

  input [0:0] din;
  input l1clk;
  input scan_in;


  input siclk;
  input soclk;

  output [0:0] dout;
  output scan_out;
assign fdin[0:0] = din[0:0];


dff #(1)  d0_0 (
.l1clk(l1clk),
.siclk(siclk),
.soclk(soclk),
.d(fdin[0:0]),
.si(scan_in),
.so(scan_out),
.q(dout[0:0])
);


endmodule


//  Description:        Spare gate macro for control blocks
//
//  Param num controls the number of times the macro is added
//  flops=0 can be used to use only combination spare logic


module ifu_cmu_cmt_ctl_spare_ctl_macro__num_1 (
  l1clk, 
  scan_in, 
  siclk, 
  soclk, 
  scan_out);
wire si_0;
wire so_0;
wire spare0_flop_unused;
wire spare0_buf_32x_unused;
wire spare0_nand3_8x_unused;
wire spare0_inv_8x_unused;
wire spare0_aoi22_4x_unused;
wire spare0_buf_8x_unused;
wire spare0_oai22_4x_unused;
wire spare0_inv_16x_unused;
wire spare0_nand2_16x_unused;
wire spare0_nor3_4x_unused;
wire spare0_nand2_8x_unused;
wire spare0_buf_16x_unused;
wire spare0_nor2_16x_unused;
wire spare0_inv_32x_unused;


input		l1clk;
input		scan_in;
input		siclk;
input		soclk;
output		scan_out;

cl_sc1_msff_8x spare0_flop (.l1clk(l1clk),
                               .siclk(siclk),
                               .soclk(soclk),
                               .si(si_0),
                               .so(so_0),
                               .d(1'b0),
                               .q(spare0_flop_unused));
assign si_0 = scan_in;

cl_u1_buf_32x   spare0_buf_32x (.in(1'b1),
                                   .out(spare0_buf_32x_unused));
cl_u1_nand3_8x spare0_nand3_8x (.in0(1'b1),
                                   .in1(1'b1),
                                   .in2(1'b1),
                                   .out(spare0_nand3_8x_unused));
cl_u1_inv_8x    spare0_inv_8x (.in(1'b1),
                                  .out(spare0_inv_8x_unused));
cl_u1_aoi22_4x spare0_aoi22_4x (.in00(1'b1),
                                   .in01(1'b1),
                                   .in10(1'b1),
                                   .in11(1'b1),
                                   .out(spare0_aoi22_4x_unused));
cl_u1_buf_8x    spare0_buf_8x (.in(1'b1),
                                  .out(spare0_buf_8x_unused));
cl_u1_oai22_4x spare0_oai22_4x (.in00(1'b1),
                                   .in01(1'b1),
                                   .in10(1'b1),
                                   .in11(1'b1),
                                   .out(spare0_oai22_4x_unused));
cl_u1_inv_16x   spare0_inv_16x (.in(1'b1),
                                   .out(spare0_inv_16x_unused));
cl_u1_nand2_16x spare0_nand2_16x (.in0(1'b1),
                                     .in1(1'b1),
                                     .out(spare0_nand2_16x_unused));
cl_u1_nor3_4x spare0_nor3_4x (.in0(1'b0),
                                 .in1(1'b0),
                                 .in2(1'b0),
                                 .out(spare0_nor3_4x_unused));
cl_u1_nand2_8x spare0_nand2_8x (.in0(1'b1),
                                   .in1(1'b1),
                                   .out(spare0_nand2_8x_unused));
cl_u1_buf_16x   spare0_buf_16x (.in(1'b1),
                                   .out(spare0_buf_16x_unused));
cl_u1_nor2_16x spare0_nor2_16x (.in0(1'b0),
                                   .in1(1'b0),
                                   .out(spare0_nor2_16x_unused));
cl_u1_inv_32x   spare0_inv_32x (.in(1'b1),
                                   .out(spare0_inv_32x_unused));
assign scan_out = so_0;


endmodule
Commit	Line	Data
86530b38 AT	1	// ========== Copyright Header Begin ==========================================
	2	//
	3	// OpenSPARC T2 Processor File: ifu_cmu_cmt_ctl.v
	4	// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	5	// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	6	//
	7	// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	8	//
	9	// This program is free software; you can redistribute it and/or modify
	10	// it under the terms of the GNU General Public License as published by
	11	// the Free Software Foundation; version 2 of the License.
	12	//
	13	// This program is distributed in the hope that it will be useful,
	14	// but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	// GNU General Public License for more details.
	17	//
	18	// You should have received a copy of the GNU General Public License
	19	// along with this program; if not, write to the Free Software
	20	// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	//
	22	// For the avoidance of doubt, and except that if any non-GPL license
	23	// choice is available it will apply instead, Sun elects to use only
	24	// the General Public License version 2 (GPLv2) at this time for any
	25	// software where a choice of GPL license versions is made
	26	// available with the language indicating that GPLv2 or any later version
	27	// may be used, or where a choice of which version of the GPL is applied is
	28	// otherwise unspecified.
	29	//
	30	// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	31	// CA 95054 USA or visit www.sun.com if you need additional information or
	32	// have any questions.
	33	//
	34	// ========== Copyright Header End ============================================
	35	module ifu_cmu_cmt_ctl (
	36	scan_in,
	37	tcu_pce_ov,
	38	spc_aclk,
	39	spc_bclk,
	40	tcu_scan_en,
	41	l2clk,
	42	ftu_cmiss,
	43	ftu_redirect,
	44	mct_fill_complete,
	45	ftu_inv_req,
	46	lsc_l15_valid,
	47	cmu_data_ready,
	48	cmu_has_dup_miss,
	49	mct_rst_dupmiss,
	50	mdp_mbhit_q,
	51	mct_ignore_cmiss,
	52	csm_valid_req,
	53	cmu_null_st,
	54	cmu_dupmiss_st,
	55	cmu_req_st,
	56	cmu_canleave_st,
	57	scan_out) ;
	58	wire pce_ov;
	59	wire stop;
	60	wire se;
	61	wire siclk;
	62	wire soclk;
	63	wire l1clk;
	64	wire cmu_mbhit_c;
65	wire csm0_scanin;
66	wire csm0_scanout;
67	wire csm1_scanin;
68	wire csm1_scanout;
69	wire csm2_scanin;
70	wire csm2_scanout;
71	wire csm3_scanin;
72	wire csm3_scanout;
73	wire csm4_scanin;
74	wire csm4_scanout;
75	wire csm5_scanin;
76	wire csm5_scanout;
77	wire csm6_scanin;
78	wire csm6_scanout;
79	wire csm7_scanin;
80	wire csm7_scanout;
81	wire spares_scanin;
82	wire spares_scanout;
83
84
85	input scan_in;
86	input tcu_pce_ov; // scan signals
87	input spc_aclk;
88	input spc_bclk;
89	input tcu_scan_en ;
90	input l2clk;
91
92	input [7:0] ftu_cmiss;
93	input [7:0] ftu_redirect;
94	input [7:0] mct_fill_complete;
95	input [7:0] ftu_inv_req;
96
97	input [7:0] lsc_l15_valid;
98
99	input [7:0] cmu_data_ready;
100	input [7:0] cmu_has_dup_miss;
101
102	input [7:0] mct_rst_dupmiss;
103	input [7:0] mdp_mbhit_q;
104	input mct_ignore_cmiss;
105
106	output [7:0] csm_valid_req;
107	//output [7:0] cmu_cmiss_is_sent;
108	output [7:0] cmu_null_st;
109	output [7:0] cmu_dupmiss_st;
110	output [7:0] cmu_req_st;
111	output [7:0] cmu_canleave_st;
112
113	output scan_out;
114
115	// scan renames
116	assign pce_ov = tcu_pce_ov;
117	assign stop = 1'b0;
118	assign se = tcu_scan_en ;
119	assign siclk = spc_aclk;
120	assign soclk = spc_bclk;
121	// end scan
122
123	///////////////////////////////////////////////////
124	// clock header
125	///////////////////////////////////////////////////
126	ifu_cmu_cmt_ctl_l1clkhdr_ctl_macro clkgen (
127	.l2clk(l2clk),
128	.l1en (1'b1 ),
129	.l1clk(l1clk),
130	.pce_ov(pce_ov),
131	.stop(stop),
132	.se(se)
133	);
134
135	assign cmu_mbhit_c = \|(mdp_mbhit_q[7:0]);
136
137	/*
138	// ifu_cmu_csm_ctl AUTO_TEMPLATE
139	(
140	.ftu_inv_req(ftu_inv_req[@]),
141	.ftu_cmiss(ftu_cmiss[@]),
142	.lsc_l15_valid(lsc_l15_valid[@]),
143	.mct_fill_complete(mct_fill_complete[@]),
144	.cmu_data_ready(cmu_data_ready[@]),
145	.cmu_has_dup_miss(cmu_has_dup_miss[@]),
146	.cmu_mbhit_c(cmu_mbhit_c),
147	.ftu_redirect(ftu_redirect[@]),
148	.mct_rst_dupmiss(mct_rst_dupmiss[@]),
149	.mdp_mbhit_q(mdp_mbhit_q[@]),
150	.csm_valid_req(csm_valid_req[@]),
151	.cmu_null_st(cmu_null_st[@]),
152	.cmu_req_st(cmu_req_st[@]),
153	.cmu_canleave_st(cmu_canleave_st[@]),
154	.cmu_dupmiss_st(cmu_dupmiss_st[@]),
155	);
156	*/
157
158	ifu_cmu_csm_ctl csm0 (
159	/AUTOINST/
160	// Outputs
161	.csm_valid_req (csm_valid_req[0]), // Templated
162	.cmu_null_st(cmu_null_st[0]), // Templated
163	.cmu_req_st(cmu_req_st[0]), // Templated
164	.cmu_canleave_st(cmu_canleave_st[0]), // Templated
165	.cmu_dupmiss_st(cmu_dupmiss_st[0]), // Templated
166	// Inputs
167	.scan_in(csm0_scanin),
168	.scan_out(csm0_scanout),
169	.l1clk (l1clk),
170	.spc_aclk (spc_aclk),
171	.spc_bclk (spc_bclk),
172	.ftu_cmiss (ftu_cmiss[0]), // Templated
173	.ftu_inv_req (ftu_inv_req[0]), // Templated
174	.lsc_l15_valid (lsc_l15_valid[0]), // Templated
175	.mct_fill_complete(mct_fill_complete[0]), // Templated
176	.cmu_data_ready (cmu_data_ready[0]), // Templated
177	.cmu_has_dup_miss (cmu_has_dup_miss[0]), // Templated
178	.cmu_mbhit_c (cmu_mbhit_c), // Templated
179	.ftu_redirect (ftu_redirect[0]), // Templated
180	.mct_rst_dupmiss (mct_rst_dupmiss[0]), // Templated
181	.mdp_mbhit_q (mdp_mbhit_q[0]), // Templated
182	.mct_ignore_cmiss (mct_ignore_cmiss));
183
184	ifu_cmu_csm_ctl csm1 (
185	/AUTOINST/
186	// Outputs
187	.csm_valid_req (csm_valid_req[1]), // Templated
188	.cmu_null_st(cmu_null_st[1]), // Templated
189	.cmu_req_st(cmu_req_st[1]), // Templated
190	.cmu_canleave_st(cmu_canleave_st[1]), // Templated
191	.cmu_dupmiss_st(cmu_dupmiss_st[1]), // Templated
192	// Inputs
193	.scan_in(csm1_scanin),
194	.scan_out(csm1_scanout),
195	.l1clk (l1clk),
196	.spc_aclk (spc_aclk),
197	.spc_bclk (spc_bclk),
198	.ftu_cmiss (ftu_cmiss[1]), // Templated
199	.ftu_inv_req (ftu_inv_req[1]), // Templated
200	.lsc_l15_valid (lsc_l15_valid[1]), // Templated
201	.mct_fill_complete(mct_fill_complete[1]), // Templated
202	.cmu_data_ready (cmu_data_ready[1]), // Templated
203	.cmu_has_dup_miss (cmu_has_dup_miss[1]), // Templated
204	.cmu_mbhit_c (cmu_mbhit_c), // Templated
205	.ftu_redirect (ftu_redirect[1]), // Templated
206	.mct_rst_dupmiss (mct_rst_dupmiss[1]), // Templated
207	.mdp_mbhit_q (mdp_mbhit_q[1]), // Templated
208	.mct_ignore_cmiss (mct_ignore_cmiss));
209
210	ifu_cmu_csm_ctl csm2 (
211	/AUTOINST/
212	// Outputs
213	.csm_valid_req (csm_valid_req[2]), // Templated
214	.cmu_null_st(cmu_null_st[2]), // Templated
215	.cmu_req_st(cmu_req_st[2]), // Templated
216	.cmu_canleave_st(cmu_canleave_st[2]), // Templated
217	.cmu_dupmiss_st(cmu_dupmiss_st[2]), // Templated
218	// Inputs
219	.scan_in(csm2_scanin),
220	.scan_out(csm2_scanout),
221	.l1clk (l1clk),
222	.spc_aclk (spc_aclk),
223	.spc_bclk (spc_bclk),
224	.ftu_cmiss (ftu_cmiss[2]), // Templated
225	.ftu_inv_req (ftu_inv_req[2]), // Templated
226	.lsc_l15_valid (lsc_l15_valid[2]), // Templated
227	.mct_fill_complete(mct_fill_complete[2]), // Templated
228	.cmu_data_ready (cmu_data_ready[2]), // Templated
229	.cmu_has_dup_miss (cmu_has_dup_miss[2]), // Templated
230	.cmu_mbhit_c (cmu_mbhit_c), // Templated
231	.ftu_redirect (ftu_redirect[2]), // Templated
232	.mct_rst_dupmiss (mct_rst_dupmiss[2]), // Templated
233	.mdp_mbhit_q (mdp_mbhit_q[2]), // Templated
234	.mct_ignore_cmiss (mct_ignore_cmiss));
235
236	ifu_cmu_csm_ctl csm3 (
237	/AUTOINST/
238	// Outputs
239	.csm_valid_req (csm_valid_req[3]), // Templated
240	.cmu_null_st(cmu_null_st[3]), // Templated
241	.cmu_req_st(cmu_req_st[3]), // Templated
242	.cmu_canleave_st(cmu_canleave_st[3]), // Templated
243	.cmu_dupmiss_st(cmu_dupmiss_st[3]), // Templated
244	// Inputs
245	.scan_in(csm3_scanin),
246	.scan_out(csm3_scanout),
247	.l1clk (l1clk),
248	.spc_aclk (spc_aclk),
249	.spc_bclk (spc_bclk),
250	.ftu_cmiss (ftu_cmiss[3]), // Templated
251	.ftu_inv_req (ftu_inv_req[3]), // Templated
252	.lsc_l15_valid (lsc_l15_valid[3]), // Templated
253	.mct_fill_complete(mct_fill_complete[3]), // Templated
254	.cmu_data_ready (cmu_data_ready[3]), // Templated
255	.cmu_has_dup_miss (cmu_has_dup_miss[3]), // Templated
256	.cmu_mbhit_c (cmu_mbhit_c), // Templated
257	.ftu_redirect (ftu_redirect[3]), // Templated
258	.mct_rst_dupmiss (mct_rst_dupmiss[3]), // Templated
259	.mdp_mbhit_q (mdp_mbhit_q[3]), // Templated
260	.mct_ignore_cmiss (mct_ignore_cmiss));
261
262	ifu_cmu_csm_ctl csm4 (
263	/AUTOINST/
264	// Outputs
265	.csm_valid_req (csm_valid_req[4]), // Templated
266	.cmu_null_st(cmu_null_st[4]), // Templated
267	.cmu_req_st(cmu_req_st[4]), // Templated
268	.cmu_canleave_st(cmu_canleave_st[4]), // Templated
269	.cmu_dupmiss_st(cmu_dupmiss_st[4]), // Templated
270	// Inputs
271	.scan_in(csm4_scanin),
272	.scan_out(csm4_scanout),
273	.l1clk (l1clk),
274	.spc_aclk (spc_aclk),
275	.spc_bclk (spc_bclk),
276	.ftu_cmiss (ftu_cmiss[4]), // Templated
277	.ftu_inv_req (ftu_inv_req[4]), // Templated
278	.lsc_l15_valid (lsc_l15_valid[4]), // Templated
279	.mct_fill_complete(mct_fill_complete[4]), // Templated
280	.cmu_data_ready (cmu_data_ready[4]), // Templated
281	.cmu_has_dup_miss (cmu_has_dup_miss[4]), // Templated
282	.cmu_mbhit_c (cmu_mbhit_c), // Templated
283	.ftu_redirect (ftu_redirect[4]), // Templated
284	.mct_rst_dupmiss (mct_rst_dupmiss[4]), // Templated
285	.mdp_mbhit_q (mdp_mbhit_q[4]), // Templated
286	.mct_ignore_cmiss (mct_ignore_cmiss));
287
288	ifu_cmu_csm_ctl csm5 (
289	/AUTOINST/
290	// Outputs
291	.csm_valid_req (csm_valid_req[5]), // Templated
292	.cmu_null_st(cmu_null_st[5]), // Templated
293	.cmu_req_st(cmu_req_st[5]), // Templated
294	.cmu_canleave_st(cmu_canleave_st[5]), // Templated
295	.cmu_dupmiss_st(cmu_dupmiss_st[5]), // Templated
296	// Inputs
297	.scan_in(csm5_scanin),
298	.scan_out(csm5_scanout),
299	.l1clk (l1clk),
300	.spc_aclk (spc_aclk),
301	.spc_bclk (spc_bclk),
302	.ftu_cmiss (ftu_cmiss[5]), // Templated
303	.ftu_inv_req (ftu_inv_req[5]), // Templated
304	.lsc_l15_valid (lsc_l15_valid[5]), // Templated
305	.mct_fill_complete(mct_fill_complete[5]), // Templated
306	.cmu_data_ready (cmu_data_ready[5]), // Templated
307	.cmu_has_dup_miss (cmu_has_dup_miss[5]), // Templated
308	.cmu_mbhit_c (cmu_mbhit_c), // Templated
309	.ftu_redirect (ftu_redirect[5]), // Templated
310	.mct_rst_dupmiss (mct_rst_dupmiss[5]), // Templated
311	.mdp_mbhit_q (mdp_mbhit_q[5]), // Templated
312	.mct_ignore_cmiss (mct_ignore_cmiss));
313
314	ifu_cmu_csm_ctl csm6 (
315	/AUTOINST/
316	// Outputs
317	.csm_valid_req (csm_valid_req[6]), // Templated
318	.cmu_null_st(cmu_null_st[6]), // Templated
319	.cmu_req_st(cmu_req_st[6]), // Templated
320	.cmu_canleave_st(cmu_canleave_st[6]), // Templated
321	.cmu_dupmiss_st(cmu_dupmiss_st[6]), // Templated
322	// Inputs
323	.scan_in(csm6_scanin),
324	.scan_out(csm6_scanout),
325	.l1clk (l1clk),
326	.spc_aclk (spc_aclk),
327	.spc_bclk (spc_bclk),
328	.ftu_cmiss (ftu_cmiss[6]), // Templated
329	.ftu_inv_req (ftu_inv_req[6]), // Templated
330	.lsc_l15_valid (lsc_l15_valid[6]), // Templated
331	.mct_fill_complete(mct_fill_complete[6]), // Templated
332	.cmu_data_ready (cmu_data_ready[6]), // Templated
333	.cmu_has_dup_miss (cmu_has_dup_miss[6]), // Templated
334	.cmu_mbhit_c (cmu_mbhit_c), // Templated
335	.ftu_redirect (ftu_redirect[6]), // Templated
336	.mct_rst_dupmiss (mct_rst_dupmiss[6]), // Templated
337	.mdp_mbhit_q (mdp_mbhit_q[6]), // Templated
338	.mct_ignore_cmiss (mct_ignore_cmiss));
339
340	ifu_cmu_csm_ctl csm7 (
341	/AUTOINST/
342	// Outputs
343	.csm_valid_req (csm_valid_req[7]), // Templated
344	.cmu_null_st(cmu_null_st[7]), // Templated
345	.cmu_req_st(cmu_req_st[7]), // Templated
346	.cmu_canleave_st(cmu_canleave_st[7]), // Templated
347	.cmu_dupmiss_st(cmu_dupmiss_st[7]), // Templated
348	// Inputs
349	.scan_in(csm7_scanin),
350	.scan_out(csm7_scanout),
351	.l1clk (l1clk),
352	.spc_aclk (spc_aclk),
353	.spc_bclk (spc_bclk),
354	.ftu_cmiss (ftu_cmiss[7]), // Templated
355	.ftu_inv_req (ftu_inv_req[7]), // Templated
356	.lsc_l15_valid (lsc_l15_valid[7]), // Templated
357	.mct_fill_complete(mct_fill_complete[7]), // Templated
358	.cmu_data_ready (cmu_data_ready[7]), // Templated
359	.cmu_has_dup_miss (cmu_has_dup_miss[7]), // Templated
360	.cmu_mbhit_c (cmu_mbhit_c), // Templated
361	.ftu_redirect (ftu_redirect[7]), // Templated
362	.mct_rst_dupmiss (mct_rst_dupmiss[7]), // Templated
363	.mdp_mbhit_q (mdp_mbhit_q[7]), // Templated
364	.mct_ignore_cmiss (mct_ignore_cmiss));
365
366
367	////////////////////////////////////////////////////////
368	// SPARE CELLS
369	////////////////////////////////////////////////////////
370	ifu_cmu_cmt_ctl_spare_ctl_macro__num_1 spares (
371	.scan_in(spares_scanin),
372	.scan_out(spares_scanout),
373	.l1clk (l1clk),
374	.siclk(siclk),
375	.soclk(soclk)
376	);
377	////////////////////////////////////////////////////////
378
379	supply0 vss;
380	supply1 vdd;
381	// fixscan start:
382	assign csm0_scanin = scan_in ;
383	assign csm1_scanin = csm0_scanout ;
384	assign csm2_scanin = csm1_scanout ;
385	assign csm3_scanin = csm2_scanout ;
386	assign csm4_scanin = csm3_scanout ;
387	assign csm5_scanin = csm4_scanout ;
388	assign csm6_scanin = csm5_scanout ;
389	assign csm7_scanin = csm6_scanout ;
390	assign spares_scanin = csm7_scanout ;
391	assign scan_out = spares_scanout ;
392
393	// fixscan end:
394	endmodule
395
396	// Local Variables:
397	// verilog-library-directories:("." "v")
398	// End:
399
400
401
402
403
404
405	// any PARAMS parms go into naming of macro
406
407	module ifu_cmu_cmt_ctl_l1clkhdr_ctl_macro (
408	l2clk,
409	l1en,
410	pce_ov,
411	stop,
412	se,
413	l1clk);
414
415
416	input l2clk;
417	input l1en;
418	input pce_ov;
419	input stop;
420	input se;
421	output l1clk;
422
423
424
425
426
427	cl_sc1_l1hdr_8x c_0 (
428
429
430	.l2clk(l2clk),
431	.pce(l1en),
432	.l1clk(l1clk),
433	.se(se),
434	.pce_ov(pce_ov),
435	.stop(stop)
436	);
437
438
439
440	endmodule
441
442
443
444
445
446
447	// any PARAMS parms go into naming of macro
448
449	module ifu_cmu_cmt_ctl_msff_ctl_macro__width_1 (
450	din,
451	l1clk,
452	scan_in,
453	siclk,
454	soclk,
455	dout,
456	scan_out);
457	wire [0:0] fdin;
458
459	input [0:0] din;
460	input l1clk;
461	input scan_in;
462
463
464	input siclk;
465	input soclk;
466
467	output [0:0] dout;
468	output scan_out;
469	assign fdin[0:0] = din[0:0];
470
471
472
473
474
475
476	dff #(1) d0_0 (
477	.l1clk(l1clk),
478	.siclk(siclk),
479	.soclk(soclk),
480	.d(fdin[0:0]),
481	.si(scan_in),
482	.so(scan_out),
483	.q(dout[0:0])
484	);
485
486
487
488
489
490
491
492
493
494
495
496
497	endmodule
498
499
500
501
502
503
504
505
506
507	// Description: Spare gate macro for control blocks
508	//
509	// Param num controls the number of times the macro is added
510	// flops=0 can be used to use only combination spare logic
511
512
513	module ifu_cmu_cmt_ctl_spare_ctl_macro__num_1 (
514	l1clk,
515	scan_in,
516	siclk,
517	soclk,
518	scan_out);
519	wire si_0;
520	wire so_0;
521	wire spare0_flop_unused;
522	wire spare0_buf_32x_unused;
523	wire spare0_nand3_8x_unused;
524	wire spare0_inv_8x_unused;
525	wire spare0_aoi22_4x_unused;
526	wire spare0_buf_8x_unused;
527	wire spare0_oai22_4x_unused;
528	wire spare0_inv_16x_unused;
529	wire spare0_nand2_16x_unused;
530	wire spare0_nor3_4x_unused;
531	wire spare0_nand2_8x_unused;
532	wire spare0_buf_16x_unused;
533	wire spare0_nor2_16x_unused;
534	wire spare0_inv_32x_unused;
535
536
537	input l1clk;
538	input scan_in;
539	input siclk;
540	input soclk;
541	output scan_out;
542
543	cl_sc1_msff_8x spare0_flop (.l1clk(l1clk),
544	.siclk(siclk),
545	.soclk(soclk),
546	.si(si_0),
547	.so(so_0),
548	.d(1'b0),
549	.q(spare0_flop_unused));
550	assign si_0 = scan_in;
551
552	cl_u1_buf_32x spare0_buf_32x (.in(1'b1),
553	.out(spare0_buf_32x_unused));
554	cl_u1_nand3_8x spare0_nand3_8x (.in0(1'b1),
555	.in1(1'b1),
556	.in2(1'b1),
557	.out(spare0_nand3_8x_unused));
558	cl_u1_inv_8x spare0_inv_8x (.in(1'b1),
559	.out(spare0_inv_8x_unused));
560	cl_u1_aoi22_4x spare0_aoi22_4x (.in00(1'b1),
561	.in01(1'b1),
562	.in10(1'b1),
563	.in11(1'b1),
564	.out(spare0_aoi22_4x_unused));
565	cl_u1_buf_8x spare0_buf_8x (.in(1'b1),
566	.out(spare0_buf_8x_unused));
567	cl_u1_oai22_4x spare0_oai22_4x (.in00(1'b1),
568	.in01(1'b1),
569	.in10(1'b1),
570	.in11(1'b1),
571	.out(spare0_oai22_4x_unused));
572	cl_u1_inv_16x spare0_inv_16x (.in(1'b1),
573	.out(spare0_inv_16x_unused));
574	cl_u1_nand2_16x spare0_nand2_16x (.in0(1'b1),
575	.in1(1'b1),
576	.out(spare0_nand2_16x_unused));
577	cl_u1_nor3_4x spare0_nor3_4x (.in0(1'b0),
578	.in1(1'b0),
579	.in2(1'b0),
580	.out(spare0_nor3_4x_unused));
581	cl_u1_nand2_8x spare0_nand2_8x (.in0(1'b1),
582	.in1(1'b1),
583	.out(spare0_nand2_8x_unused));
584	cl_u1_buf_16x spare0_buf_16x (.in(1'b1),
585	.out(spare0_buf_16x_unused));
586	cl_u1_nor2_16x spare0_nor2_16x (.in0(1'b0),
587	.in1(1'b0),
588	.out(spare0_nor2_16x_unused));
589	cl_u1_inv_32x spare0_inv_32x (.in(1'b1),
590	.out(spare0_inv_32x_unused));
591	assign scan_out = so_0;
592
593
594
595	endmodule
596