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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: ifu_ibu_ibf_dp.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module ifu_ibu_ibf_dp ( | |
36 | tcu_scan_en, | |
37 | l2clk, | |
38 | scan_in, | |
39 | tcu_pce_ov, | |
40 | spc_aclk, | |
41 | spc_bclk, | |
42 | pku_pick_p, | |
43 | ftu_instr_0_c, | |
44 | ftu_instr_1_c, | |
45 | ftu_instr_2_c, | |
46 | ftu_instr_3_c, | |
47 | ftu_instr_0_exceptions_c, | |
48 | ftu_instr_1_exceptions_c, | |
49 | ftu_instr_2_exceptions_c, | |
50 | ftu_instr_3_exceptions_c, | |
51 | ftu_ic_no_err_c, | |
52 | ibq_buff_clken, | |
53 | ibq_ctl_clken, | |
54 | ibq_buf0_sel_inst0_pick, | |
55 | ibq_buf0_sel_inst1_pick, | |
56 | ibq_buf0_sel_inst2_pick, | |
57 | ibq_buf0_sel_inst3_pick, | |
58 | ibq_buf0_sel_inst0_pick_, | |
59 | ibq_buf0_sel_inst1_pick_, | |
60 | ibq_buf0_sel_inst2_pick_, | |
61 | ibq_buf0_sel_inst3_pick_, | |
62 | ibq_buf0_sel_buf1, | |
63 | ibq_buf0_sel_buf2, | |
64 | ibq_buf0_sel_buf3, | |
65 | ibq_buf0_sel_buf4, | |
66 | ibq_buf0_sel_buf5, | |
67 | ibq_buf0_sel_buf6, | |
68 | ibq_buf0_sel_buf7, | |
69 | ibq_buf0_sel_hold_pick, | |
70 | ibq_buf0_sel_hold_pick_, | |
71 | ibq_buf0_sel_buf1to7_pick, | |
72 | ibq_buf0_sel_buf1to7_pick_, | |
73 | ibq_buf1_sel_inst0, | |
74 | ibq_buf1_sel_inst1, | |
75 | ibq_buf1_sel_inst2, | |
76 | ibq_buf1_sel_inst3, | |
77 | ibq_buf1_sel_hold, | |
78 | ibq_buf2_sel_inst0, | |
79 | ibq_buf2_sel_inst1, | |
80 | ibq_buf2_sel_inst2, | |
81 | ibq_buf2_sel_inst3, | |
82 | ibq_buf2_sel_hold, | |
83 | ibq_buf3_sel_inst0, | |
84 | ibq_buf3_sel_inst1, | |
85 | ibq_buf3_sel_inst2, | |
86 | ibq_buf3_sel_inst3, | |
87 | ibq_buf3_sel_hold, | |
88 | ibq_buf4_sel_inst0, | |
89 | ibq_buf4_sel_inst1, | |
90 | ibq_buf4_sel_inst2, | |
91 | ibq_buf4_sel_inst3, | |
92 | ibq_buf4_sel_hold, | |
93 | ibq_buf5_sel_inst0, | |
94 | ibq_buf5_sel_inst1, | |
95 | ibq_buf5_sel_inst2, | |
96 | ibq_buf5_sel_inst3, | |
97 | ibq_buf5_sel_hold, | |
98 | ibq_buf6_sel_inst0, | |
99 | ibq_buf6_sel_inst1, | |
100 | ibq_buf6_sel_inst2, | |
101 | ibq_buf6_sel_inst3, | |
102 | ibq_buf6_sel_hold, | |
103 | ibq_buf7_sel_inst0, | |
104 | ibq_buf7_sel_inst1, | |
105 | ibq_buf7_sel_inst2, | |
106 | ibq_buf7_sel_inst3, | |
107 | ibq_buf7_sel_hold, | |
108 | ifu_buf0_inst, | |
109 | ifu_buf0_excp, | |
110 | scan_out); | |
111 | wire stop; | |
112 | wire se; | |
113 | wire pce_ov; | |
114 | wire siclk; | |
115 | wire soclk; | |
116 | wire [37:0] buf1_inst; | |
117 | wire [37:0] buf2_inst; | |
118 | wire [37:0] buf3_inst; | |
119 | wire [37:0] buf4_inst; | |
120 | wire [37:0] buf5_inst; | |
121 | wire [37:0] buf6_inst; | |
122 | wire [37:0] buf7_inst; | |
123 | wire [37:0] buf0_in7to1; | |
124 | wire pick0_; | |
125 | wire pick1_; | |
126 | wire pick2_; | |
127 | wire buf0_sel_inst0_int0; | |
128 | wire buf0_sel_inst1_int0; | |
129 | wire buf0_sel_inst2_int0; | |
130 | wire buf0_sel_inst3_int0; | |
131 | wire buf0_sel_buf1to7_int0; | |
132 | wire buf0_sel_hold_int0; | |
133 | wire buf0_sel_inst0_int1; | |
134 | wire buf0_sel_inst1_int1; | |
135 | wire buf0_sel_inst2_int1; | |
136 | wire buf0_sel_inst3_int1; | |
137 | wire buf0_sel_buf1to7_int1; | |
138 | wire buf0_sel_hold_int1; | |
139 | wire buf0_sel_inst0; | |
140 | wire buf0_sel_inst1; | |
141 | wire buf0_sel_inst2; | |
142 | wire buf0_sel_inst3; | |
143 | wire buf0_sel_buf1to7; | |
144 | wire buf0_sel_hold; | |
145 | wire ic_no_err_c_buf; | |
146 | wire [4:0] instr_1_exceptions_c_mod; | |
147 | wire [4:0] instr_2_exceptions_c_mod; | |
148 | wire [4:0] instr_3_exceptions_c_mod; | |
149 | wire [37:0] buf0_in; | |
150 | wire [37:0] buf1_in; | |
151 | wire [37:0] buf2_in; | |
152 | wire [37:0] buf3_in; | |
153 | wire [37:0] buf4_in; | |
154 | wire [37:0] buf5_in; | |
155 | wire [37:0] buf6_in; | |
156 | wire [37:0] buf7_in; | |
157 | wire buf0_ff_scanin; | |
158 | wire buf0_ff_scanout; | |
159 | wire buf1_ff_scanin; | |
160 | wire buf1_ff_scanout; | |
161 | wire buf2_ff_scanin; | |
162 | wire buf2_ff_scanout; | |
163 | wire buf3_ff_scanin; | |
164 | wire buf3_ff_scanout; | |
165 | wire buf4_ff_scanin; | |
166 | wire buf4_ff_scanout; | |
167 | wire buf5_ff_scanin; | |
168 | wire buf5_ff_scanout; | |
169 | wire buf6_ff_scanin; | |
170 | wire buf6_ff_scanout; | |
171 | wire buf7_ff_scanin; | |
172 | wire buf7_ff_scanout; | |
173 | ||
174 | ||
175 | input tcu_scan_en ; | |
176 | input l2clk ; | |
177 | input scan_in; | |
178 | input tcu_pce_ov; // scan signals | |
179 | input spc_aclk; | |
180 | input spc_bclk; | |
181 | ||
182 | input pku_pick_p; | |
183 | ||
184 | input [32:0] ftu_instr_0_c; | |
185 | input [32:0] ftu_instr_1_c; | |
186 | input [32:0] ftu_instr_2_c; | |
187 | input [32:0] ftu_instr_3_c; | |
188 | input [4:0] ftu_instr_0_exceptions_c; | |
189 | input [4:0] ftu_instr_1_exceptions_c; | |
190 | input [4:0] ftu_instr_2_exceptions_c; | |
191 | input [4:0] ftu_instr_3_exceptions_c; | |
192 | ||
193 | input ftu_ic_no_err_c; | |
194 | ||
195 | input ibq_buff_clken; | |
196 | input ibq_ctl_clken ; | |
197 | ||
198 | input ibq_buf0_sel_inst0_pick ; | |
199 | input ibq_buf0_sel_inst1_pick ; | |
200 | input ibq_buf0_sel_inst2_pick ; | |
201 | input ibq_buf0_sel_inst3_pick ; | |
202 | input ibq_buf0_sel_inst0_pick_; | |
203 | input ibq_buf0_sel_inst1_pick_; | |
204 | input ibq_buf0_sel_inst2_pick_; | |
205 | input ibq_buf0_sel_inst3_pick_; | |
206 | input ibq_buf0_sel_buf1 ; | |
207 | input ibq_buf0_sel_buf2 ; | |
208 | input ibq_buf0_sel_buf3 ; | |
209 | input ibq_buf0_sel_buf4 ; | |
210 | input ibq_buf0_sel_buf5 ; | |
211 | input ibq_buf0_sel_buf6 ; | |
212 | input ibq_buf0_sel_buf7 ; | |
213 | input ibq_buf0_sel_hold_pick ; | |
214 | input ibq_buf0_sel_hold_pick_ ; | |
215 | ||
216 | input ibq_buf0_sel_buf1to7_pick; | |
217 | input ibq_buf0_sel_buf1to7_pick_; | |
218 | ||
219 | input ibq_buf1_sel_inst0 ; | |
220 | input ibq_buf1_sel_inst1 ; | |
221 | input ibq_buf1_sel_inst2 ; | |
222 | input ibq_buf1_sel_inst3 ; | |
223 | input ibq_buf1_sel_hold ; | |
224 | ||
225 | input ibq_buf2_sel_inst0 ; | |
226 | input ibq_buf2_sel_inst1 ; | |
227 | input ibq_buf2_sel_inst2 ; | |
228 | input ibq_buf2_sel_inst3 ; | |
229 | input ibq_buf2_sel_hold ; | |
230 | ||
231 | input ibq_buf3_sel_inst0 ; | |
232 | input ibq_buf3_sel_inst1 ; | |
233 | input ibq_buf3_sel_inst2 ; | |
234 | input ibq_buf3_sel_inst3 ; | |
235 | input ibq_buf3_sel_hold ; | |
236 | ||
237 | input ibq_buf4_sel_inst0 ; | |
238 | input ibq_buf4_sel_inst1 ; | |
239 | input ibq_buf4_sel_inst2 ; | |
240 | input ibq_buf4_sel_inst3 ; | |
241 | input ibq_buf4_sel_hold ; | |
242 | ||
243 | input ibq_buf5_sel_inst0 ; | |
244 | input ibq_buf5_sel_inst1 ; | |
245 | input ibq_buf5_sel_inst2 ; | |
246 | input ibq_buf5_sel_inst3 ; | |
247 | input ibq_buf5_sel_hold ; | |
248 | ||
249 | input ibq_buf6_sel_inst0 ; | |
250 | input ibq_buf6_sel_inst1 ; | |
251 | input ibq_buf6_sel_inst2 ; | |
252 | input ibq_buf6_sel_inst3 ; | |
253 | input ibq_buf6_sel_hold ; | |
254 | ||
255 | input ibq_buf7_sel_inst0 ; | |
256 | input ibq_buf7_sel_inst1 ; | |
257 | input ibq_buf7_sel_inst2 ; | |
258 | input ibq_buf7_sel_inst3 ; | |
259 | input ibq_buf7_sel_hold ; | |
260 | ||
261 | output[32:0] ifu_buf0_inst ; | |
262 | output[4:0] ifu_buf0_excp ; | |
263 | output scan_out; | |
264 | ||
265 | // scan renames | |
266 | // assign pce_ov = tcu_pce_ov; | |
267 | assign stop = 1'b0; | |
268 | // assign siclk = spc_aclk; | |
269 | // assign soclk = spc_bclk; | |
270 | // end scan | |
271 | ||
272 | ifu_ibu_ibf_dp_buff_macro__dbuff_32x__stack_none__width_4 test_rep0 ( | |
273 | .din ({tcu_scan_en,tcu_pce_ov,spc_aclk,spc_bclk}), | |
274 | .dout({se,pce_ov,siclk,soclk}) | |
275 | ); | |
276 | ||
277 | ||
278 | ||
279 | /////////////////////////////////////////////////////////// | |
280 | // Muxing for each buffer // | |
281 | /////////////////////////////////////////////////////////// | |
282 | ||
283 | // mux types can be decided later based on area/timing. Can also use other types of logic (i.e. and/or) | |
284 | ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_7__stack_38c__width_38 buf0_muxa ( | |
285 | .din0(buf1_inst[37:0]), | |
286 | .din1(buf2_inst[37:0]), | |
287 | .din2(buf3_inst[37:0]), | |
288 | .din3(buf4_inst[37:0]), | |
289 | .din4(buf5_inst[37:0]), | |
290 | .din5(buf6_inst[37:0]), | |
291 | .din6(buf7_inst[37:0]), | |
292 | .sel0(ibq_buf0_sel_buf1), | |
293 | .sel1(ibq_buf0_sel_buf2), | |
294 | .sel2(ibq_buf0_sel_buf3), | |
295 | .sel3(ibq_buf0_sel_buf4), | |
296 | .sel4(ibq_buf0_sel_buf5), | |
297 | .sel5(ibq_buf0_sel_buf6), | |
298 | .sel6(ibq_buf0_sel_buf7), | |
299 | .dout(buf0_in7to1[37:0]) | |
300 | ); | |
301 | ||
302 | /////////////////////////////////////////////////////////////////// | |
303 | // Selects for buf0. // | |
304 | /////////////////////////////////////////////////////////////////// | |
305 | ifu_ibu_ibf_dp_inv_macro__dinv_12x__width_3 pick_inv ( | |
306 | .din ({3{pku_pick_p}}), | |
307 | .dout({pick0_,pick1_,pick2_})); | |
308 | ||
309 | ifu_ibu_ibf_dp_nand_macro__dnand_20x__width_6 ibuf0_sel0_n0 ( | |
310 | .din0 ({6{pku_pick_p}}), | |
311 | .din1 ({ibq_buf0_sel_inst0_pick,ibq_buf0_sel_inst1_pick,ibq_buf0_sel_inst2_pick, | |
312 | ibq_buf0_sel_inst3_pick,ibq_buf0_sel_buf1to7_pick,ibq_buf0_sel_hold_pick}), | |
313 | .dout ({buf0_sel_inst0_int0,buf0_sel_inst1_int0,buf0_sel_inst2_int0, | |
314 | buf0_sel_inst3_int0,buf0_sel_buf1to7_int0,buf0_sel_hold_int0})) ; | |
315 | ||
316 | ifu_ibu_ibf_dp_nand_macro__dnand_20x__width_6 ibuf0_sel0_n1 ( | |
317 | .din0 ({2{pick0_,pick1_,pick2_}}), | |
318 | .din1 ({ibq_buf0_sel_inst0_pick_,ibq_buf0_sel_inst1_pick_,ibq_buf0_sel_inst2_pick_, | |
319 | ibq_buf0_sel_inst3_pick_,ibq_buf0_sel_buf1to7_pick_,ibq_buf0_sel_hold_pick_}), | |
320 | .dout ({buf0_sel_inst0_int1,buf0_sel_inst1_int1,buf0_sel_inst2_int1, | |
321 | buf0_sel_inst3_int1,buf0_sel_buf1to7_int1,buf0_sel_hold_int1})) ; | |
322 | ||
323 | ifu_ibu_ibf_dp_nand_macro__dnand_32x__width_6 ibuf0_sel0_n2 ( | |
324 | .din0 ({buf0_sel_inst0_int1,buf0_sel_inst1_int1,buf0_sel_inst2_int1, | |
325 | buf0_sel_inst3_int1,buf0_sel_buf1to7_int1,buf0_sel_hold_int1}), | |
326 | .din1 ({buf0_sel_inst0_int0,buf0_sel_inst1_int0,buf0_sel_inst2_int0, | |
327 | buf0_sel_inst3_int0,buf0_sel_buf1to7_int0,buf0_sel_hold_int0}), | |
328 | .dout ({buf0_sel_inst0,buf0_sel_inst1,buf0_sel_inst2, | |
329 | buf0_sel_inst3,buf0_sel_buf1to7,buf0_sel_hold})) ; | |
330 | ||
331 | //////////////////////////////////////////////////////////////////// | |
332 | // Zero out the exception bits when in Ic by-pass mode and no_err // | |
333 | // This is done to avoid the PMU counting cache-misses and other // | |
334 | // info more than once. I.e only one instruction should be marked // | |
335 | // NOTE: we can not do that when there are errors becuse we need // | |
336 | // to have at least two instruction marked just in case one of // | |
337 | // is annulled. // | |
338 | //////////////////////////////////////////////////////////////////// | |
339 | ||
340 | ifu_ibu_ibf_dp_buff_macro__dbuff_32x__stack_none__width_1 ic_no_err_buff ( | |
341 | .din (ftu_ic_no_err_c), | |
342 | .dout(ic_no_err_c_buf) | |
343 | ); | |
344 | ||
345 | ifu_ibu_ibf_dp_and_macro__dnand_32x__width_5 except_1_and ( | |
346 | .din1 ({5{ic_no_err_c_buf}}), | |
347 | .din0 ( ftu_instr_1_exceptions_c[4:0]), | |
348 | .dout ( instr_1_exceptions_c_mod[4:0])); | |
349 | ||
350 | ||
351 | ifu_ibu_ibf_dp_and_macro__dnand_32x__width_5 except_2_and ( | |
352 | .din1 ({5{ic_no_err_c_buf}}), | |
353 | .din0 ( ftu_instr_2_exceptions_c[4:0]), | |
354 | .dout ( instr_2_exceptions_c_mod[4:0])); | |
355 | ||
356 | ||
357 | ifu_ibu_ibf_dp_and_macro__dnand_32x__width_5 except_3_and ( | |
358 | .din1 ({5{ic_no_err_c_buf}}), | |
359 | .din0 ( ftu_instr_3_exceptions_c[4:0]), | |
360 | .dout ( instr_3_exceptions_c_mod[4:0])); | |
361 | ||
362 | ||
363 | /////////////////////////////////////////////////////////////////// | |
364 | // Changed this mux to 7x1 because the instructions are no longer// | |
365 | // ordered and we do not know which one the first instruction is // | |
366 | // // | |
367 | /////////////////////////////////////////////////////////////////// | |
368 | ||
369 | ifu_ibu_ibf_dp_mux_macro__buffsel_none__mux_aonpe__ports_6__stack_38c__width_38 buf0_muxb ( | |
370 | .din0({ftu_instr_0_exceptions_c[4:0],ftu_instr_0_c[32:0]}), | |
371 | .din1({instr_1_exceptions_c_mod[4:0],ftu_instr_1_c[32:0]}), | |
372 | .din2({instr_2_exceptions_c_mod[4:0],ftu_instr_2_c[32:0]}), | |
373 | .din3({instr_3_exceptions_c_mod[4:0],ftu_instr_3_c[32:0]}), | |
374 | .din4(buf0_in7to1[37:0]), | |
375 | .din5({ifu_buf0_excp[4:0], ifu_buf0_inst[32:0]}), | |
376 | .sel0(buf0_sel_inst0), | |
377 | .sel1(buf0_sel_inst1), | |
378 | .sel2(buf0_sel_inst2), | |
379 | .sel3(buf0_sel_inst3), | |
380 | .sel4(buf0_sel_buf1to7), | |
381 | .sel5(buf0_sel_hold), | |
382 | .dout(buf0_in[37:0]) | |
383 | ); | |
384 | ||
385 | // mux_macro buf0_muxc (width=38,ports=2,mux=aope,stack=38c) ( | |
386 | // .din0(buf0_flush0[37:0]), | |
387 | // .din1({ifu_buf0_excp[4:0], ifu_buf0_inst[32:0]}), | |
388 | // .sel0(ibq_buf0_sel_hold), | |
389 | // .dout(buf0_in[37:0]) | |
390 | // ); | |
391 | ||
392 | ||
393 | ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_5__stack_38c__width_38 buf1_mux ( | |
394 | .din0({ftu_instr_0_exceptions_c[4:0],ftu_instr_0_c[32:0]}), | |
395 | .din1({instr_1_exceptions_c_mod[4:0],ftu_instr_1_c[32:0]}), | |
396 | .din2({instr_2_exceptions_c_mod[4:0],ftu_instr_2_c[32:0]}), | |
397 | .din3({instr_3_exceptions_c_mod[4:0],ftu_instr_3_c[32:0]}), | |
398 | .din4(buf1_inst[37:0]), | |
399 | .sel0(ibq_buf1_sel_inst0), | |
400 | .sel1(ibq_buf1_sel_inst1), | |
401 | .sel2(ibq_buf1_sel_inst2), | |
402 | .sel3(ibq_buf1_sel_inst3), | |
403 | .sel4(ibq_buf1_sel_hold), | |
404 | .dout(buf1_in[37:0]) | |
405 | ); | |
406 | ||
407 | ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_5__stack_38c__width_38 buf2_mux ( | |
408 | .din0({ftu_instr_0_exceptions_c[4:0],ftu_instr_0_c[32:0]}), | |
409 | .din1({instr_1_exceptions_c_mod[4:0],ftu_instr_1_c[32:0]}), | |
410 | .din2({instr_2_exceptions_c_mod[4:0],ftu_instr_2_c[32:0]}), | |
411 | .din3({instr_3_exceptions_c_mod[4:0],ftu_instr_3_c[32:0]}), | |
412 | .din4(buf2_inst[37:0]), | |
413 | .sel0(ibq_buf2_sel_inst0), | |
414 | .sel1(ibq_buf2_sel_inst1), | |
415 | .sel2(ibq_buf2_sel_inst2), | |
416 | .sel3(ibq_buf2_sel_inst3), | |
417 | .sel4(ibq_buf2_sel_hold), | |
418 | .dout(buf2_in[37:0]) | |
419 | ); | |
420 | ||
421 | ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_5__stack_38c__width_38 buf3_mux ( | |
422 | .din0({ftu_instr_0_exceptions_c[4:0],ftu_instr_0_c[32:0]}), | |
423 | .din1({instr_1_exceptions_c_mod[4:0],ftu_instr_1_c[32:0]}), | |
424 | .din2({instr_2_exceptions_c_mod[4:0],ftu_instr_2_c[32:0]}), | |
425 | .din3({instr_3_exceptions_c_mod[4:0],ftu_instr_3_c[32:0]}), | |
426 | .din4(buf3_inst[37:0]), | |
427 | .sel0(ibq_buf3_sel_inst0), | |
428 | .sel1(ibq_buf3_sel_inst1), | |
429 | .sel2(ibq_buf3_sel_inst2), | |
430 | .sel3(ibq_buf3_sel_inst3), | |
431 | .sel4(ibq_buf3_sel_hold), | |
432 | .dout(buf3_in[37:0]) | |
433 | ); | |
434 | ||
435 | ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_5__stack_38c__width_38 buf4_mux ( | |
436 | .din0({ftu_instr_0_exceptions_c[4:0],ftu_instr_0_c[32:0]}), | |
437 | .din1({instr_1_exceptions_c_mod[4:0],ftu_instr_1_c[32:0]}), | |
438 | .din2({instr_2_exceptions_c_mod[4:0],ftu_instr_2_c[32:0]}), | |
439 | .din3({instr_3_exceptions_c_mod[4:0],ftu_instr_3_c[32:0]}), | |
440 | .din4(buf4_inst[37:0]), | |
441 | .sel0(ibq_buf4_sel_inst0), | |
442 | .sel1(ibq_buf4_sel_inst1), | |
443 | .sel2(ibq_buf4_sel_inst2), | |
444 | .sel3(ibq_buf4_sel_inst3), | |
445 | .sel4(ibq_buf4_sel_hold), | |
446 | .dout(buf4_in[37:0]) | |
447 | ); | |
448 | ||
449 | ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_5__stack_38c__width_38 buf5_mux ( | |
450 | .din0({ftu_instr_0_exceptions_c[4:0],ftu_instr_0_c[32:0]}), | |
451 | .din1({instr_1_exceptions_c_mod[4:0],ftu_instr_1_c[32:0]}), | |
452 | .din2({instr_2_exceptions_c_mod[4:0],ftu_instr_2_c[32:0]}), | |
453 | .din3({instr_3_exceptions_c_mod[4:0],ftu_instr_3_c[32:0]}), | |
454 | .din4(buf5_inst[37:0]), | |
455 | .sel0(ibq_buf5_sel_inst0), | |
456 | .sel1(ibq_buf5_sel_inst1), | |
457 | .sel2(ibq_buf5_sel_inst2), | |
458 | .sel3(ibq_buf5_sel_inst3), | |
459 | .sel4(ibq_buf5_sel_hold), | |
460 | .dout(buf5_in[37:0]) | |
461 | ); | |
462 | ||
463 | ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_5__stack_38c__width_38 buf6_mux ( | |
464 | .din0({ftu_instr_0_exceptions_c[4:0],ftu_instr_0_c[32:0]}), | |
465 | .din1({instr_1_exceptions_c_mod[4:0],ftu_instr_1_c[32:0]}), | |
466 | .din2({instr_2_exceptions_c_mod[4:0],ftu_instr_2_c[32:0]}), | |
467 | .din3({instr_3_exceptions_c_mod[4:0],ftu_instr_3_c[32:0]}), | |
468 | .din4(buf6_inst[37:0]), | |
469 | .sel0(ibq_buf6_sel_inst0), | |
470 | .sel1(ibq_buf6_sel_inst1), | |
471 | .sel2(ibq_buf6_sel_inst2), | |
472 | .sel3(ibq_buf6_sel_inst3), | |
473 | .sel4(ibq_buf6_sel_hold), | |
474 | .dout(buf6_in[37:0]) | |
475 | ); | |
476 | ||
477 | ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_5__stack_38c__width_38 buf7_mux ( | |
478 | .din0({ftu_instr_0_exceptions_c[4:0],ftu_instr_0_c[32:0]}), | |
479 | .din1({instr_1_exceptions_c_mod[4:0],ftu_instr_1_c[32:0]}), | |
480 | .din2({instr_2_exceptions_c_mod[4:0],ftu_instr_2_c[32:0]}), | |
481 | .din3({instr_3_exceptions_c_mod[4:0],ftu_instr_3_c[32:0]}), | |
482 | .din4(buf7_inst[37:0]), | |
483 | .sel0(ibq_buf7_sel_inst0), | |
484 | .sel1(ibq_buf7_sel_inst1), | |
485 | .sel2(ibq_buf7_sel_inst2), | |
486 | .sel3(ibq_buf7_sel_inst3), | |
487 | .sel4(ibq_buf7_sel_hold), | |
488 | .dout(buf7_in[37:0]) | |
489 | ); | |
490 | ||
491 | ||
492 | /////////////////////////////////////////////////////////// | |
493 | // Flops for the buffers // | |
494 | /////////////////////////////////////////////////////////// | |
495 | ||
496 | ifu_ibu_ibf_dp_msff_macro__dmsff_32x__stack_38c__width_38 buf0_ff ( | |
497 | .scan_in(buf0_ff_scanin), | |
498 | .scan_out(buf0_ff_scanout), | |
499 | .clk(l2clk), | |
500 | .din (buf0_in[37:0]), | |
501 | .en (ibq_ctl_clken), | |
502 | .dout ({ifu_buf0_excp[4:0],ifu_buf0_inst[32:0]}), | |
503 | .se(se), | |
504 | .siclk(siclk), | |
505 | .soclk(soclk), | |
506 | .pce_ov(pce_ov), | |
507 | .stop(stop) | |
508 | ); | |
509 | ||
510 | ifu_ibu_ibf_dp_msff_macro__stack_38c__width_38 buf1_ff ( | |
511 | .scan_in(buf1_ff_scanin), | |
512 | .scan_out(buf1_ff_scanout), | |
513 | .clk(l2clk), | |
514 | .din (buf1_in[37:0]), | |
515 | .en (ibq_buff_clken), | |
516 | .dout (buf1_inst[37:0]), | |
517 | .se(se), | |
518 | .siclk(siclk), | |
519 | .soclk(soclk), | |
520 | .pce_ov(pce_ov), | |
521 | .stop(stop) | |
522 | ); | |
523 | ||
524 | ifu_ibu_ibf_dp_msff_macro__stack_38c__width_38 buf2_ff ( | |
525 | .scan_in(buf2_ff_scanin), | |
526 | .scan_out(buf2_ff_scanout), | |
527 | .clk(l2clk), | |
528 | .din (buf2_in[37:0]), | |
529 | .en (ibq_buff_clken), | |
530 | .dout (buf2_inst[37:0]), | |
531 | .se(se), | |
532 | .siclk(siclk), | |
533 | .soclk(soclk), | |
534 | .pce_ov(pce_ov), | |
535 | .stop(stop) | |
536 | ); | |
537 | ifu_ibu_ibf_dp_msff_macro__stack_38c__width_38 buf3_ff ( | |
538 | .scan_in(buf3_ff_scanin), | |
539 | .scan_out(buf3_ff_scanout), | |
540 | .clk(l2clk), | |
541 | .din (buf3_in[37:0]), | |
542 | .en (ibq_buff_clken), | |
543 | .dout (buf3_inst[37:0]), | |
544 | .se(se), | |
545 | .siclk(siclk), | |
546 | .soclk(soclk), | |
547 | .pce_ov(pce_ov), | |
548 | .stop(stop) | |
549 | ); | |
550 | ifu_ibu_ibf_dp_msff_macro__stack_38c__width_38 buf4_ff ( | |
551 | .scan_in(buf4_ff_scanin), | |
552 | .scan_out(buf4_ff_scanout), | |
553 | .clk(l2clk), | |
554 | .din (buf4_in[37:0]), | |
555 | .en (ibq_buff_clken), | |
556 | .dout (buf4_inst[37:0]), | |
557 | .se(se), | |
558 | .siclk(siclk), | |
559 | .soclk(soclk), | |
560 | .pce_ov(pce_ov), | |
561 | .stop(stop) | |
562 | ); | |
563 | ifu_ibu_ibf_dp_msff_macro__stack_38c__width_38 buf5_ff ( | |
564 | .scan_in(buf5_ff_scanin), | |
565 | .scan_out(buf5_ff_scanout), | |
566 | .clk(l2clk), | |
567 | .din (buf5_in[37:0]), | |
568 | .en (ibq_buff_clken), | |
569 | .dout (buf5_inst[37:0]), | |
570 | .se(se), | |
571 | .siclk(siclk), | |
572 | .soclk(soclk), | |
573 | .pce_ov(pce_ov), | |
574 | .stop(stop) | |
575 | ); | |
576 | ifu_ibu_ibf_dp_msff_macro__stack_38c__width_38 buf6_ff ( | |
577 | .scan_in(buf6_ff_scanin), | |
578 | .scan_out(buf6_ff_scanout), | |
579 | .clk(l2clk), | |
580 | .din (buf6_in[37:0]), | |
581 | .en (ibq_buff_clken), | |
582 | .dout (buf6_inst[37:0]), | |
583 | .se(se), | |
584 | .siclk(siclk), | |
585 | .soclk(soclk), | |
586 | .pce_ov(pce_ov), | |
587 | .stop(stop) | |
588 | ); | |
589 | ifu_ibu_ibf_dp_msff_macro__stack_38c__width_38 buf7_ff ( | |
590 | .scan_in(buf7_ff_scanin), | |
591 | .scan_out(buf7_ff_scanout), | |
592 | .clk(l2clk), | |
593 | .din (buf7_in[37:0]), | |
594 | .en (ibq_buff_clken), | |
595 | .dout (buf7_inst[37:0]), | |
596 | .se(se), | |
597 | .siclk(siclk), | |
598 | .soclk(soclk), | |
599 | .pce_ov(pce_ov), | |
600 | .stop(stop) | |
601 | ); | |
602 | ||
603 | // fixscan start: | |
604 | assign buf0_ff_scanin = scan_in ; | |
605 | assign buf1_ff_scanin = buf0_ff_scanout ; | |
606 | assign buf2_ff_scanin = buf1_ff_scanout ; | |
607 | assign buf3_ff_scanin = buf2_ff_scanout ; | |
608 | assign buf4_ff_scanin = buf3_ff_scanout ; | |
609 | assign buf5_ff_scanin = buf4_ff_scanout ; | |
610 | assign buf6_ff_scanin = buf5_ff_scanout ; | |
611 | assign buf7_ff_scanin = buf6_ff_scanout ; | |
612 | assign scan_out = buf7_ff_scanout ; | |
613 | // fixscan end: | |
614 | // assign se = tcu_scan_en ; | |
615 | endmodule | |
616 | ||
617 | ||
618 | ||
619 | // | |
620 | // buff macro | |
621 | // | |
622 | // | |
623 | ||
624 | ||
625 | ||
626 | ||
627 | ||
628 | module ifu_ibu_ibf_dp_buff_macro__dbuff_32x__stack_none__width_4 ( | |
629 | din, | |
630 | dout); | |
631 | input [3:0] din; | |
632 | output [3:0] dout; | |
633 | ||
634 | ||
635 | ||
636 | ||
637 | ||
638 | ||
639 | buff #(4) d0_0 ( | |
640 | .in(din[3:0]), | |
641 | .out(dout[3:0]) | |
642 | ); | |
643 | ||
644 | ||
645 | ||
646 | ||
647 | ||
648 | ||
649 | ||
650 | ||
651 | endmodule | |
652 | ||
653 | ||
654 | ||
655 | ||
656 | ||
657 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
658 | // also for pass-gate with decoder | |
659 | ||
660 | ||
661 | ||
662 | ||
663 | ||
664 | // any PARAMS parms go into naming of macro | |
665 | ||
666 | module ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_7__stack_38c__width_38 ( | |
667 | din0, | |
668 | sel0, | |
669 | din1, | |
670 | sel1, | |
671 | din2, | |
672 | sel2, | |
673 | din3, | |
674 | sel3, | |
675 | din4, | |
676 | sel4, | |
677 | din5, | |
678 | sel5, | |
679 | din6, | |
680 | sel6, | |
681 | dout); | |
682 | wire buffout0; | |
683 | wire buffout1; | |
684 | wire buffout2; | |
685 | wire buffout3; | |
686 | wire buffout4; | |
687 | wire buffout5; | |
688 | wire buffout6; | |
689 | ||
690 | input [37:0] din0; | |
691 | input sel0; | |
692 | input [37:0] din1; | |
693 | input sel1; | |
694 | input [37:0] din2; | |
695 | input sel2; | |
696 | input [37:0] din3; | |
697 | input sel3; | |
698 | input [37:0] din4; | |
699 | input sel4; | |
700 | input [37:0] din5; | |
701 | input sel5; | |
702 | input [37:0] din6; | |
703 | input sel6; | |
704 | output [37:0] dout; | |
705 | ||
706 | ||
707 | ||
708 | ||
709 | ||
710 | cl_dp1_muxbuff7_8x c0_0 ( | |
711 | .in0(sel0), | |
712 | .in1(sel1), | |
713 | .in2(sel2), | |
714 | .in3(sel3), | |
715 | .in4(sel4), | |
716 | .in5(sel5), | |
717 | .in6(sel6), | |
718 | .out0(buffout0), | |
719 | .out1(buffout1), | |
720 | .out2(buffout2), | |
721 | .out3(buffout3), | |
722 | .out4(buffout4), | |
723 | .out5(buffout5), | |
724 | .out6(buffout6) | |
725 | ); | |
726 | mux7s #(38) d0_0 ( | |
727 | .sel0(buffout0), | |
728 | .sel1(buffout1), | |
729 | .sel2(buffout2), | |
730 | .sel3(buffout3), | |
731 | .sel4(buffout4), | |
732 | .sel5(buffout5), | |
733 | .sel6(buffout6), | |
734 | .in0(din0[37:0]), | |
735 | .in1(din1[37:0]), | |
736 | .in2(din2[37:0]), | |
737 | .in3(din3[37:0]), | |
738 | .in4(din4[37:0]), | |
739 | .in5(din5[37:0]), | |
740 | .in6(din6[37:0]), | |
741 | .dout(dout[37:0]) | |
742 | ); | |
743 | ||
744 | ||
745 | ||
746 | ||
747 | ||
748 | ||
749 | ||
750 | ||
751 | ||
752 | ||
753 | ||
754 | ||
755 | ||
756 | endmodule | |
757 | ||
758 | ||
759 | // | |
760 | // invert macro | |
761 | // | |
762 | // | |
763 | ||
764 | ||
765 | ||
766 | ||
767 | ||
768 | module ifu_ibu_ibf_dp_inv_macro__dinv_12x__width_3 ( | |
769 | din, | |
770 | dout); | |
771 | input [2:0] din; | |
772 | output [2:0] dout; | |
773 | ||
774 | ||
775 | ||
776 | ||
777 | ||
778 | ||
779 | inv #(3) d0_0 ( | |
780 | .in(din[2:0]), | |
781 | .out(dout[2:0]) | |
782 | ); | |
783 | ||
784 | ||
785 | ||
786 | ||
787 | ||
788 | ||
789 | ||
790 | ||
791 | ||
792 | endmodule | |
793 | ||
794 | ||
795 | ||
796 | ||
797 | ||
798 | // | |
799 | // nand macro for ports = 2,3,4 | |
800 | // | |
801 | // | |
802 | ||
803 | ||
804 | ||
805 | ||
806 | ||
807 | module ifu_ibu_ibf_dp_nand_macro__dnand_20x__width_6 ( | |
808 | din0, | |
809 | din1, | |
810 | dout); | |
811 | input [5:0] din0; | |
812 | input [5:0] din1; | |
813 | output [5:0] dout; | |
814 | ||
815 | ||
816 | ||
817 | ||
818 | ||
819 | ||
820 | nand2 #(6) d0_0 ( | |
821 | .in0(din0[5:0]), | |
822 | .in1(din1[5:0]), | |
823 | .out(dout[5:0]) | |
824 | ); | |
825 | ||
826 | ||
827 | ||
828 | ||
829 | ||
830 | ||
831 | ||
832 | ||
833 | ||
834 | endmodule | |
835 | ||
836 | ||
837 | ||
838 | ||
839 | ||
840 | // | |
841 | // nand macro for ports = 2,3,4 | |
842 | // | |
843 | // | |
844 | ||
845 | ||
846 | ||
847 | ||
848 | ||
849 | module ifu_ibu_ibf_dp_nand_macro__dnand_32x__width_6 ( | |
850 | din0, | |
851 | din1, | |
852 | dout); | |
853 | input [5:0] din0; | |
854 | input [5:0] din1; | |
855 | output [5:0] dout; | |
856 | ||
857 | ||
858 | ||
859 | ||
860 | ||
861 | ||
862 | nand2 #(6) d0_0 ( | |
863 | .in0(din0[5:0]), | |
864 | .in1(din1[5:0]), | |
865 | .out(dout[5:0]) | |
866 | ); | |
867 | ||
868 | ||
869 | ||
870 | ||
871 | ||
872 | ||
873 | ||
874 | ||
875 | ||
876 | endmodule | |
877 | ||
878 | ||
879 | ||
880 | ||
881 | ||
882 | // | |
883 | // buff macro | |
884 | // | |
885 | // | |
886 | ||
887 | ||
888 | ||
889 | ||
890 | ||
891 | module ifu_ibu_ibf_dp_buff_macro__dbuff_32x__stack_none__width_1 ( | |
892 | din, | |
893 | dout); | |
894 | input [0:0] din; | |
895 | output [0:0] dout; | |
896 | ||
897 | ||
898 | ||
899 | ||
900 | ||
901 | ||
902 | buff #(1) d0_0 ( | |
903 | .in(din[0:0]), | |
904 | .out(dout[0:0]) | |
905 | ); | |
906 | ||
907 | ||
908 | ||
909 | ||
910 | ||
911 | ||
912 | ||
913 | ||
914 | endmodule | |
915 | ||
916 | ||
917 | ||
918 | ||
919 | ||
920 | // | |
921 | // and macro for ports = 2,3,4 | |
922 | // | |
923 | // | |
924 | ||
925 | ||
926 | ||
927 | ||
928 | ||
929 | module ifu_ibu_ibf_dp_and_macro__dnand_32x__width_5 ( | |
930 | din0, | |
931 | din1, | |
932 | dout); | |
933 | input [4:0] din0; | |
934 | input [4:0] din1; | |
935 | output [4:0] dout; | |
936 | ||
937 | ||
938 | ||
939 | ||
940 | ||
941 | ||
942 | and2 #(5) d0_0 ( | |
943 | .in0(din0[4:0]), | |
944 | .in1(din1[4:0]), | |
945 | .out(dout[4:0]) | |
946 | ); | |
947 | ||
948 | ||
949 | ||
950 | ||
951 | ||
952 | ||
953 | ||
954 | ||
955 | ||
956 | endmodule | |
957 | ||
958 | ||
959 | ||
960 | ||
961 | ||
962 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
963 | // also for pass-gate with decoder | |
964 | ||
965 | ||
966 | ||
967 | ||
968 | ||
969 | // any PARAMS parms go into naming of macro | |
970 | ||
971 | module ifu_ibu_ibf_dp_mux_macro__buffsel_none__mux_aonpe__ports_6__stack_38c__width_38 ( | |
972 | din0, | |
973 | sel0, | |
974 | din1, | |
975 | sel1, | |
976 | din2, | |
977 | sel2, | |
978 | din3, | |
979 | sel3, | |
980 | din4, | |
981 | sel4, | |
982 | din5, | |
983 | sel5, | |
984 | dout); | |
985 | input [37:0] din0; | |
986 | input sel0; | |
987 | input [37:0] din1; | |
988 | input sel1; | |
989 | input [37:0] din2; | |
990 | input sel2; | |
991 | input [37:0] din3; | |
992 | input sel3; | |
993 | input [37:0] din4; | |
994 | input sel4; | |
995 | input [37:0] din5; | |
996 | input sel5; | |
997 | output [37:0] dout; | |
998 | ||
999 | ||
1000 | ||
1001 | ||
1002 | ||
1003 | mux6s #(38) d0_0 ( | |
1004 | .sel0(sel0), | |
1005 | .sel1(sel1), | |
1006 | .sel2(sel2), | |
1007 | .sel3(sel3), | |
1008 | .sel4(sel4), | |
1009 | .sel5(sel5), | |
1010 | .in0(din0[37:0]), | |
1011 | .in1(din1[37:0]), | |
1012 | .in2(din2[37:0]), | |
1013 | .in3(din3[37:0]), | |
1014 | .in4(din4[37:0]), | |
1015 | .in5(din5[37:0]), | |
1016 | .dout(dout[37:0]) | |
1017 | ); | |
1018 | ||
1019 | ||
1020 | ||
1021 | ||
1022 | ||
1023 | ||
1024 | ||
1025 | ||
1026 | ||
1027 | ||
1028 | ||
1029 | ||
1030 | ||
1031 | endmodule | |
1032 | ||
1033 | ||
1034 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
1035 | // also for pass-gate with decoder | |
1036 | ||
1037 | ||
1038 | ||
1039 | ||
1040 | ||
1041 | // any PARAMS parms go into naming of macro | |
1042 | ||
1043 | module ifu_ibu_ibf_dp_mux_macro__mux_aonpe__ports_5__stack_38c__width_38 ( | |
1044 | din0, | |
1045 | sel0, | |
1046 | din1, | |
1047 | sel1, | |
1048 | din2, | |
1049 | sel2, | |
1050 | din3, | |
1051 | sel3, | |
1052 | din4, | |
1053 | sel4, | |
1054 | dout); | |
1055 | wire buffout0; | |
1056 | wire buffout1; | |
1057 | wire buffout2; | |
1058 | wire buffout3; | |
1059 | wire buffout4; | |
1060 | ||
1061 | input [37:0] din0; | |
1062 | input sel0; | |
1063 | input [37:0] din1; | |
1064 | input sel1; | |
1065 | input [37:0] din2; | |
1066 | input sel2; | |
1067 | input [37:0] din3; | |
1068 | input sel3; | |
1069 | input [37:0] din4; | |
1070 | input sel4; | |
1071 | output [37:0] dout; | |
1072 | ||
1073 | ||
1074 | ||
1075 | ||
1076 | ||
1077 | cl_dp1_muxbuff5_8x c0_0 ( | |
1078 | .in0(sel0), | |
1079 | .in1(sel1), | |
1080 | .in2(sel2), | |
1081 | .in3(sel3), | |
1082 | .in4(sel4), | |
1083 | .out0(buffout0), | |
1084 | .out1(buffout1), | |
1085 | .out2(buffout2), | |
1086 | .out3(buffout3), | |
1087 | .out4(buffout4) | |
1088 | ); | |
1089 | mux5s #(38) d0_0 ( | |
1090 | .sel0(buffout0), | |
1091 | .sel1(buffout1), | |
1092 | .sel2(buffout2), | |
1093 | .sel3(buffout3), | |
1094 | .sel4(buffout4), | |
1095 | .in0(din0[37:0]), | |
1096 | .in1(din1[37:0]), | |
1097 | .in2(din2[37:0]), | |
1098 | .in3(din3[37:0]), | |
1099 | .in4(din4[37:0]), | |
1100 | .dout(dout[37:0]) | |
1101 | ); | |
1102 | ||
1103 | ||
1104 | ||
1105 | ||
1106 | ||
1107 | ||
1108 | ||
1109 | ||
1110 | ||
1111 | ||
1112 | ||
1113 | ||
1114 | ||
1115 | endmodule | |
1116 | ||
1117 | ||
1118 | ||
1119 | ||
1120 | ||
1121 | ||
1122 | // any PARAMS parms go into naming of macro | |
1123 | ||
1124 | module ifu_ibu_ibf_dp_msff_macro__dmsff_32x__stack_38c__width_38 ( | |
1125 | din, | |
1126 | clk, | |
1127 | en, | |
1128 | se, | |
1129 | scan_in, | |
1130 | siclk, | |
1131 | soclk, | |
1132 | pce_ov, | |
1133 | stop, | |
1134 | dout, | |
1135 | scan_out); | |
1136 | wire l1clk; | |
1137 | wire siclk_out; | |
1138 | wire soclk_out; | |
1139 | wire [36:0] so; | |
1140 | ||
1141 | input [37:0] din; | |
1142 | ||
1143 | ||
1144 | input clk; | |
1145 | input en; | |
1146 | input se; | |
1147 | input scan_in; | |
1148 | input siclk; | |
1149 | input soclk; | |
1150 | input pce_ov; | |
1151 | input stop; | |
1152 | ||
1153 | ||
1154 | ||
1155 | output [37:0] dout; | |
1156 | ||
1157 | ||
1158 | output scan_out; | |
1159 | ||
1160 | ||
1161 | ||
1162 | ||
1163 | cl_dp1_l1hdr_8x c0_0 ( | |
1164 | .l2clk(clk), | |
1165 | .pce(en), | |
1166 | .aclk(siclk), | |
1167 | .bclk(soclk), | |
1168 | .l1clk(l1clk), | |
1169 | .se(se), | |
1170 | .pce_ov(pce_ov), | |
1171 | .stop(stop), | |
1172 | .siclk_out(siclk_out), | |
1173 | .soclk_out(soclk_out) | |
1174 | ); | |
1175 | dff #(38) d0_0 ( | |
1176 | .l1clk(l1clk), | |
1177 | .siclk(siclk_out), | |
1178 | .soclk(soclk_out), | |
1179 | .d(din[37:0]), | |
1180 | .si({scan_in,so[36:0]}), | |
1181 | .so({so[36:0],scan_out}), | |
1182 | .q(dout[37:0]) | |
1183 | ); | |
1184 | ||
1185 | ||
1186 | ||
1187 | ||
1188 | ||
1189 | ||
1190 | ||
1191 | ||
1192 | ||
1193 | ||
1194 | ||
1195 | ||
1196 | ||
1197 | ||
1198 | ||
1199 | ||
1200 | ||
1201 | ||
1202 | ||
1203 | ||
1204 | endmodule | |
1205 | ||
1206 | ||
1207 | ||
1208 | ||
1209 | ||
1210 | ||
1211 | ||
1212 | ||
1213 | ||
1214 | ||
1215 | ||
1216 | ||
1217 | ||
1218 | // any PARAMS parms go into naming of macro | |
1219 | ||
1220 | module ifu_ibu_ibf_dp_msff_macro__stack_38c__width_38 ( | |
1221 | din, | |
1222 | clk, | |
1223 | en, | |
1224 | se, | |
1225 | scan_in, | |
1226 | siclk, | |
1227 | soclk, | |
1228 | pce_ov, | |
1229 | stop, | |
1230 | dout, | |
1231 | scan_out); | |
1232 | wire l1clk; | |
1233 | wire siclk_out; | |
1234 | wire soclk_out; | |
1235 | wire [36:0] so; | |
1236 | ||
1237 | input [37:0] din; | |
1238 | ||
1239 | ||
1240 | input clk; | |
1241 | input en; | |
1242 | input se; | |
1243 | input scan_in; | |
1244 | input siclk; | |
1245 | input soclk; | |
1246 | input pce_ov; | |
1247 | input stop; | |
1248 | ||
1249 | ||
1250 | ||
1251 | output [37:0] dout; | |
1252 | ||
1253 | ||
1254 | output scan_out; | |
1255 | ||
1256 | ||
1257 | ||
1258 | ||
1259 | cl_dp1_l1hdr_8x c0_0 ( | |
1260 | .l2clk(clk), | |
1261 | .pce(en), | |
1262 | .aclk(siclk), | |
1263 | .bclk(soclk), | |
1264 | .l1clk(l1clk), | |
1265 | .se(se), | |
1266 | .pce_ov(pce_ov), | |
1267 | .stop(stop), | |
1268 | .siclk_out(siclk_out), | |
1269 | .soclk_out(soclk_out) | |
1270 | ); | |
1271 | dff #(38) d0_0 ( | |
1272 | .l1clk(l1clk), | |
1273 | .siclk(siclk_out), | |
1274 | .soclk(soclk_out), | |
1275 | .d(din[37:0]), | |
1276 | .si({scan_in,so[36:0]}), | |
1277 | .so({so[36:0],scan_out}), | |
1278 | .q(dout[37:0]) | |
1279 | ); | |
1280 | ||
1281 | ||
1282 | ||
1283 | ||
1284 | ||
1285 | ||
1286 | ||
1287 | ||
1288 | ||
1289 | ||
1290 | ||
1291 | ||
1292 | ||
1293 | ||
1294 | ||
1295 | ||
1296 | ||
1297 | ||
1298 | ||
1299 | ||
1300 | endmodule | |
1301 | ||
1302 | ||
1303 | ||
1304 | ||
1305 | ||
1306 | ||
1307 | ||
1308 |