projects / OpenSPARC-T2-DV / blame
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| 86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: lsu_cid_dp.v | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | module lsu_cid_dp ( | |
| 36 | cpq_rdata, | |
| 37 | cpx_spc_data_cx, | |
| 38 | cic_byp_sel, | |
| 39 | cic_d1_sel, | |
| 40 | cic_cpq_sel, | |
| 41 | cic_fifo_sel, | |
| 42 | cic_fifo_clken, | |
| 43 | cid_fill_data_e, | |
| 44 | cid_l2miss, | |
| 45 | cid_pkt_type, | |
| 46 | cid_tid, | |
| 47 | cid_tid_unbuf, | |
| 48 | cid_cpuid, | |
| 49 | cid_st_data_sel, | |
| 50 | cid_xinval, | |
| 51 | cid_pref, | |
| 52 | cid_err, | |
| 53 | cid_xway, | |
| 54 | cid_st_addr, | |
| 55 | cid_st_vector, | |
| 56 | cid_st_bmask, | |
| 57 | cid_st_way, | |
| 58 | cid_inv_vec, | |
| 59 | cid_inv_index, | |
| 60 | cid_ncache, | |
| 61 | cid_atomic, | |
| 62 | cid_atomic_unbuf, | |
| 63 | cid_rmo_ack, | |
| 64 | cid_set_inval, | |
| 65 | cid_set_icinval, | |
| 66 | cid_cpq_wdata, | |
| 67 | cid_dcsoc_err_e, | |
| 68 | cid_d1_rtntyp, | |
| 69 | cid_d1_tid, | |
| 70 | cid_d1_cpuid, | |
| 71 | cid_d1_wv, | |
| 72 | cid_d1_rmo, | |
| 73 | cid_d1_pref, | |
| 74 | cid_d1_inval, | |
| 75 | cid_cpq_cmp_1, | |
| 76 | cid_cpq_cmp_2, | |
| 77 | cid_cpq_cmp_3, | |
| 78 | lsu_cpx_data, | |
| 79 | lsu_cpx_cpkt, | |
| 80 | lsu_cpx_valid, | |
| 81 | l2clk, | |
| 82 | scan_in, | |
| 83 | tcu_pce_ov, | |
| 84 | tcu_scan_en, | |
| 85 | tcu_se_scancollar_out, | |
| 86 | spc_aclk, | |
| 87 | spc_bclk, | |
| 88 | scan_out, | |
| 89 | const_cpuid, | |
| 90 | mbi_run, | |
| 91 | mbi_wdata, | |
| 92 | bist_wdata_1, | |
| 93 | bist_cmpsel_2); | |
| 94 | wire stop; | |
| 95 | wire se; | |
| 96 | wire pce_ov; | |
| 97 | wire siclk; | |
| 98 | wire soclk; | |
| 99 | wire [145:0] in_data; | |
| 100 | wire dff_d1_0_scanin; | |
| 101 | wire dff_d1_0_scanout; | |
| 102 | wire [145:0] data_d1; | |
| 103 | wire dff_d1_1_scanin; | |
| 104 | wire dff_d1_1_scanout; | |
| 105 | wire dff_d1_2_scanin; | |
| 106 | wire dff_d1_2_scanout; | |
| 107 | wire dff_d1_3_scanin; | |
| 108 | wire dff_d1_3_scanout; | |
| 109 | wire [145:0] cpq_read_data; | |
| 110 | wire dff_fifo_0_scanin; | |
| 111 | wire dff_fifo_0_scanout; | |
| 112 | wire [145:0] fifo_data; | |
| 113 | wire dff_fifo_1_scanin; | |
| 114 | wire dff_fifo_1_scanout; | |
| 115 | wire dff_fifo_2_scanin; | |
| 116 | wire dff_fifo_2_scanout; | |
| 117 | wire dff_fifo_3_scanin; | |
| 118 | wire dff_fifo_3_scanout; | |
| 119 | wire [145:0] cpq_mx_data; | |
| 120 | wire dff_out_0_scanin; | |
| 121 | wire dff_out_0_scanout; | |
| 122 | wire [145:0] cpq_data_out; | |
| 123 | wire dff_out_1_scanin; | |
| 124 | wire dff_out_1_scanout; | |
| 125 | wire dff_out_2_scanin; | |
| 126 | wire dff_out_2_scanout; | |
| 127 | wire dff_out_3_scanin; | |
| 128 | wire dff_out_3_scanout; | |
| 129 | wire [3:0] buf_unused; | |
| 130 | wire [144:129] cid_pkt_data_e; | |
| 131 | wire cid_pkt_unused; | |
| 132 | wire [1:1] cid_unused; | |
| 133 | wire [17:0] inv_vec; | |
| 134 | wire dff_cmp_data_scanin; | |
| 135 | wire dff_cmp_data_scanout; | |
| 136 | wire [7:0] bist_cmp_data; | |
| 137 | wire [72:0] fifo_cmp_data; | |
| 138 | ||
| 139 | ||
| 140 | input [145:0] cpq_rdata; // Read data from CPQ | |
| 141 | input [145:0] cpx_spc_data_cx; // CPX packet | |
| 142 | ||
| 143 | input cic_byp_sel; | |
| 144 | input cic_d1_sel; | |
| 145 | input cic_cpq_sel; | |
| 146 | input cic_fifo_sel; | |
| 147 | input cic_fifo_clken; | |
| 148 | ||
| 149 | output [127:0] cid_fill_data_e; // Fill data for dcache | |
| 150 | output cid_l2miss; | |
| 151 | output [4:0] cid_pkt_type; | |
| 152 | output [2:0] cid_tid; | |
| 153 | output [2:0] cid_tid_unbuf; | |
| 154 | output [2:0] cid_cpuid; | |
| 155 | output cid_st_data_sel; | |
| 156 | output cid_xinval; | |
| 157 | output cid_pref; | |
| 158 | output [1:0] cid_err; | |
| 159 | output [1:0] cid_xway; | |
| 160 | output [10:3] cid_st_addr; // Store update address | |
| 161 | output [15:0] cid_st_vector; // Store invalidate vector | |
| 162 | output [7:0] cid_st_bmask; // Store byte mask | |
| 163 | output [1:0] cid_st_way; // Dcache way to which store data gets written | |
| 164 | output [17:0] cid_inv_vec; // Invalidation data | |
| 165 | output [10:6] cid_inv_index; // Cache index for invalidation | |
| 166 | output cid_ncache; | |
| 167 | output cid_atomic; | |
| 168 | output cid_atomic_unbuf; | |
| 169 | output cid_rmo_ack; | |
| 170 | output cid_set_inval; | |
| 171 | output cid_set_icinval; | |
| 172 | output [145:0] cid_cpq_wdata; | |
| 173 | output cid_dcsoc_err_e; | |
| 174 | ||
| 175 | output [4:0] cid_d1_rtntyp; | |
| 176 | output [2:0] cid_d1_tid; | |
| 177 | output [2:0] cid_d1_cpuid; | |
| 178 | output cid_d1_wv; | |
| 179 | output cid_d1_rmo; | |
| 180 | output cid_d1_pref; | |
| 181 | output [1:0] cid_d1_inval; | |
| 182 | ||
| 183 | output cid_cpq_cmp_1; | |
| 184 | output cid_cpq_cmp_2; | |
| 185 | output cid_cpq_cmp_3; | |
| 186 | ||
| 187 | // Flopped versions to IFU | |
| 188 | output [127:0] lsu_cpx_data; | |
| 189 | output [17:0] lsu_cpx_cpkt; | |
| 190 | output lsu_cpx_valid; | |
| 191 | ||
| 192 | // Globals | |
| 193 | input l2clk; | |
| 194 | input scan_in; | |
| 195 | input tcu_pce_ov; // scan signals | |
| 196 | input tcu_scan_en; | |
| 197 | input tcu_se_scancollar_out; | |
| 198 | input spc_aclk; | |
| 199 | input spc_bclk; | |
| 200 | output scan_out; | |
| 201 | ||
| 202 | input [2:0] const_cpuid; | |
| 203 | ||
| 204 | ||
| 205 | // BIST | |
| 206 | input mbi_run; | |
| 207 | input [7:0] mbi_wdata; | |
| 208 | input [7:0] bist_wdata_1; | |
| 209 | input bist_cmpsel_2; | |
| 210 | ||
| 211 | // scan renames | |
| 212 | assign stop = 1'b0; | |
| 213 | // end scan | |
| 214 | ||
| 215 | lsu_cid_dp_buff_macro__dbuff_32x__rep_1__stack_none__width_4 test_rep0 ( | |
| 216 | .din ({tcu_scan_en,tcu_pce_ov,spc_aclk,spc_bclk}), | |
| 217 | .dout({se,pce_ov,siclk,soclk}) | |
| 218 | ); | |
| 219 | ||
| 220 | assign in_data[145:0] = cpx_spc_data_cx[145:0]; | |
| 221 | ||
| 222 | lsu_cid_dp_msff_macro__stack_64c__width_64 dff_d1_0 ( | |
| 223 | .scan_in(dff_d1_0_scanin), | |
| 224 | .scan_out(dff_d1_0_scanout), | |
| 225 | .clk (l2clk), | |
| 226 | .en (1'b1), | |
| 227 | .se (tcu_se_scancollar_out), | |
| 228 | .din (in_data[63:0]), | |
| 229 | .dout (data_d1[63:0]), | |
| 230 | .siclk(siclk), | |
| 231 | .soclk(soclk), | |
| 232 | .pce_ov(pce_ov), | |
| 233 | .stop(stop) | |
| 234 | ); | |
| 235 | lsu_cid_dp_msff_macro__stack_64c__width_64 dff_d1_1 ( | |
| 236 | .scan_in(dff_d1_1_scanin), | |
| 237 | .scan_out(dff_d1_1_scanout), | |
| 238 | .clk (l2clk), | |
| 239 | .en (1'b1), | |
| 240 | .se (tcu_se_scancollar_out), | |
| 241 | .din (in_data[127:64]), | |
| 242 | .dout (data_d1[127:64]), | |
| 243 | .siclk(siclk), | |
| 244 | .soclk(soclk), | |
| 245 | .pce_ov(pce_ov), | |
| 246 | .stop(stop) | |
| 247 | ); | |
| 248 | lsu_cid_dp_msff_macro__stack_10l__width_9 dff_d1_2 ( | |
| 249 | .scan_in(dff_d1_2_scanin), | |
| 250 | .scan_out(dff_d1_2_scanout), | |
| 251 | .clk (l2clk), | |
| 252 | .en (1'b1), | |
| 253 | .se (tcu_se_scancollar_out), | |
| 254 | .din ({in_data[128],in_data[130],in_data[132],in_data[134],in_data[136],in_data[138], | |
| 255 | in_data[140],in_data[142],in_data[144]}), | |
| 256 | .dout ({data_d1[128],data_d1[130],data_d1[132],data_d1[134],data_d1[136],data_d1[138], | |
| 257 | data_d1[140],data_d1[142],data_d1[144]}), | |
| 258 | .siclk(siclk), | |
| 259 | .soclk(soclk), | |
| 260 | .pce_ov(pce_ov), | |
| 261 | .stop(stop) | |
| 262 | ); | |
| 263 | lsu_cid_dp_msff_macro__stack_10l__width_9 dff_d1_3 ( | |
| 264 | .scan_in(dff_d1_3_scanin), | |
| 265 | .scan_out(dff_d1_3_scanout), | |
| 266 | .clk (l2clk), | |
| 267 | .en (1'b1), | |
| 268 | .se (tcu_se_scancollar_out), | |
| 269 | .din ({in_data[129],in_data[131],in_data[133],in_data[135],in_data[137],in_data[139], | |
| 270 | in_data[141],in_data[143],in_data[145]}), | |
| 271 | .dout ({data_d1[129],data_d1[131],data_d1[133],data_d1[135],data_d1[137],data_d1[139], | |
| 272 | data_d1[141],data_d1[143],data_d1[145]}), | |
| 273 | .siclk(siclk), | |
| 274 | .soclk(soclk), | |
| 275 | .pce_ov(pce_ov), | |
| 276 | .stop(stop) | |
| 277 | ); | |
| 278 | ||
| 279 | assign cid_d1_rtntyp[4:0] = data_d1[145:141]; | |
| 280 | assign cid_d1_tid[2:0] = data_d1[136:134]; | |
| 281 | assign cid_d1_wv = data_d1[133]; | |
| 282 | assign cid_d1_pref = data_d1[128]; | |
| 283 | assign cid_d1_rmo = lsu_cpx_data[125]; | |
| 284 | assign cid_d1_cpuid[2:0] = lsu_cpx_data[120:118]; | |
| 285 | assign cid_d1_inval[1:0] = lsu_cpx_data[124:123]; | |
| 286 | ||
| 287 | lsu_cid_dp_buff_macro__stack_64c__width_64 d1_data_buf_0 ( | |
| 288 | .din (data_d1[63:0]), | |
| 289 | .dout (lsu_cpx_data[63:0]) | |
| 290 | ); | |
| 291 | lsu_cid_dp_buff_macro__stack_64c__width_64 d1_data_buf_1 ( | |
| 292 | .din (data_d1[127:64]), | |
| 293 | .dout (lsu_cpx_data[127:64]) | |
| 294 | ); | |
| 295 | lsu_cid_dp_buff_macro__stack_10l__width_9 d1_data_buf_2 ( | |
| 296 | .din ({data_d1[128], data_d1[130], data_d1[132], data_d1[134], data_d1[136], | |
| 297 | data_d1[138], data_d1[140], data_d1[142], data_d1[144]}), | |
| 298 | .dout ({lsu_cpx_cpkt[0],lsu_cpx_cpkt[2],lsu_cpx_cpkt[4],lsu_cpx_cpkt[6],lsu_cpx_cpkt[8], | |
| 299 | lsu_cpx_cpkt[10],lsu_cpx_cpkt[12],lsu_cpx_cpkt[15],lsu_cpx_cpkt[17]}) | |
| 300 | ); | |
| 301 | lsu_cid_dp_buff_macro__stack_10l__width_9 d1_data_buf_3 ( | |
| 302 | .din ({data_d1[129], data_d1[131], data_d1[133], data_d1[135], | |
| 303 | data_d1[137], data_d1[139], data_d1[141], data_d1[143], data_d1[145]}), | |
| 304 | .dout ({lsu_cpx_cpkt[1],lsu_cpx_cpkt[3],lsu_cpx_cpkt[5],lsu_cpx_cpkt[7], | |
| 305 | lsu_cpx_cpkt[9],lsu_cpx_cpkt[11],lsu_cpx_cpkt[14],lsu_cpx_cpkt[16],lsu_cpx_valid}) | |
| 306 | ); | |
| 307 | assign lsu_cpx_cpkt[13] = 1'b0; | |
| 308 | ||
| 309 | lsu_cid_dp_buff_macro__dbuff_4x__minbuff_1__stack_64c__width_64 cpq_data_buf_0 ( | |
| 310 | .din (cpq_rdata[63:0]), | |
| 311 | .dout (cpq_read_data[63:0]) | |
| 312 | ); | |
| 313 | lsu_cid_dp_buff_macro__dbuff_4x__minbuff_1__stack_64c__width_64 cpq_data_buf_1 ( | |
| 314 | .din (cpq_rdata[127:64]), | |
| 315 | .dout (cpq_read_data[127:64]) | |
| 316 | ); | |
| 317 | lsu_cid_dp_buff_macro__dbuff_4x__minbuff_1__stack_10l__width_9 cpq_data_buf_2 ( | |
| 318 | .din ({cpq_rdata[128],cpq_rdata[130],cpq_rdata[132],cpq_rdata[134],cpq_rdata[136],cpq_rdata[138], | |
| 319 | cpq_rdata[140],cpq_rdata[142],cpq_rdata[144]}), | |
| 320 | .dout ({cpq_read_data[128],cpq_read_data[130],cpq_read_data[132],cpq_read_data[134],cpq_read_data[136],cpq_read_data[138], | |
| 321 | cpq_read_data[140],cpq_read_data[142],cpq_read_data[144]}) | |
| 322 | ); | |
| 323 | lsu_cid_dp_buff_macro__dbuff_4x__minbuff_1__stack_10l__width_9 cpq_data_buf_3 ( | |
| 324 | .din ({cpq_rdata[129],cpq_rdata[131],cpq_rdata[133],cpq_rdata[135],cpq_rdata[137],cpq_rdata[139], | |
| 325 | cpq_rdata[141],cpq_rdata[143],cpq_rdata[145]}), | |
| 326 | .dout ({cpq_read_data[129],cpq_read_data[131],cpq_read_data[133],cpq_read_data[135],cpq_read_data[137],cpq_read_data[139], | |
| 327 | cpq_read_data[141],cpq_read_data[143],cpq_read_data[145]}) | |
| 328 | ); | |
| 329 | ||
| 330 | lsu_cid_dp_msff_macro__stack_64c__width_64 dff_fifo_0 ( | |
| 331 | .scan_in(dff_fifo_0_scanin), | |
| 332 | .scan_out(dff_fifo_0_scanout), | |
| 333 | .se (tcu_se_scancollar_out), | |
| 334 | .clk (l2clk), | |
| 335 | .en (cic_fifo_clken), | |
| 336 | .din (cpq_read_data[63:0]), | |
| 337 | .dout (fifo_data[63:0]), | |
| 338 | .siclk(siclk), | |
| 339 | .soclk(soclk), | |
| 340 | .pce_ov(pce_ov), | |
| 341 | .stop(stop) | |
| 342 | ); | |
| 343 | lsu_cid_dp_msff_macro__stack_64c__width_64 dff_fifo_1 ( | |
| 344 | .scan_in(dff_fifo_1_scanin), | |
| 345 | .scan_out(dff_fifo_1_scanout), | |
| 346 | .se (tcu_se_scancollar_out), | |
| 347 | .clk (l2clk), | |
| 348 | .en (cic_fifo_clken), | |
| 349 | .din (cpq_read_data[127:64]), | |
| 350 | .dout (fifo_data[127:64]), | |
| 351 | .siclk(siclk), | |
| 352 | .soclk(soclk), | |
| 353 | .pce_ov(pce_ov), | |
| 354 | .stop(stop) | |
| 355 | ); | |
| 356 | lsu_cid_dp_msff_macro__stack_10l__width_9 dff_fifo_2 ( | |
| 357 | .scan_in(dff_fifo_2_scanin), | |
| 358 | .scan_out(dff_fifo_2_scanout), | |
| 359 | .se (tcu_se_scancollar_out), | |
| 360 | .clk (l2clk), | |
| 361 | .en (cic_fifo_clken), | |
| 362 | .din ({cpq_read_data[128],cpq_read_data[130],cpq_read_data[132],cpq_read_data[134],cpq_read_data[136],cpq_read_data[138], | |
| 363 | cpq_read_data[140],cpq_read_data[142],cpq_read_data[144]}), | |
| 364 | .dout ({fifo_data[128],fifo_data[130],fifo_data[132],fifo_data[134],fifo_data[136],fifo_data[138], | |
| 365 | fifo_data[140],fifo_data[142],fifo_data[144]}), | |
| 366 | .siclk(siclk), | |
| 367 | .soclk(soclk), | |
| 368 | .pce_ov(pce_ov), | |
| 369 | .stop(stop) | |
| 370 | ); | |
| 371 | lsu_cid_dp_msff_macro__stack_10l__width_9 dff_fifo_3 ( | |
| 372 | .scan_in(dff_fifo_3_scanin), | |
| 373 | .scan_out(dff_fifo_3_scanout), | |
| 374 | .se (tcu_se_scancollar_out), | |
| 375 | .clk (l2clk), | |
| 376 | .en (cic_fifo_clken), | |
| 377 | .din ({cpq_read_data[129],cpq_read_data[131],cpq_read_data[133],cpq_read_data[135],cpq_read_data[137],cpq_read_data[139], | |
| 378 | cpq_read_data[141],cpq_read_data[143],cpq_read_data[145]}), | |
| 379 | .dout ({fifo_data[129],fifo_data[131],fifo_data[133],fifo_data[135],fifo_data[137],fifo_data[139], | |
| 380 | fifo_data[141],fifo_data[143],fifo_data[145]}), | |
| 381 | .siclk(siclk), | |
| 382 | .soclk(soclk), | |
| 383 | .pce_ov(pce_ov), | |
| 384 | .stop(stop) | |
| 385 | ); | |
| 386 | ||
| 387 | lsu_cid_dp_mux_macro__mux_aonpe__ports_4__stack_64c__width_64 cpq_mx_0 ( | |
| 388 | .din0 (fifo_data[63:0]), | |
| 389 | .din1 (cpq_read_data[63:0]), | |
| 390 | .din2 (data_d1[63:0]), | |
| 391 | .din3 (in_data[63:0]), | |
| 392 | .sel0 (cic_fifo_sel), | |
| 393 | .sel1 (cic_cpq_sel), | |
| 394 | .sel2 (cic_d1_sel), | |
| 395 | .sel3 (cic_byp_sel), | |
| 396 | .dout (cpq_mx_data[63:0]) | |
| 397 | ); | |
| 398 | lsu_cid_dp_mux_macro__mux_aonpe__ports_4__stack_64c__width_64 cpq_mx_1 ( | |
| 399 | .din0 (fifo_data[127:64]), | |
| 400 | .din1 (cpq_read_data[127:64]), | |
| 401 | .din2 (data_d1[127:64]), | |
| 402 | .din3 (in_data[127:64]), | |
| 403 | .sel0 (cic_fifo_sel), | |
| 404 | .sel1 (cic_cpq_sel), | |
| 405 | .sel2 (cic_d1_sel), | |
| 406 | .sel3 (cic_byp_sel), | |
| 407 | .dout (cpq_mx_data[127:64]) | |
| 408 | ); | |
| 409 | lsu_cid_dp_mux_macro__mux_aonpe__ports_4__stack_10l__width_9 cpq_mx_2 ( | |
| 410 | .din0 ({fifo_data[128],fifo_data[130],fifo_data[132],fifo_data[134],fifo_data[136],fifo_data[138], | |
| 411 | fifo_data[140],fifo_data[142],fifo_data[144]}), | |
| 412 | .din1 ({cpq_read_data[128],cpq_read_data[130],cpq_read_data[132],cpq_read_data[134],cpq_read_data[136],cpq_read_data[138], | |
| 413 | cpq_read_data[140],cpq_read_data[142],cpq_read_data[144]}), | |
| 414 | .din2 ({data_d1[128],data_d1[130],data_d1[132],data_d1[134],data_d1[136],data_d1[138], | |
| 415 | data_d1[140],data_d1[142],data_d1[144]}), | |
| 416 | .din3 ({in_data[128],in_data[130],in_data[132],in_data[134],in_data[136],in_data[138], | |
| 417 | in_data[140],in_data[142],in_data[144]}), | |
| 418 | .sel0 (cic_fifo_sel), | |
| 419 | .sel1 (cic_cpq_sel), | |
| 420 | .sel2 (cic_d1_sel), | |
| 421 | .sel3 (cic_byp_sel), | |
| 422 | .dout ({cpq_mx_data[128],cpq_mx_data[130],cpq_mx_data[132],cpq_mx_data[134],cpq_mx_data[136],cpq_mx_data[138], | |
| 423 | cpq_mx_data[140],cpq_mx_data[142],cpq_mx_data[144]}) | |
| 424 | ); | |
| 425 | lsu_cid_dp_mux_macro__mux_aonpe__ports_4__stack_10l__width_9 cpq_mx_3 ( | |
| 426 | .din0 ({fifo_data[129],fifo_data[131],fifo_data[133],fifo_data[135],fifo_data[137],fifo_data[139], | |
| 427 | fifo_data[141],fifo_data[143],fifo_data[145]}), | |
| 428 | .din1 ({cpq_read_data[129],cpq_read_data[131],cpq_read_data[133],cpq_read_data[135],cpq_read_data[137],cpq_read_data[139], | |
| 429 | cpq_read_data[141],cpq_read_data[143],cpq_read_data[145]}), | |
| 430 | .din2 ({data_d1[129],data_d1[131],data_d1[133],data_d1[135],data_d1[137],data_d1[139], | |
| 431 | data_d1[141],data_d1[143],data_d1[145]}), | |
| 432 | .din3 ({in_data[129],in_data[131],in_data[133],in_data[135],in_data[137],in_data[139], | |
| 433 | in_data[141],in_data[143],in_data[145]}), | |
| 434 | .sel0 (cic_fifo_sel), | |
| 435 | .sel1 (cic_cpq_sel), | |
| 436 | .sel2 (cic_d1_sel), | |
| 437 | .sel3 (cic_byp_sel), | |
| 438 | .dout ({cpq_mx_data[129],cpq_mx_data[131],cpq_mx_data[133],cpq_mx_data[135],cpq_mx_data[137],cpq_mx_data[139], | |
| 439 | cpq_mx_data[141],cpq_mx_data[143],cpq_mx_data[145]}) | |
| 440 | ); | |
| 441 | ||
| 442 | lsu_cid_dp_msff_macro__stack_64c__width_64 dff_out_0 ( | |
| 443 | .scan_in(dff_out_0_scanin), | |
| 444 | .scan_out(dff_out_0_scanout), | |
| 445 | .se (tcu_se_scancollar_out), | |
| 446 | .clk (l2clk), | |
| 447 | .en (1'b1), // should have PM here, but need enough time to see incoming packet | |
| 448 | .din (cpq_mx_data[63:0]), | |
| 449 | .dout (cpq_data_out[63:0]), | |
| 450 | .siclk(siclk), | |
| 451 | .soclk(soclk), | |
| 452 | .pce_ov(pce_ov), | |
| 453 | .stop(stop) | |
| 454 | ); | |
| 455 | lsu_cid_dp_msff_macro__stack_64c__width_64 dff_out_1 ( | |
| 456 | .scan_in(dff_out_1_scanin), | |
| 457 | .scan_out(dff_out_1_scanout), | |
| 458 | .se (tcu_se_scancollar_out), | |
| 459 | .clk (l2clk), | |
| 460 | .en (1'b1), | |
| 461 | .din (cpq_mx_data[127:64]), | |
| 462 | .dout (cpq_data_out[127:64]), | |
| 463 | .siclk(siclk), | |
| 464 | .soclk(soclk), | |
| 465 | .pce_ov(pce_ov), | |
| 466 | .stop(stop) | |
| 467 | ); | |
| 468 | lsu_cid_dp_msff_macro__stack_10l__width_9 dff_out_2 ( | |
| 469 | .scan_in(dff_out_2_scanin), | |
| 470 | .scan_out(dff_out_2_scanout), | |
| 471 | .se (tcu_se_scancollar_out), | |
| 472 | .clk (l2clk), | |
| 473 | .en (1'b1), | |
| 474 | .din ({cpq_mx_data[128],cpq_mx_data[130],cpq_mx_data[132],cpq_mx_data[134],cpq_mx_data[136],cpq_mx_data[138], | |
| 475 | cpq_mx_data[140],cpq_mx_data[142],cpq_mx_data[144]}), | |
| 476 | .dout ({cpq_data_out[128],cpq_data_out[130],cpq_data_out[132],cpq_data_out[134],cpq_data_out[136],cpq_data_out[138], | |
| 477 | cpq_data_out[140],cpq_data_out[142],cpq_data_out[144]}), | |
| 478 | .siclk(siclk), | |
| 479 | .soclk(soclk), | |
| 480 | .pce_ov(pce_ov), | |
| 481 | .stop(stop) | |
| 482 | ); | |
| 483 | lsu_cid_dp_msff_macro__stack_10l__width_10 dff_out_3 ( | |
| 484 | .scan_in(dff_out_3_scanin), | |
| 485 | .scan_out(dff_out_3_scanout), | |
| 486 | .se (tcu_se_scancollar_out), | |
| 487 | .clk (l2clk), | |
| 488 | .en (1'b1), | |
| 489 | .din ({cpq_mx_data[143],cpq_mx_data[129],cpq_mx_data[131],cpq_mx_data[133],cpq_mx_data[135],cpq_mx_data[137], | |
| 490 | cpq_mx_data[139],cpq_mx_data[141],cpq_mx_data[143],cpq_mx_data[145]}), | |
| 491 | .dout ({cid_st_data_sel, cpq_data_out[129],cpq_data_out[131],cpq_data_out[133],cpq_data_out[135],cpq_data_out[137], | |
| 492 | cpq_data_out[139],cpq_data_out[141],cpq_data_out[143],cpq_data_out[145]}), | |
| 493 | .siclk(siclk), | |
| 494 | .soclk(soclk), | |
| 495 | .pce_ov(pce_ov), | |
| 496 | .stop(stop) | |
| 497 | ); | |
| 498 | ||
| 499 | assign cid_tid_unbuf[2:0] = cpq_data_out[136:134]; | |
| 500 | assign cid_pref = cpq_data_out[128]; | |
| 501 | assign cid_pkt_type[4:0] = cpq_data_out[145:141]; | |
| 502 | assign cid_atomic_unbuf = cpq_data_out[129]; | |
| 503 | ||
| 504 | lsu_cid_dp_buff_macro__dbuff_16x__rep_1__stack_64c__width_64 fill_data_buf_0 ( | |
| 505 | .din (cpq_data_out[63:0]), | |
| 506 | .dout (cid_fill_data_e[63:0]) | |
| 507 | ); | |
| 508 | lsu_cid_dp_buff_macro__dbuff_16x__rep_1__stack_64c__width_64 fill_data_buf_1 ( | |
| 509 | .din (cpq_data_out[127:64]), | |
| 510 | .dout (cid_fill_data_e[127:64]) | |
| 511 | ); | |
| 512 | lsu_cid_dp_buff_macro__rep_1__stack_10l__width_9 fill_data_buf_2 ( | |
| 513 | .din ({1'b0, cpq_data_out[130], cpq_data_out[132], cpq_data_out[134], cpq_data_out[136], | |
| 514 | cpq_data_out[138], cpq_data_out[140], 1'b0, cpq_data_out[144]}), | |
| 515 | .dout ({buf_unused[0],cid_pkt_data_e[130],cid_pkt_data_e[132],cid_pkt_data_e[134],cid_pkt_data_e[136], | |
| 516 | cid_pkt_data_e[138],cid_pkt_data_e[140],buf_unused[1],cid_pkt_data_e[144]}) | |
| 517 | ); | |
| 518 | lsu_cid_dp_buff_macro__rep_1__stack_10l__width_9 fill_data_buf_3 ( | |
| 519 | .din ({cpq_data_out[129], cpq_data_out[131], cpq_data_out[133], cpq_data_out[135], | |
| 520 | cpq_data_out[137], cpq_data_out[139], 1'b0, cpq_data_out[143], 1'b0}), | |
| 521 | .dout ({cid_pkt_data_e[129],cid_pkt_data_e[131],cid_pkt_data_e[133],cid_pkt_data_e[135], | |
| 522 | cid_pkt_data_e[137],cid_pkt_data_e[139],buf_unused[2],cid_pkt_data_e[143],buf_unused[3]}) | |
| 523 | ); | |
| 524 | ||
| 525 | lsu_cid_dp_buff_macro__width_3 misc_data_buf ( | |
| 526 | .din (cpq_data_out[120:118]), | |
| 527 | .dout (cid_cpuid[2:0]) | |
| 528 | ); | |
| 529 | ||
| 530 | assign cid_rmo_ack = cid_fill_data_e[125]; | |
| 531 | assign cid_set_icinval = cid_fill_data_e[124]; | |
| 532 | assign cid_set_inval = cid_fill_data_e[123]; | |
| 533 | assign cid_st_addr[5:4] = cid_fill_data_e[122:121]; | |
| 534 | assign cid_st_addr[10:6] = cid_fill_data_e[116:112]; | |
| 535 | assign cid_st_addr[3] = cid_fill_data_e[104]; | |
| 536 | assign cid_st_bmask[7:0] = cid_fill_data_e[103:96]; | |
| 537 | assign cid_st_vector[15:0]= {cid_fill_data_e[93:92],cid_fill_data_e[89:88],cid_fill_data_e[85:84],cid_fill_data_e[81:80], | |
| 538 | cid_fill_data_e[77:76],cid_fill_data_e[73:72],cid_fill_data_e[69:68],cid_fill_data_e[65:64]}; | |
| 539 | ||
| 540 | assign cid_inv_index[10:6] = cid_st_addr[10:6]; | |
| 541 | ||
| 542 | assign cid_dcsoc_err_e = cid_pkt_data_e[144]; | |
| 543 | assign cid_pkt_unused = cid_pkt_data_e[143]; | |
| 544 | assign cid_l2miss = cid_pkt_data_e[140]; | |
| 545 | assign cid_err[1:0] = cid_pkt_data_e[139:138]; | |
| 546 | assign cid_ncache = cid_pkt_data_e[137]; | |
| 547 | assign cid_tid[2:0] = cid_pkt_data_e[136:134]; | |
| 548 | assign cid_xinval = cid_pkt_data_e[133]; | |
| 549 | assign cid_xway[1:0] = cid_pkt_data_e[132:131]; | |
| 550 | assign cid_unused[1] = cid_pkt_data_e[130]; | |
| 551 | assign cid_atomic = cid_pkt_data_e[129]; | |
| 552 | ||
| 553 | //////////////////////////////////////////////////////////////////////////////// | |
| 554 | // Invalidate processing | |
| 555 | // Invalidation vectors have the following format. | |
| 556 | // Vectors for store ack packets contain the first 32 bits only. | |
| 557 | // [31:0] = {cpu7[3:0],cpu6[3:0],...,cpu1[3:0],cpu0[3:0]} for addr[5:4]=00 | |
| 558 | // [55:32] = {cpu7[2:0],cpu6[2:0],...,cpu1[2:0],cpu0[2:0]} for addr[5:4]=01 | |
| 559 | // [87:56] = {cpu7[3:0],cpu6[3:0],...,cpu1[3:0],cpu0[3:0]} for addr[5:4]=10 | |
| 560 | // [111:88] = {cpu7[2:0],cpu6[2:0],...,cpu1[2:0],cpu0[2:0]} for addr[5:4]=11 | |
| 561 | ||
| 562 | //Select the invalidation info specific to this cpu | |
| 563 | lsu_cid_dp_mux_macro__mux_aodec__ports_8__stack_18l__width_18 inv_vec_mx ( | |
| 564 | .din0 ({cid_fill_data_e[67:64],cid_fill_data_e[90:88],cid_fill_data_e[59:56],cid_fill_data_e[34:32],cid_fill_data_e[3:0]}), | |
| 565 | .din1 ({cid_fill_data_e[71:68],cid_fill_data_e[93:91],cid_fill_data_e[63:60],cid_fill_data_e[37:35],cid_fill_data_e[7:4]}), | |
| 566 | .din2 ({cid_fill_data_e[75:72],cid_fill_data_e[96:94],cid_fill_data_e[67:64],cid_fill_data_e[40:38],cid_fill_data_e[11:8]}), | |
| 567 | .din3 ({cid_fill_data_e[79:76],cid_fill_data_e[99:97],cid_fill_data_e[71:68],cid_fill_data_e[43:41],cid_fill_data_e[15:12]}), | |
| 568 | .din4 ({cid_fill_data_e[83:80],cid_fill_data_e[102:100],cid_fill_data_e[75:72],cid_fill_data_e[46:44],cid_fill_data_e[19:16]}), | |
| 569 | .din5 ({cid_fill_data_e[87:84],cid_fill_data_e[105:103],cid_fill_data_e[79:76],cid_fill_data_e[49:47],cid_fill_data_e[23:20]}), | |
| 570 | .din6 ({cid_fill_data_e[91:88],cid_fill_data_e[108:106],cid_fill_data_e[83:80],cid_fill_data_e[52:50],cid_fill_data_e[27:24]}), | |
| 571 | .din7 ({cid_fill_data_e[95:92],cid_fill_data_e[111:109],cid_fill_data_e[87:84],cid_fill_data_e[55:53],cid_fill_data_e[31:28]}), | |
| 572 | .sel (const_cpuid[2:0]), | |
| 573 | .dout (inv_vec[17:0]) | |
| 574 | ); | |
| 575 | ||
| 576 | lsu_cid_dp_buff_macro__stack_18l__width_18 inv_vec_buf ( | |
| 577 | .din (inv_vec[17:0]), | |
| 578 | .dout (cid_inv_vec[17:0]) | |
| 579 | ); | |
| 580 | ||
| 581 | assign cid_st_way[1:0] = cid_inv_vec[17:16]; | |
| 582 | ||
| 583 | //////////////////////////////////////////////////////////////////////////////// | |
| 584 | // BIST | |
| 585 | ||
| 586 | // Flop compare data | |
| 587 | lsu_cid_dp_msff_macro__stack_8l__width_8 dff_cmp_data ( | |
| 588 | .scan_in(dff_cmp_data_scanin), | |
| 589 | .scan_out(dff_cmp_data_scanout), | |
| 590 | .din (bist_wdata_1[7:0]), | |
| 591 | .dout (bist_cmp_data[7:0]), | |
| 592 | .clk (l2clk), | |
| 593 | .en (mbi_run), | |
| 594 | .se(se), | |
| 595 | .siclk(siclk), | |
| 596 | .soclk(soclk), | |
| 597 | .pce_ov(pce_ov), | |
| 598 | .stop(stop) | |
| 599 | ); | |
| 600 | ||
| 601 | // Write data mux | |
| 602 | lsu_cid_dp_mux_macro__mux_aope__ports_2__stack_64c__width_64 bist_wdata_mx_0 ( | |
| 603 | .din0 ({8{mbi_wdata[7:0]}}), | |
| 604 | .din1 (in_data[63:0]), | |
| 605 | .sel0 (mbi_run), | |
| 606 | .dout (cid_cpq_wdata[63:0]) | |
| 607 | ); | |
| 608 | lsu_cid_dp_mux_macro__mux_aope__ports_2__stack_64c__width_64 bist_wdata_mx_1 ( | |
| 609 | .din0 ({8{mbi_wdata[7:0]}}), | |
| 610 | .din1 (in_data[127:64]), | |
| 611 | .sel0 (mbi_run), | |
| 612 | .dout (cid_cpq_wdata[127:64]) | |
| 613 | ); | |
| 614 | lsu_cid_dp_mux_macro__mux_aope__ports_2__stack_10l__width_9 bist_wdata_mx_2 ( | |
| 615 | .din0 ({mbi_wdata[0],mbi_wdata[7:0]}), | |
| 616 | .din1 ({in_data[128],in_data[130],in_data[132],in_data[134],in_data[136],in_data[138], | |
| 617 | in_data[140],in_data[142],in_data[144]}), | |
| 618 | .sel0 (mbi_run), | |
| 619 | .dout ({cid_cpq_wdata[128],cid_cpq_wdata[130],cid_cpq_wdata[132],cid_cpq_wdata[134],cid_cpq_wdata[136], | |
| 620 | cid_cpq_wdata[138],cid_cpq_wdata[140],cid_cpq_wdata[142],cid_cpq_wdata[144]}) | |
| 621 | ); | |
| 622 | lsu_cid_dp_mux_macro__mux_aope__ports_2__stack_10l__width_9 bist_wdata_mx_3 ( | |
| 623 | .din0 ({mbi_wdata[0],mbi_wdata[7:0]}), | |
| 624 | .din1 ({in_data[129],in_data[131],in_data[133],in_data[135],in_data[137],in_data[139], | |
| 625 | in_data[141],in_data[143],in_data[145]}), | |
| 626 | .sel0 (mbi_run), | |
| 627 | .dout ({cid_cpq_wdata[129],cid_cpq_wdata[131],cid_cpq_wdata[133],cid_cpq_wdata[135],cid_cpq_wdata[137], | |
| 628 | cid_cpq_wdata[139],cid_cpq_wdata[141],cid_cpq_wdata[143],cid_cpq_wdata[145]}) | |
| 629 | ); | |
| 630 | ||
| 631 | // Read data mux | |
| 632 | ||
| 633 | lsu_cid_dp_mux_macro__mux_aope__ports_2__stack_64c__width_64 cpq_bist_mx_0 ( | |
| 634 | .din0 (fifo_data[127:64]), | |
| 635 | .din1 (fifo_data[63:0]), | |
| 636 | .sel0 (bist_cmpsel_2), | |
| 637 | .dout (fifo_cmp_data[63:0]) | |
| 638 | ); | |
| 639 | lsu_cid_dp_mux_macro__mux_aope__ports_2__stack_10l__width_9 cpq_bist_mx_2 ( | |
| 640 | .din0 ({fifo_data[129],fifo_data[131],fifo_data[133],fifo_data[135],fifo_data[137],fifo_data[139], | |
| 641 | fifo_data[141],fifo_data[143],fifo_data[145]}), | |
| 642 | .din1 ({fifo_data[128],fifo_data[130],fifo_data[132],fifo_data[134],fifo_data[136],fifo_data[138], | |
| 643 | fifo_data[140],fifo_data[142],fifo_data[144]}), | |
| 644 | .sel0 (bist_cmpsel_2), | |
| 645 | .dout (fifo_cmp_data[72:64]) | |
| 646 | ); | |
| 647 | ||
| 648 | // Comparators | |
| 649 | ||
| 650 | lsu_cid_dp_cmp_macro__width_64 bist_cmp1 ( | |
| 651 | .din0 ({8{bist_cmp_data[7:0]}}), | |
| 652 | .din1 ({fifo_cmp_data[63:0]}), | |
| 653 | .dout (cid_cpq_cmp_1) | |
| 654 | ); | |
| 655 | lsu_cid_dp_cmp_macro__width_16 bist_cmp2 ( | |
| 656 | .din0 ({2{bist_cmp_data[7:0]}}), | |
| 657 | .din1 ({bist_cmp_data[7:1],fifo_cmp_data[72:64]}), | |
| 658 | .dout (cid_cpq_cmp_2) | |
| 659 | ); | |
| 660 | assign cid_cpq_cmp_3 = 1'b1; | |
| 661 | ||
| 662 | ||
| 663 | // fixscan start: | |
| 664 | assign dff_d1_0_scanin = scan_in ; | |
| 665 | assign dff_d1_1_scanin = dff_d1_0_scanout ; | |
| 666 | assign dff_d1_2_scanin = dff_d1_1_scanout ; | |
| 667 | assign dff_d1_3_scanin = dff_d1_2_scanout ; | |
| 668 | assign dff_fifo_0_scanin = dff_d1_3_scanout ; | |
| 669 | assign dff_fifo_1_scanin = dff_fifo_0_scanout ; | |
| 670 | assign dff_fifo_2_scanin = dff_fifo_1_scanout ; | |
| 671 | assign dff_fifo_3_scanin = dff_fifo_2_scanout ; | |
| 672 | assign dff_out_0_scanin = dff_fifo_3_scanout ; | |
| 673 | assign dff_out_1_scanin = dff_out_0_scanout ; | |
| 674 | assign dff_out_2_scanin = dff_out_1_scanout ; | |
| 675 | assign dff_out_3_scanin = dff_out_2_scanout ; | |
| 676 | assign dff_cmp_data_scanin = dff_out_3_scanout ; | |
| 677 | assign scan_out = dff_cmp_data_scanout ; | |
| 678 | // fixscan end: | |
| 679 | endmodule | |
| 680 | ||
| 681 | ||
| 682 | ||
| 683 | // | |
| 684 | // buff macro | |
| 685 | // | |
| 686 | // | |
| 687 | ||
| 688 | ||
| 689 | ||
| 690 | ||
| 691 | ||
| 692 | module lsu_cid_dp_buff_macro__dbuff_32x__rep_1__stack_none__width_4 ( | |
| 693 | din, | |
| 694 | dout); | |
| 695 | input [3:0] din; | |
| 696 | output [3:0] dout; | |
| 697 | ||
| 698 | ||
| 699 | ||
| 700 | ||
| 701 | ||
| 702 | ||
| 703 | buff #(4) d0_0 ( | |
| 704 | .in(din[3:0]), | |
| 705 | .out(dout[3:0]) | |
| 706 | ); | |
| 707 | ||
| 708 | ||
| 709 | ||
| 710 | ||
| 711 | ||
| 712 | ||
| 713 | ||
| 714 | ||
| 715 | endmodule | |
| 716 | ||
| 717 | ||
| 718 | ||
| 719 | ||
| 720 | ||
| 721 | ||
| 722 | ||
| 723 | ||
| 724 | ||
| 725 | // any PARAMS parms go into naming of macro | |
| 726 | ||
| 727 | module lsu_cid_dp_msff_macro__stack_64c__width_64 ( | |
| 728 | din, | |
| 729 | clk, | |
| 730 | en, | |
| 731 | se, | |
| 732 | scan_in, | |
| 733 | siclk, | |
| 734 | soclk, | |
| 735 | pce_ov, | |
| 736 | stop, | |
| 737 | dout, | |
| 738 | scan_out); | |
| 739 | wire l1clk; | |
| 740 | wire siclk_out; | |
| 741 | wire soclk_out; | |
| 742 | wire [62:0] so; | |
| 743 | ||
| 744 | input [63:0] din; | |
| 745 | ||
| 746 | ||
| 747 | input clk; | |
| 748 | input en; | |
| 749 | input se; | |
| 750 | input scan_in; | |
| 751 | input siclk; | |
| 752 | input soclk; | |
| 753 | input pce_ov; | |
| 754 | input stop; | |
| 755 | ||
| 756 | ||
| 757 | ||
| 758 | output [63:0] dout; | |
| 759 | ||
| 760 | ||
| 761 | output scan_out; | |
| 762 | ||
| 763 | ||
| 764 | ||
| 765 | ||
| 766 | cl_dp1_l1hdr_8x c0_0 ( | |
| 767 | .l2clk(clk), | |
| 768 | .pce(en), | |
| 769 | .aclk(siclk), | |
| 770 | .bclk(soclk), | |
| 771 | .l1clk(l1clk), | |
| 772 | .se(se), | |
| 773 | .pce_ov(pce_ov), | |
| 774 | .stop(stop), | |
| 775 | .siclk_out(siclk_out), | |
| 776 | .soclk_out(soclk_out) | |
| 777 | ); | |
| 778 | dff #(64) d0_0 ( | |
| 779 | .l1clk(l1clk), | |
| 780 | .siclk(siclk_out), | |
| 781 | .soclk(soclk_out), | |
| 782 | .d(din[63:0]), | |
| 783 | .si({scan_in,so[62:0]}), | |
| 784 | .so({so[62:0],scan_out}), | |
| 785 | .q(dout[63:0]) | |
| 786 | ); | |
| 787 | ||
| 788 | ||
| 789 | ||
| 790 | ||
| 791 | ||
| 792 | ||
| 793 | ||
| 794 | ||
| 795 | ||
| 796 | ||
| 797 | ||
| 798 | ||
| 799 | ||
| 800 | ||
| 801 | ||
| 802 | ||
| 803 | ||
| 804 | ||
| 805 | ||
| 806 | ||
| 807 | endmodule | |
| 808 | ||
| 809 | ||
| 810 | ||
| 811 | ||
| 812 | ||
| 813 | ||
| 814 | ||
| 815 | ||
| 816 | ||
| 817 | ||
| 818 | ||
| 819 | ||
| 820 | ||
| 821 | // any PARAMS parms go into naming of macro | |
| 822 | ||
| 823 | module lsu_cid_dp_msff_macro__stack_10l__width_9 ( | |
| 824 | din, | |
| 825 | clk, | |
| 826 | en, | |
| 827 | se, | |
| 828 | scan_in, | |
| 829 | siclk, | |
| 830 | soclk, | |
| 831 | pce_ov, | |
| 832 | stop, | |
| 833 | dout, | |
| 834 | scan_out); | |
| 835 | wire l1clk; | |
| 836 | wire siclk_out; | |
| 837 | wire soclk_out; | |
| 838 | wire [7:0] so; | |
| 839 | ||
| 840 | input [8:0] din; | |
| 841 | ||
| 842 | ||
| 843 | input clk; | |
| 844 | input en; | |
| 845 | input se; | |
| 846 | input scan_in; | |
| 847 | input siclk; | |
| 848 | input soclk; | |
| 849 | input pce_ov; | |
| 850 | input stop; | |
| 851 | ||
| 852 | ||
| 853 | ||
| 854 | output [8:0] dout; | |
| 855 | ||
| 856 | ||
| 857 | output scan_out; | |
| 858 | ||
| 859 | ||
| 860 | ||
| 861 | ||
| 862 | cl_dp1_l1hdr_8x c0_0 ( | |
| 863 | .l2clk(clk), | |
| 864 | .pce(en), | |
| 865 | .aclk(siclk), | |
| 866 | .bclk(soclk), | |
| 867 | .l1clk(l1clk), | |
| 868 | .se(se), | |
| 869 | .pce_ov(pce_ov), | |
| 870 | .stop(stop), | |
| 871 | .siclk_out(siclk_out), | |
| 872 | .soclk_out(soclk_out) | |
| 873 | ); | |
| 874 | dff #(9) d0_0 ( | |
| 875 | .l1clk(l1clk), | |
| 876 | .siclk(siclk_out), | |
| 877 | .soclk(soclk_out), | |
| 878 | .d(din[8:0]), | |
| 879 | .si({scan_in,so[7:0]}), | |
| 880 | .so({so[7:0],scan_out}), | |
| 881 | .q(dout[8:0]) | |
| 882 | ); | |
| 883 | ||
| 884 | ||
| 885 | ||
| 886 | ||
| 887 | ||
| 888 | ||
| 889 | ||
| 890 | ||
| 891 | ||
| 892 | ||
| 893 | ||
| 894 | ||
| 895 | ||
| 896 | ||
| 897 | ||
| 898 | ||
| 899 | ||
| 900 | ||
| 901 | ||
| 902 | ||
| 903 | endmodule | |
| 904 | ||
| 905 | ||
| 906 | ||
| 907 | ||
| 908 | ||
| 909 | ||
| 910 | ||
| 911 | ||
| 912 | ||
| 913 | // | |
| 914 | // buff macro | |
| 915 | // | |
| 916 | // | |
| 917 | ||
| 918 | ||
| 919 | ||
| 920 | ||
| 921 | ||
| 922 | module lsu_cid_dp_buff_macro__stack_64c__width_64 ( | |
| 923 | din, | |
| 924 | dout); | |
| 925 | input [63:0] din; | |
| 926 | output [63:0] dout; | |
| 927 | ||
| 928 | ||
| 929 | ||
| 930 | ||
| 931 | ||
| 932 | ||
| 933 | buff #(64) d0_0 ( | |
| 934 | .in(din[63:0]), | |
| 935 | .out(dout[63:0]) | |
| 936 | ); | |
| 937 | ||
| 938 | ||
| 939 | ||
| 940 | ||
| 941 | ||
| 942 | ||
| 943 | ||
| 944 | ||
| 945 | endmodule | |
| 946 | ||
| 947 | ||
| 948 | ||
| 949 | ||
| 950 | ||
| 951 | // | |
| 952 | // buff macro | |
| 953 | // | |
| 954 | // | |
| 955 | ||
| 956 | ||
| 957 | ||
| 958 | ||
| 959 | ||
| 960 | module lsu_cid_dp_buff_macro__stack_10l__width_9 ( | |
| 961 | din, | |
| 962 | dout); | |
| 963 | input [8:0] din; | |
| 964 | output [8:0] dout; | |
| 965 | ||
| 966 | ||
| 967 | ||
| 968 | ||
| 969 | ||
| 970 | ||
| 971 | buff #(9) d0_0 ( | |
| 972 | .in(din[8:0]), | |
| 973 | .out(dout[8:0]) | |
| 974 | ); | |
| 975 | ||
| 976 | ||
| 977 | ||
| 978 | ||
| 979 | ||
| 980 | ||
| 981 | ||
| 982 | ||
| 983 | endmodule | |
| 984 | ||
| 985 | ||
| 986 | ||
| 987 | ||
| 988 | ||
| 989 | // | |
| 990 | // buff macro | |
| 991 | // | |
| 992 | // | |
| 993 | ||
| 994 | ||
| 995 | ||
| 996 | ||
| 997 | ||
| 998 | module lsu_cid_dp_buff_macro__dbuff_4x__minbuff_1__stack_64c__width_64 ( | |
| 999 | din, | |
| 1000 | dout); | |
| 1001 | input [63:0] din; | |
| 1002 | output [63:0] dout; | |
| 1003 | ||
| 1004 | ||
| 1005 | ||
| 1006 | ||
| 1007 | ||
| 1008 | ||
| 1009 | buff #(64) d0_0 ( | |
| 1010 | .in(din[63:0]), | |
| 1011 | .out(dout[63:0]) | |
| 1012 | ); | |
| 1013 | ||
| 1014 | ||
| 1015 | ||
| 1016 | ||
| 1017 | ||
| 1018 | ||
| 1019 | ||
| 1020 | ||
| 1021 | endmodule | |
| 1022 | ||
| 1023 | ||
| 1024 | ||
| 1025 | ||
| 1026 | ||
| 1027 | // | |
| 1028 | // buff macro | |
| 1029 | // | |
| 1030 | // | |
| 1031 | ||
| 1032 | ||
| 1033 | ||
| 1034 | ||
| 1035 | ||
| 1036 | module lsu_cid_dp_buff_macro__dbuff_4x__minbuff_1__stack_10l__width_9 ( | |
| 1037 | din, | |
| 1038 | dout); | |
| 1039 | input [8:0] din; | |
| 1040 | output [8:0] dout; | |
| 1041 | ||
| 1042 | ||
| 1043 | ||
| 1044 | ||
| 1045 | ||
| 1046 | ||
| 1047 | buff #(9) d0_0 ( | |
| 1048 | .in(din[8:0]), | |
| 1049 | .out(dout[8:0]) | |
| 1050 | ); | |
| 1051 | ||
| 1052 | ||
| 1053 | ||
| 1054 | ||
| 1055 | ||
| 1056 | ||
| 1057 | ||
| 1058 | ||
| 1059 | endmodule | |
| 1060 | ||
| 1061 | ||
| 1062 | ||
| 1063 | ||
| 1064 | ||
| 1065 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
| 1066 | // also for pass-gate with decoder | |
| 1067 | ||
| 1068 | ||
| 1069 | ||
| 1070 | ||
| 1071 | ||
| 1072 | // any PARAMS parms go into naming of macro | |
| 1073 | ||
| 1074 | module lsu_cid_dp_mux_macro__mux_aonpe__ports_4__stack_64c__width_64 ( | |
| 1075 | din0, | |
| 1076 | sel0, | |
| 1077 | din1, | |
| 1078 | sel1, | |
| 1079 | din2, | |
| 1080 | sel2, | |
| 1081 | din3, | |
| 1082 | sel3, | |
| 1083 | dout); | |
| 1084 | wire buffout0; | |
| 1085 | wire buffout1; | |
| 1086 | wire buffout2; | |
| 1087 | wire buffout3; | |
| 1088 | ||
| 1089 | input [63:0] din0; | |
| 1090 | input sel0; | |
| 1091 | input [63:0] din1; | |
| 1092 | input sel1; | |
| 1093 | input [63:0] din2; | |
| 1094 | input sel2; | |
| 1095 | input [63:0] din3; | |
| 1096 | input sel3; | |
| 1097 | output [63:0] dout; | |
| 1098 | ||
| 1099 | ||
| 1100 | ||
| 1101 | ||
| 1102 | ||
| 1103 | cl_dp1_muxbuff4_8x c0_0 ( | |
| 1104 | .in0(sel0), | |
| 1105 | .in1(sel1), | |
| 1106 | .in2(sel2), | |
| 1107 | .in3(sel3), | |
| 1108 | .out0(buffout0), | |
| 1109 | .out1(buffout1), | |
| 1110 | .out2(buffout2), | |
| 1111 | .out3(buffout3) | |
| 1112 | ); | |
| 1113 | mux4s #(64) d0_0 ( | |
| 1114 | .sel0(buffout0), | |
| 1115 | .sel1(buffout1), | |
| 1116 | .sel2(buffout2), | |
| 1117 | .sel3(buffout3), | |
| 1118 | .in0(din0[63:0]), | |
| 1119 | .in1(din1[63:0]), | |
| 1120 | .in2(din2[63:0]), | |
| 1121 | .in3(din3[63:0]), | |
| 1122 | .dout(dout[63:0]) | |
| 1123 | ); | |
| 1124 | ||
| 1125 | ||
| 1126 | ||
| 1127 | ||
| 1128 | ||
| 1129 | ||
| 1130 | ||
| 1131 | ||
| 1132 | ||
| 1133 | ||
| 1134 | ||
| 1135 | ||
| 1136 | ||
| 1137 | endmodule | |
| 1138 | ||
| 1139 | ||
| 1140 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
| 1141 | // also for pass-gate with decoder | |
| 1142 | ||
| 1143 | ||
| 1144 | ||
| 1145 | ||
| 1146 | ||
| 1147 | // any PARAMS parms go into naming of macro | |
| 1148 | ||
| 1149 | module lsu_cid_dp_mux_macro__mux_aonpe__ports_4__stack_10l__width_9 ( | |
| 1150 | din0, | |
| 1151 | sel0, | |
| 1152 | din1, | |
| 1153 | sel1, | |
| 1154 | din2, | |
| 1155 | sel2, | |
| 1156 | din3, | |
| 1157 | sel3, | |
| 1158 | dout); | |
| 1159 | wire buffout0; | |
| 1160 | wire buffout1; | |
| 1161 | wire buffout2; | |
| 1162 | wire buffout3; | |
| 1163 | ||
| 1164 | input [8:0] din0; | |
| 1165 | input sel0; | |
| 1166 | input [8:0] din1; | |
| 1167 | input sel1; | |
| 1168 | input [8:0] din2; | |
| 1169 | input sel2; | |
| 1170 | input [8:0] din3; | |
| 1171 | input sel3; | |
| 1172 | output [8:0] dout; | |
| 1173 | ||
| 1174 | ||
| 1175 | ||
| 1176 | ||
| 1177 | ||
| 1178 | cl_dp1_muxbuff4_8x c0_0 ( | |
| 1179 | .in0(sel0), | |
| 1180 | .in1(sel1), | |
| 1181 | .in2(sel2), | |
| 1182 | .in3(sel3), | |
| 1183 | .out0(buffout0), | |
| 1184 | .out1(buffout1), | |
| 1185 | .out2(buffout2), | |
| 1186 | .out3(buffout3) | |
| 1187 | ); | |
| 1188 | mux4s #(9) d0_0 ( | |
| 1189 | .sel0(buffout0), | |
| 1190 | .sel1(buffout1), | |
| 1191 | .sel2(buffout2), | |
| 1192 | .sel3(buffout3), | |
| 1193 | .in0(din0[8:0]), | |
| 1194 | .in1(din1[8:0]), | |
| 1195 | .in2(din2[8:0]), | |
| 1196 | .in3(din3[8:0]), | |
| 1197 | .dout(dout[8:0]) | |
| 1198 | ); | |
| 1199 | ||
| 1200 | ||
| 1201 | ||
| 1202 | ||
| 1203 | ||
| 1204 | ||
| 1205 | ||
| 1206 | ||
| 1207 | ||
| 1208 | ||
| 1209 | ||
| 1210 | ||
| 1211 | ||
| 1212 | endmodule | |
| 1213 | ||
| 1214 | ||
| 1215 | ||
| 1216 | ||
| 1217 | ||
| 1218 | ||
| 1219 | // any PARAMS parms go into naming of macro | |
| 1220 | ||
| 1221 | module lsu_cid_dp_msff_macro__stack_10l__width_10 ( | |
| 1222 | din, | |
| 1223 | clk, | |
| 1224 | en, | |
| 1225 | se, | |
| 1226 | scan_in, | |
| 1227 | siclk, | |
| 1228 | soclk, | |
| 1229 | pce_ov, | |
| 1230 | stop, | |
| 1231 | dout, | |
| 1232 | scan_out); | |
| 1233 | wire l1clk; | |
| 1234 | wire siclk_out; | |
| 1235 | wire soclk_out; | |
| 1236 | wire [8:0] so; | |
| 1237 | ||
| 1238 | input [9:0] din; | |
| 1239 | ||
| 1240 | ||
| 1241 | input clk; | |
| 1242 | input en; | |
| 1243 | input se; | |
| 1244 | input scan_in; | |
| 1245 | input siclk; | |
| 1246 | input soclk; | |
| 1247 | input pce_ov; | |
| 1248 | input stop; | |
| 1249 | ||
| 1250 | ||
| 1251 | ||
| 1252 | output [9:0] dout; | |
| 1253 | ||
| 1254 | ||
| 1255 | output scan_out; | |
| 1256 | ||
| 1257 | ||
| 1258 | ||
| 1259 | ||
| 1260 | cl_dp1_l1hdr_8x c0_0 ( | |
| 1261 | .l2clk(clk), | |
| 1262 | .pce(en), | |
| 1263 | .aclk(siclk), | |
| 1264 | .bclk(soclk), | |
| 1265 | .l1clk(l1clk), | |
| 1266 | .se(se), | |
| 1267 | .pce_ov(pce_ov), | |
| 1268 | .stop(stop), | |
| 1269 | .siclk_out(siclk_out), | |
| 1270 | .soclk_out(soclk_out) | |
| 1271 | ); | |
| 1272 | dff #(10) d0_0 ( | |
| 1273 | .l1clk(l1clk), | |
| 1274 | .siclk(siclk_out), | |
| 1275 | .soclk(soclk_out), | |
| 1276 | .d(din[9:0]), | |
| 1277 | .si({scan_in,so[8:0]}), | |
| 1278 | .so({so[8:0],scan_out}), | |
| 1279 | .q(dout[9:0]) | |
| 1280 | ); | |
| 1281 | ||
| 1282 | ||
| 1283 | ||
| 1284 | ||
| 1285 | ||
| 1286 | ||
| 1287 | ||
| 1288 | ||
| 1289 | ||
| 1290 | ||
| 1291 | ||
| 1292 | ||
| 1293 | ||
| 1294 | ||
| 1295 | ||
| 1296 | ||
| 1297 | ||
| 1298 | ||
| 1299 | ||
| 1300 | ||
| 1301 | endmodule | |
| 1302 | ||
| 1303 | ||
| 1304 | ||
| 1305 | ||
| 1306 | ||
| 1307 | ||
| 1308 | ||
| 1309 | ||
| 1310 | ||
| 1311 | // | |
| 1312 | // buff macro | |
| 1313 | // | |
| 1314 | // | |
| 1315 | ||
| 1316 | ||
| 1317 | ||
| 1318 | ||
| 1319 | ||
| 1320 | module lsu_cid_dp_buff_macro__dbuff_16x__rep_1__stack_64c__width_64 ( | |
| 1321 | din, | |
| 1322 | dout); | |
| 1323 | input [63:0] din; | |
| 1324 | output [63:0] dout; | |
| 1325 | ||
| 1326 | ||
| 1327 | ||
| 1328 | ||
| 1329 | ||
| 1330 | ||
| 1331 | buff #(64) d0_0 ( | |
| 1332 | .in(din[63:0]), | |
| 1333 | .out(dout[63:0]) | |
| 1334 | ); | |
| 1335 | ||
| 1336 | ||
| 1337 | ||
| 1338 | ||
| 1339 | ||
| 1340 | ||
| 1341 | ||
| 1342 | ||
| 1343 | endmodule | |
| 1344 | ||
| 1345 | ||
| 1346 | ||
| 1347 | ||
| 1348 | ||
| 1349 | // | |
| 1350 | // buff macro | |
| 1351 | // | |
| 1352 | // | |
| 1353 | ||
| 1354 | ||
| 1355 | ||
| 1356 | ||
| 1357 | ||
| 1358 | module lsu_cid_dp_buff_macro__rep_1__stack_10l__width_9 ( | |
| 1359 | din, | |
| 1360 | dout); | |
| 1361 | input [8:0] din; | |
| 1362 | output [8:0] dout; | |
| 1363 | ||
| 1364 | ||
| 1365 | ||
| 1366 | ||
| 1367 | ||
| 1368 | ||
| 1369 | buff #(9) d0_0 ( | |
| 1370 | .in(din[8:0]), | |
| 1371 | .out(dout[8:0]) | |
| 1372 | ); | |
| 1373 | ||
| 1374 | ||
| 1375 | ||
| 1376 | ||
| 1377 | ||
| 1378 | ||
| 1379 | ||
| 1380 | ||
| 1381 | endmodule | |
| 1382 | ||
| 1383 | ||
| 1384 | ||
| 1385 | ||
| 1386 | ||
| 1387 | // | |
| 1388 | // buff macro | |
| 1389 | // | |
| 1390 | // | |
| 1391 | ||
| 1392 | ||
| 1393 | ||
| 1394 | ||
| 1395 | ||
| 1396 | module lsu_cid_dp_buff_macro__width_3 ( | |
| 1397 | din, | |
| 1398 | dout); | |
| 1399 | input [2:0] din; | |
| 1400 | output [2:0] dout; | |
| 1401 | ||
| 1402 | ||
| 1403 | ||
| 1404 | ||
| 1405 | ||
| 1406 | ||
| 1407 | buff #(3) d0_0 ( | |
| 1408 | .in(din[2:0]), | |
| 1409 | .out(dout[2:0]) | |
| 1410 | ); | |
| 1411 | ||
| 1412 | ||
| 1413 | ||
| 1414 | ||
| 1415 | ||
| 1416 | ||
| 1417 | ||
| 1418 | ||
| 1419 | endmodule | |
| 1420 | ||
| 1421 | ||
| 1422 | ||
| 1423 | ||
| 1424 | ||
| 1425 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
| 1426 | // also for pass-gate with decoder | |
| 1427 | ||
| 1428 | ||
| 1429 | ||
| 1430 | ||
| 1431 | ||
| 1432 | // any PARAMS parms go into naming of macro | |
| 1433 | ||
| 1434 | module lsu_cid_dp_mux_macro__mux_aodec__ports_8__stack_18l__width_18 ( | |
| 1435 | din0, | |
| 1436 | din1, | |
| 1437 | din2, | |
| 1438 | din3, | |
| 1439 | din4, | |
| 1440 | din5, | |
| 1441 | din6, | |
| 1442 | din7, | |
| 1443 | sel, | |
| 1444 | dout); | |
| 1445 | wire psel0; | |
| 1446 | wire psel1; | |
| 1447 | wire psel2; | |
| 1448 | wire psel3; | |
| 1449 | wire psel4; | |
| 1450 | wire psel5; | |
| 1451 | wire psel6; | |
| 1452 | wire psel7; | |
| 1453 | ||
| 1454 | input [17:0] din0; | |
| 1455 | input [17:0] din1; | |
| 1456 | input [17:0] din2; | |
| 1457 | input [17:0] din3; | |
| 1458 | input [17:0] din4; | |
| 1459 | input [17:0] din5; | |
| 1460 | input [17:0] din6; | |
| 1461 | input [17:0] din7; | |
| 1462 | input [2:0] sel; | |
| 1463 | output [17:0] dout; | |
| 1464 | ||
| 1465 | ||
| 1466 | ||
| 1467 | ||
| 1468 | ||
| 1469 | cl_dp1_pdec8_8x c0_0 ( | |
| 1470 | .test(1'b1), | |
| 1471 | .sel0(sel[0]), | |
| 1472 | .sel1(sel[1]), | |
| 1473 | .sel2(sel[2]), | |
| 1474 | .psel0(psel0), | |
| 1475 | .psel1(psel1), | |
| 1476 | .psel2(psel2), | |
| 1477 | .psel3(psel3), | |
| 1478 | .psel4(psel4), | |
| 1479 | .psel5(psel5), | |
| 1480 | .psel6(psel6), | |
| 1481 | .psel7(psel7) | |
| 1482 | ); | |
| 1483 | ||
| 1484 | mux8s #(18) d0_0 ( | |
| 1485 | .sel0(psel0), | |
| 1486 | .sel1(psel1), | |
| 1487 | .sel2(psel2), | |
| 1488 | .sel3(psel3), | |
| 1489 | .sel4(psel4), | |
| 1490 | .sel5(psel5), | |
| 1491 | .sel6(psel6), | |
| 1492 | .sel7(psel7), | |
| 1493 | .in0(din0[17:0]), | |
| 1494 | .in1(din1[17:0]), | |
| 1495 | .in2(din2[17:0]), | |
| 1496 | .in3(din3[17:0]), | |
| 1497 | .in4(din4[17:0]), | |
| 1498 | .in5(din5[17:0]), | |
| 1499 | .in6(din6[17:0]), | |
| 1500 | .in7(din7[17:0]), | |
| 1501 | .dout(dout[17:0]) | |
| 1502 | ); | |
| 1503 | ||
| 1504 | ||
| 1505 | ||
| 1506 | ||
| 1507 | ||
| 1508 | ||
| 1509 | ||
| 1510 | ||
| 1511 | ||
| 1512 | ||
| 1513 | ||
| 1514 | ||
| 1515 | ||
| 1516 | endmodule | |
| 1517 | ||
| 1518 | ||
| 1519 | // | |
| 1520 | // buff macro | |
| 1521 | // | |
| 1522 | // | |
| 1523 | ||
| 1524 | ||
| 1525 | ||
| 1526 | ||
| 1527 | ||
| 1528 | module lsu_cid_dp_buff_macro__stack_18l__width_18 ( | |
| 1529 | din, | |
| 1530 | dout); | |
| 1531 | input [17:0] din; | |
| 1532 | output [17:0] dout; | |
| 1533 | ||
| 1534 | ||
| 1535 | ||
| 1536 | ||
| 1537 | ||
| 1538 | ||
| 1539 | buff #(18) d0_0 ( | |
| 1540 | .in(din[17:0]), | |
| 1541 | .out(dout[17:0]) | |
| 1542 | ); | |
| 1543 | ||
| 1544 | ||
| 1545 | ||
| 1546 | ||
| 1547 | ||
| 1548 | ||
| 1549 | ||
| 1550 | ||
| 1551 | endmodule | |
| 1552 | ||
| 1553 | ||
| 1554 | ||
| 1555 | ||
| 1556 | ||
| 1557 | ||
| 1558 | ||
| 1559 | ||
| 1560 | ||
| 1561 | // any PARAMS parms go into naming of macro | |
| 1562 | ||
| 1563 | module lsu_cid_dp_msff_macro__stack_8l__width_8 ( | |
| 1564 | din, | |
| 1565 | clk, | |
| 1566 | en, | |
| 1567 | se, | |
| 1568 | scan_in, | |
| 1569 | siclk, | |
| 1570 | soclk, | |
| 1571 | pce_ov, | |
| 1572 | stop, | |
| 1573 | dout, | |
| 1574 | scan_out); | |
| 1575 | wire l1clk; | |
| 1576 | wire siclk_out; | |
| 1577 | wire soclk_out; | |
| 1578 | wire [6:0] so; | |
| 1579 | ||
| 1580 | input [7:0] din; | |
| 1581 | ||
| 1582 | ||
| 1583 | input clk; | |
| 1584 | input en; | |
| 1585 | input se; | |
| 1586 | input scan_in; | |
| 1587 | input siclk; | |
| 1588 | input soclk; | |
| 1589 | input pce_ov; | |
| 1590 | input stop; | |
| 1591 | ||
| 1592 | ||
| 1593 | ||
| 1594 | output [7:0] dout; | |
| 1595 | ||
| 1596 | ||
| 1597 | output scan_out; | |
| 1598 | ||
| 1599 | ||
| 1600 | ||
| 1601 | ||
| 1602 | cl_dp1_l1hdr_8x c0_0 ( | |
| 1603 | .l2clk(clk), | |
| 1604 | .pce(en), | |
| 1605 | .aclk(siclk), | |
| 1606 | .bclk(soclk), | |
| 1607 | .l1clk(l1clk), | |
| 1608 | .se(se), | |
| 1609 | .pce_ov(pce_ov), | |
| 1610 | .stop(stop), | |
| 1611 | .siclk_out(siclk_out), | |
| 1612 | .soclk_out(soclk_out) | |
| 1613 | ); | |
| 1614 | dff #(8) d0_0 ( | |
| 1615 | .l1clk(l1clk), | |
| 1616 | .siclk(siclk_out), | |
| 1617 | .soclk(soclk_out), | |
| 1618 | .d(din[7:0]), | |
| 1619 | .si({scan_in,so[6:0]}), | |
| 1620 | .so({so[6:0],scan_out}), | |
| 1621 | .q(dout[7:0]) | |
| 1622 | ); | |
| 1623 | ||
| 1624 | ||
| 1625 | ||
| 1626 | ||
| 1627 | ||
| 1628 | ||
| 1629 | ||
| 1630 | ||
| 1631 | ||
| 1632 | ||
| 1633 | ||
| 1634 | ||
| 1635 | ||
| 1636 | ||
| 1637 | ||
| 1638 | ||
| 1639 | ||
| 1640 | ||
| 1641 | ||
| 1642 | ||
| 1643 | endmodule | |
| 1644 | ||
| 1645 | ||
| 1646 | ||
| 1647 | ||
| 1648 | ||
| 1649 | ||
| 1650 | ||
| 1651 | ||
| 1652 | ||
| 1653 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
| 1654 | // also for pass-gate with decoder | |
| 1655 | ||
| 1656 | ||
| 1657 | ||
| 1658 | ||
| 1659 | ||
| 1660 | // any PARAMS parms go into naming of macro | |
| 1661 | ||
| 1662 | module lsu_cid_dp_mux_macro__mux_aope__ports_2__stack_64c__width_64 ( | |
| 1663 | din0, | |
| 1664 | din1, | |
| 1665 | sel0, | |
| 1666 | dout); | |
| 1667 | wire psel0; | |
| 1668 | wire psel1; | |
| 1669 | ||
| 1670 | input [63:0] din0; | |
| 1671 | input [63:0] din1; | |
| 1672 | input sel0; | |
| 1673 | output [63:0] dout; | |
| 1674 | ||
| 1675 | ||
| 1676 | ||
| 1677 | ||
| 1678 | ||
| 1679 | cl_dp1_penc2_8x c0_0 ( | |
| 1680 | .sel0(sel0), | |
| 1681 | .psel0(psel0), | |
| 1682 | .psel1(psel1) | |
| 1683 | ); | |
| 1684 | ||
| 1685 | mux2s #(64) d0_0 ( | |
| 1686 | .sel0(psel0), | |
| 1687 | .sel1(psel1), | |
| 1688 | .in0(din0[63:0]), | |
| 1689 | .in1(din1[63:0]), | |
| 1690 | .dout(dout[63:0]) | |
| 1691 | ); | |
| 1692 | ||
| 1693 | ||
| 1694 | ||
| 1695 | ||
| 1696 | ||
| 1697 | ||
| 1698 | ||
| 1699 | ||
| 1700 | ||
| 1701 | ||
| 1702 | ||
| 1703 | ||
| 1704 | ||
| 1705 | endmodule | |
| 1706 | ||
| 1707 | ||
| 1708 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
| 1709 | // also for pass-gate with decoder | |
| 1710 | ||
| 1711 | ||
| 1712 | ||
| 1713 | ||
| 1714 | ||
| 1715 | // any PARAMS parms go into naming of macro | |
| 1716 | ||
| 1717 | module lsu_cid_dp_mux_macro__mux_aope__ports_2__stack_10l__width_9 ( | |
| 1718 | din0, | |
| 1719 | din1, | |
| 1720 | sel0, | |
| 1721 | dout); | |
| 1722 | wire psel0; | |
| 1723 | wire psel1; | |
| 1724 | ||
| 1725 | input [8:0] din0; | |
| 1726 | input [8:0] din1; | |
| 1727 | input sel0; | |
| 1728 | output [8:0] dout; | |
| 1729 | ||
| 1730 | ||
| 1731 | ||
| 1732 | ||
| 1733 | ||
| 1734 | cl_dp1_penc2_8x c0_0 ( | |
| 1735 | .sel0(sel0), | |
| 1736 | .psel0(psel0), | |
| 1737 | .psel1(psel1) | |
| 1738 | ); | |
| 1739 | ||
| 1740 | mux2s #(9) d0_0 ( | |
| 1741 | .sel0(psel0), | |
| 1742 | .sel1(psel1), | |
| 1743 | .in0(din0[8:0]), | |
| 1744 | .in1(din1[8:0]), | |
| 1745 | .dout(dout[8:0]) | |
| 1746 | ); | |
| 1747 | ||
| 1748 | ||
| 1749 | ||
| 1750 | ||
| 1751 | ||
| 1752 | ||
| 1753 | ||
| 1754 | ||
| 1755 | ||
| 1756 | ||
| 1757 | ||
| 1758 | ||
| 1759 | ||
| 1760 | endmodule | |
| 1761 | ||
| 1762 | ||
| 1763 | // | |
| 1764 | // comparator macro (output is 1 if both inputs are equal; 0 otherwise) | |
| 1765 | // | |
| 1766 | // | |
| 1767 | ||
| 1768 | ||
| 1769 | ||
| 1770 | ||
| 1771 | ||
| 1772 | module lsu_cid_dp_cmp_macro__width_64 ( | |
| 1773 | din0, | |
| 1774 | din1, | |
| 1775 | dout); | |
| 1776 | input [63:0] din0; | |
| 1777 | input [63:0] din1; | |
| 1778 | output dout; | |
| 1779 | ||
| 1780 | ||
| 1781 | ||
| 1782 | ||
| 1783 | ||
| 1784 | ||
| 1785 | cmp #(64) m0_0 ( | |
| 1786 | .in0(din0[63:0]), | |
| 1787 | .in1(din1[63:0]), | |
| 1788 | .out(dout) | |
| 1789 | ); | |
| 1790 | ||
| 1791 | ||
| 1792 | ||
| 1793 | ||
| 1794 | ||
| 1795 | ||
| 1796 | ||
| 1797 | ||
| 1798 | ||
| 1799 | ||
| 1800 | endmodule | |
| 1801 | ||
| 1802 | ||
| 1803 | ||
| 1804 | ||
| 1805 | ||
| 1806 | // | |
| 1807 | // comparator macro (output is 1 if both inputs are equal; 0 otherwise) | |
| 1808 | // | |
| 1809 | // | |
| 1810 | ||
| 1811 | ||
| 1812 | ||
| 1813 | ||
| 1814 | ||
| 1815 | module lsu_cid_dp_cmp_macro__width_16 ( | |
| 1816 | din0, | |
| 1817 | din1, | |
| 1818 | dout); | |
| 1819 | input [15:0] din0; | |
| 1820 | input [15:0] din1; | |
| 1821 | output dout; | |
| 1822 | ||
| 1823 | ||
| 1824 | ||
| 1825 | ||
| 1826 | ||
| 1827 | ||
| 1828 | cmp #(16) m0_0 ( | |
| 1829 | .in0(din0[15:0]), | |
| 1830 | .in1(din1[15:0]), | |
| 1831 | .out(dout) | |
| 1832 | ); | |
| 1833 | ||
| 1834 | ||
| 1835 | ||
| 1836 | ||
| 1837 | ||
| 1838 | ||
| 1839 | ||
| 1840 | ||
| 1841 | ||
| 1842 | ||
| 1843 | endmodule | |
| 1844 | ||
| 1845 | ||
| 1846 | ||
| 1847 |