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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: lsu_sbc_ctl.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module lsu_sbc_ctl ( | |
36 | l2clk, | |
37 | scan_in, | |
38 | tcu_pce_ov, | |
39 | tcu_scan_en, | |
40 | spc_aclk, | |
41 | spc_bclk, | |
42 | scan_out, | |
43 | dec_st_inst_e, | |
44 | dec_fpldst_inst_e, | |
45 | dec_flush_lm, | |
46 | dec_flush_lb, | |
47 | dec_frf_r2_addr_e, | |
48 | dcc_lendian_pre_m, | |
49 | dcc_tte_vld_m, | |
50 | dcc_ldst_sz_m, | |
51 | dcc_tid_e, | |
52 | dcc_blk_inst_m, | |
53 | dcc_std_inst_m, | |
54 | dcc_asi_load_m, | |
55 | dcc_binit_st_b, | |
56 | dcc_casa_inst_b, | |
57 | dcc_exception_flush_b, | |
58 | dcc_priv_b, | |
59 | dcc_hpriv_b, | |
60 | dcc_stb_diag_rd_m, | |
61 | dcc_wr_error_inj_m, | |
62 | dcc_sync_pipe_w, | |
63 | lsu_va_b, | |
64 | lsu_asi_error_inject_b31, | |
65 | lsu_asi_error_inject_b17, | |
66 | lsu_asi_error_inject_b19, | |
67 | lsu_asi_error_inject, | |
68 | lsu_lsu_pmen, | |
69 | tlu_flush_lsu_b, | |
70 | tlu_cerer_sbdpc, | |
71 | tlu_cerer_sbdpu, | |
72 | tlu_cerer_sbapp, | |
73 | tlu_cerer_sbdiou, | |
74 | sbs0_stb_wptr_m, | |
75 | sbs1_stb_wptr_m, | |
76 | sbs2_stb_wptr_m, | |
77 | sbs3_stb_wptr_m, | |
78 | sbs4_stb_wptr_m, | |
79 | sbs5_stb_wptr_m, | |
80 | sbs6_stb_wptr_m, | |
81 | sbs7_stb_wptr_m, | |
82 | sbs0_stb_rptr, | |
83 | sbs1_stb_rptr, | |
84 | sbs2_stb_rptr, | |
85 | sbs3_stb_rptr, | |
86 | sbs4_stb_rptr, | |
87 | sbs5_stb_rptr, | |
88 | sbs6_stb_rptr, | |
89 | sbs7_stb_rptr, | |
90 | sbs_pcx_rq_vld, | |
91 | sbs_atm_rq_vld, | |
92 | sbs_asi_rq_vld, | |
93 | sbs0_state_vld, | |
94 | sbs1_state_vld, | |
95 | sbs2_state_vld, | |
96 | sbs3_state_vld, | |
97 | sbs4_state_vld, | |
98 | sbs5_state_vld, | |
99 | sbs6_state_vld, | |
100 | sbs7_state_vld, | |
101 | sbs0_state_ced, | |
102 | sbs1_state_ced, | |
103 | sbs2_state_ced, | |
104 | sbs3_state_ced, | |
105 | sbs4_state_ced, | |
106 | sbs5_state_ced, | |
107 | sbs6_state_ced, | |
108 | sbs7_state_ced, | |
109 | sbs0_st_type, | |
110 | sbs1_st_type, | |
111 | sbs2_st_type, | |
112 | sbs3_st_type, | |
113 | sbs4_st_type, | |
114 | sbs5_st_type, | |
115 | sbs6_st_type, | |
116 | sbs7_st_type, | |
117 | sbs_state_asi_rngf, | |
118 | sbs_pcx_pst_ie_p4, | |
119 | sbs_bst_req, | |
120 | sbs_asi_indet_req, | |
121 | sbs_asi_indet_retire, | |
122 | sbs_rmo_st_p4, | |
123 | sbs_blk_st_p4, | |
124 | sbs_stb_empty, | |
125 | stb_cam_hit, | |
126 | stb_cam_mhit, | |
127 | stb_ld_part_raw, | |
128 | stb_cam_hit_ptr, | |
129 | stb_cam_data, | |
130 | stb_cam_addr_b39, | |
131 | stb_cecc_err, | |
132 | stb_uecc_err, | |
133 | stb_ram_ctl, | |
134 | stb_cam_perr, | |
135 | lmd_asi_asi, | |
136 | lmd_asi_type, | |
137 | lmc_ld_inst_w, | |
138 | lmc_asi_indet_retire, | |
139 | pic_st_pcx_sel_p3, | |
140 | pic_st_asi_sel_p3, | |
141 | pic_asi_sel_p4, | |
142 | tlb_pgnum_b39, | |
143 | tlb_tte_ie_b, | |
144 | tlb_cam_mhit, | |
145 | fgu_fst_ecc_error_fx2, | |
146 | sed_bist_cmp_0, | |
147 | sed_bist_cmp_1, | |
148 | sed_bist_cmp_2, | |
149 | sed_bist_cmp_3, | |
150 | lbist_run, | |
151 | mbi_run, | |
152 | mbi_addr, | |
153 | mbi_wdata, | |
154 | mbi_stb_cam_read_en, | |
155 | mbi_stb_cam_write_en, | |
156 | mbi_stb_ram_read_en, | |
157 | mbi_stb_ram_write_en, | |
158 | bist_srm_rd_1, | |
159 | bist_scm_rd_1, | |
160 | sbc_thread_b, | |
161 | sbc_st_int_sel_m, | |
162 | sbc_std_le_m, | |
163 | sbc_st_le_if_ie_m, | |
164 | sbc_st_le_not_ie_m, | |
165 | sbc_st_sz_m, | |
166 | sbc_inv_addr_prty, | |
167 | sbc_inv_ecc, | |
168 | sbc_stb_ctl_data, | |
169 | sbc_twocycle_inst_w, | |
170 | sbc_tte_vld_b, | |
171 | sbc_cam_wvld_m, | |
172 | sbc_cam_wptr_vld_m, | |
173 | sbc_cam_rptr_vld, | |
174 | sbc_cam_rwptr, | |
175 | sbc_cam_line_en_m, | |
176 | sbc_ram_wptr_vld_b, | |
177 | sbc_ram_rptr_vld, | |
178 | sbc_ram_wptr, | |
179 | sbc_ram_rptr, | |
180 | sbc_cam_tid, | |
181 | sbc_diag_wptr_w3, | |
182 | sbc_st_rq_p2, | |
183 | sbc_st_atomic_p2, | |
184 | sbc_pcx_rq_p3, | |
185 | sbc_asi_rq_p3, | |
186 | sbc_st_sel_p3, | |
187 | sbc_bst_sel, | |
188 | sbc_st_sel_tid_p4, | |
189 | sbc_st_pcx_nc, | |
190 | sbc_pcx_bmask, | |
191 | sbc_pcx_addr, | |
192 | sbc_pcx_rmo_st, | |
193 | sbc_pcx_blk_st, | |
194 | sbc_st_asi_fs, | |
195 | sbc_st_addr_new, | |
196 | sbc_spd_clken, | |
197 | sbc_ramout_clken, | |
198 | sbc_tidb_eq_tidw, | |
199 | sbc_tid_m, | |
200 | sbc_st_atom_p3, | |
201 | sbc_load_bst_addr, | |
202 | sbc_bst_in_prog_m, | |
203 | sbc_bst_in_prog_b, | |
204 | sbc_bst_offset, | |
205 | sbc_rmo_st_b, | |
206 | sbc_rawp_rst, | |
207 | sbc_fgu_ecc_b, | |
208 | sbc_bst_rd_err, | |
209 | sbc_pid_kill_store_p4_, | |
210 | sbc_pic_kill_store_p4_, | |
211 | sbc_sbs_kill_store_p4_, | |
212 | sbc_force_inv, | |
213 | sbc_st_type_p4, | |
214 | sbc_blk_inst_b, | |
215 | sbc_indet_block_p3, | |
216 | lsu_block_store_stall, | |
217 | lsu_block_store_rd, | |
218 | lsu_block_store_tid, | |
219 | lsu_block_store_alloc, | |
220 | lsu_block_store_b, | |
221 | lsu_block_store_m, | |
222 | lsu_sbdpc_err_g, | |
223 | lsu_sbdpu_err_g, | |
224 | lsu_sbapp_err_g, | |
225 | lsu_sbdiou_err_g, | |
226 | lsu_stberr_index_g, | |
227 | lsu_stberr_priv_g, | |
228 | lsu_stb_flush_g, | |
229 | lsu_frf_read_pending, | |
230 | sbc_mbi_run, | |
231 | lsu_mbi_stb_cam_fail, | |
232 | lsu_mbi_stb_ram_fail, | |
233 | lsu_mbi_scm_hit, | |
234 | lsu_mbi_scm_mhit, | |
235 | lsu_mbi_scm_hit_ptr, | |
236 | lsu_mbi_scm_praw); | |
237 | wire se; | |
238 | wire pce_ov; | |
239 | wire stop; | |
240 | wire siclk; | |
241 | wire soclk; | |
242 | wire stb_clken; | |
243 | wire stb_cam_wptr_vld_m; | |
244 | wire stb_cam_wptr_vld_b; | |
245 | wire stb_cam_wptr_vld_w; | |
246 | wire st_rq_p1; | |
247 | wire st_rq_p2; | |
248 | wire st_rq_p3; | |
249 | wire st_rq_p4; | |
250 | wire l1clk_pm1; | |
251 | wire l1clk; | |
252 | wire dff_flush_b_scanin; | |
253 | wire dff_flush_b_scanout; | |
254 | wire local_flush_b; | |
255 | wire flush_b; | |
256 | wire pipe_flush_b; | |
257 | wire dff_flush_w_scanin; | |
258 | wire dff_flush_w_scanout; | |
259 | wire flush_w; | |
260 | wire dff_inst_m_scanin; | |
261 | wire dff_inst_m_scanout; | |
262 | wire [4:3] bst_addr_m; | |
263 | wire st_inst_vld_m; | |
264 | wire dff_ldst_fp_m_scanin; | |
265 | wire dff_ldst_fp_m_scanout; | |
266 | wire ldst_fp_m; | |
267 | wire bst_in_prog_m; | |
268 | wire [1:0] st_sz_m; | |
269 | wire std_inst_b; | |
270 | wire [1:0] st_sz_b; | |
271 | wire dff_ldst_sz_b_scanin; | |
272 | wire dff_ldst_sz_b_scanout; | |
273 | wire tidm_eq_tidb; | |
274 | wire [2:0] tid_m; | |
275 | wire [2:0] tid_b; | |
276 | wire dff_st_w_scanin; | |
277 | wire dff_st_w_scanout; | |
278 | wire casa_inst_w; | |
279 | wire st_lendian_b; | |
280 | wire lendian_pre_b; | |
281 | wire st_pre_le_m; | |
282 | wire block_store_lendian; | |
283 | wire std_le_m; | |
284 | wire st_le_if_ie_m; | |
285 | wire st_le_not_ie_m; | |
286 | wire dff_st_le_b_scanin; | |
287 | wire dff_st_le_b_scanout; | |
288 | wire stb_cam_hit_b; | |
289 | wire stb_cam_mhit_b; | |
290 | wire stb_ld_part_raw_b; | |
291 | wire [2:0] stb_cam_hit_ptr_b; | |
292 | wire dff_cam_hit_scanin; | |
293 | wire dff_cam_hit_scanout; | |
294 | wire [2:0] tid_w; | |
295 | wire stb_cam_hit_w; | |
296 | wire stb_cam_mhit_w; | |
297 | wire stb_ld_part_raw_w; | |
298 | wire [2:0] stb_cam_hit_ptr_w; | |
299 | wire full_raw_w; | |
300 | wire io_or_asi_load_w; | |
301 | wire [7:0] thread_w; | |
302 | wire [7:0] thread_m; | |
303 | wire mbi_run_local; | |
304 | wire dff_ram_wptr_vld_b_scanin; | |
305 | wire dff_ram_wptr_vld_b_scanout; | |
306 | wire stb_ram_wptr_vld_b; | |
307 | wire std_inst_w; | |
308 | wire dff_stb_wptr_vld_w_scanin; | |
309 | wire dff_stb_wptr_vld_w_scanout; | |
310 | wire unflushed_store_w; | |
311 | wire [2:0] tid_e; | |
312 | wire bst_in_prog_e; | |
313 | wire [2:0] bst_tid; | |
314 | wire dff_tid_m_scanin; | |
315 | wire dff_tid_m_scanout; | |
316 | wire dff_thread_b_scanin; | |
317 | wire dff_thread_b_scanout; | |
318 | wire [7:0] thread_b; | |
319 | wire [2:0] stb_wptr; | |
320 | wire [2:0] cam_wptr_m; | |
321 | wire st_pcx_rq_p2; | |
322 | wire st_asi_rq_p2; | |
323 | wire any_bst_req; | |
324 | wire stb_diag_rd_w; | |
325 | wire [5:3] va_w; | |
326 | wire [2:0] st_rd_tid; | |
327 | wire [2:0] stb_rptr_pcx; | |
328 | wire dff_cam_wptr_scanin; | |
329 | wire dff_cam_wptr_scanout; | |
330 | wire [2:0] cam_wptr_b; | |
331 | wire [2:0] cam_wptr_w; | |
332 | wire [2:0] cam_wptr_w2; | |
333 | wire [2:0] cam_wptr_w3; | |
334 | wire dff_ram_rptr_scanin; | |
335 | wire dff_ram_rptr_scanout; | |
336 | wire [2:0] ram_rptr_d1; | |
337 | wire stb_diag_rd_b_in; | |
338 | wire ram_rptr_vld_2; | |
339 | wire [2:0] ram_rptr_d2; | |
340 | wire stb_diag_rd_b; | |
341 | wire [7:0] st_rd_thread; | |
342 | wire [7:0] asi_rq_vld; | |
343 | wire asi_indet_block; | |
344 | wire asi_indet_sel_qual_p2; | |
345 | wire asi_indet_sel_p3; | |
346 | wire asi_rq_blocked_p1; | |
347 | wire [7:0] pcx_rq_vld; | |
348 | wire [7:0] st_rq_vld_p1; | |
349 | wire [7:0] st_rq_sel_p2; | |
350 | wire [7:0] st_sel_p3; | |
351 | wire [7:0] st_rq_asi_p1; | |
352 | wire dff_st_rq_p2_scanin; | |
353 | wire dff_st_rq_p2_scanout; | |
354 | wire [7:0] st_rq_vld_p2; | |
355 | wire [7:0] st_rq_asi_p2; | |
356 | wire asi_rq_blocked_p2; | |
357 | wire stb_hazard_p2; | |
358 | wire st_pcx_rq_p3; | |
359 | wire st_asi_rq_p3; | |
360 | wire st_lru8_scanin; | |
361 | wire st_lru8_scanout; | |
362 | wire [7:0] st_lru_update_p3; | |
363 | wire [7:0] st_rq_sel_unqual_p2; | |
364 | wire st_asi_unqual_p2; | |
365 | wire [2:0] st_tid_p2; | |
366 | wire asi_indet_sel_p2; | |
367 | wire dff_indet_temp_scanin; | |
368 | wire dff_indet_temp_scanout; | |
369 | wire asi_rq_blocked_p3; | |
370 | wire indet_block_req_p2; | |
371 | wire indet_block_req_p3; | |
372 | wire [7:0] bst_sel; | |
373 | wire dff_st_sel_p3_scanin; | |
374 | wire dff_st_sel_p3_scanout; | |
375 | wire [7:0] st_rq_sel_p3; | |
376 | wire [7:0] st_atom_p3; | |
377 | wire st_asi_fs_p3; | |
378 | wire asi_indet_in; | |
379 | wire dff_asi_indet_scanin; | |
380 | wire dff_asi_indet_scanout; | |
381 | wire dff_st_sel_p4_scanin; | |
382 | wire dff_st_sel_p4_scanout; | |
383 | wire [7:0] st_sel_p4; | |
384 | wire st_asi_sel_p4; | |
385 | wire st_pcx_sel_p4; | |
386 | wire [2:0] st_sel_tid_p4; | |
387 | wire bst_p2; | |
388 | wire pst_ie_p4; | |
389 | wire [7:0] bmask_ie; | |
390 | wire [1:0] st_type_enc; | |
391 | wire dff_cerer_scanin; | |
392 | wire dff_cerer_scanout; | |
393 | wire cerer_sbdpc; | |
394 | wire cerer_sbdpu; | |
395 | wire cerer_sbapp; | |
396 | wire cerer_sbdiou; | |
397 | wire sbdpc_err; | |
398 | wire st_err_flush; | |
399 | wire sbdpu_err; | |
400 | wire sbapp_err; | |
401 | wire sbdiou_err; | |
402 | wire kill_store_p4_; | |
403 | wire [1:0] stb_priv; | |
404 | wire dff_stb_err_scanin; | |
405 | wire dff_stb_err_scanout; | |
406 | wire [7:0] fatal_err_cond_in; | |
407 | wire [7:0] fatal_err_cond; | |
408 | wire dff_fatal_err_scanin; | |
409 | wire dff_fatal_err_scanout; | |
410 | wire dff_bst_addr_pipe_scanin; | |
411 | wire dff_bst_addr_pipe_scanout; | |
412 | wire [4:3] bst_addr_b; | |
413 | wire [4:3] bst_addr0_in; | |
414 | wire [4:3] bst_addr0; | |
415 | wire [4:3] bst_addr1_in; | |
416 | wire [4:3] bst_addr1; | |
417 | wire [4:3] bst_addr2_in; | |
418 | wire [4:3] bst_addr2; | |
419 | wire [4:3] bst_addr3_in; | |
420 | wire [4:3] bst_addr3; | |
421 | wire [4:3] bst_addr4_in; | |
422 | wire [4:3] bst_addr4; | |
423 | wire [4:3] bst_addr5_in; | |
424 | wire [4:3] bst_addr5; | |
425 | wire [4:3] bst_addr6_in; | |
426 | wire [4:3] bst_addr6; | |
427 | wire [4:3] bst_addr7_in; | |
428 | wire [4:3] bst_addr7; | |
429 | wire dff_bst_addr_scanin; | |
430 | wire dff_bst_addr_scanout; | |
431 | wire [7:0] bst_lendian_in; | |
432 | wire [7:0] bst_lendian; | |
433 | wire dff_bst_lendian_scanin; | |
434 | wire dff_bst_lendian_scanout; | |
435 | wire bst_busy_rst; | |
436 | wire [2:0] bst_count; | |
437 | wire bst_busy_in; | |
438 | wire bst_busy; | |
439 | wire dff_bst_busy_scanin; | |
440 | wire dff_bst_busy_scanout; | |
441 | wire bst_busy_out; | |
442 | wire bst_lru8_scanin; | |
443 | wire bst_lru8_scanout; | |
444 | wire [7:0] bst_sel_unqual_p; | |
445 | wire dff_bst_req_scanin; | |
446 | wire dff_bst_req_scanout; | |
447 | wire [7:0] bst_sel_unqual; | |
448 | wire frf_read_pending; | |
449 | wire [7:0] block_store_thread; | |
450 | wire [2:0] bst_tid_in; | |
451 | wire dff_bst_tid_scanin; | |
452 | wire dff_bst_tid_scanout; | |
453 | wire bst_in_prog_b; | |
454 | wire rmo_st_w; | |
455 | wire dff_rmo_st_w_scanin; | |
456 | wire dff_rmo_st_w_scanout; | |
457 | wire dff_bst_seq_scanin; | |
458 | wire dff_bst_seq_scanout; | |
459 | wire bst_p1; | |
460 | wire bst_p2_in; | |
461 | wire bst_p3; | |
462 | wire [2:0] bst_count_in; | |
463 | wire dff_bst_count_scanin; | |
464 | wire dff_bst_count_scanout; | |
465 | wire bst_err_p3; | |
466 | wire dff_bst_rd_err_scanin; | |
467 | wire dff_bst_rd_err_scanout; | |
468 | wire bst_err_p4; | |
469 | wire dff_std_seq_scanin; | |
470 | wire dff_std_seq_scanout; | |
471 | wire dff_praw_ctl_w_scanin; | |
472 | wire dff_praw_ctl_w_scanout; | |
473 | wire io_or_asi_load_b; | |
474 | wire asi_load_b; | |
475 | wire [2:0] last_stb_wptr_w; | |
476 | wire [2:0] rawp_id_w; | |
477 | wire [2:0] rawp_id0; | |
478 | wire [2:0] rawp_id0_hold; | |
479 | wire dff_rawp_id0_scanin; | |
480 | wire dff_rawp_id0_scanout; | |
481 | wire [7:0] dec_rawp_id0; | |
482 | wire [2:0] rawp_id1; | |
483 | wire [2:0] rawp_id1_hold; | |
484 | wire dff_rawp_id1_scanin; | |
485 | wire dff_rawp_id1_scanout; | |
486 | wire [7:0] dec_rawp_id1; | |
487 | wire [2:0] rawp_id2; | |
488 | wire [2:0] rawp_id2_hold; | |
489 | wire dff_rawp_id2_scanin; | |
490 | wire dff_rawp_id2_scanout; | |
491 | wire [7:0] dec_rawp_id2; | |
492 | wire [2:0] rawp_id3; | |
493 | wire [2:0] rawp_id3_hold; | |
494 | wire dff_rawp_id3_scanin; | |
495 | wire dff_rawp_id3_scanout; | |
496 | wire [7:0] dec_rawp_id3; | |
497 | wire [2:0] rawp_id4; | |
498 | wire [2:0] rawp_id4_hold; | |
499 | wire dff_rawp_id4_scanin; | |
500 | wire dff_rawp_id4_scanout; | |
501 | wire [7:0] dec_rawp_id4; | |
502 | wire [2:0] rawp_id5; | |
503 | wire [2:0] rawp_id5_hold; | |
504 | wire dff_rawp_id5_scanin; | |
505 | wire dff_rawp_id5_scanout; | |
506 | wire [7:0] dec_rawp_id5; | |
507 | wire [2:0] rawp_id6; | |
508 | wire [2:0] rawp_id6_hold; | |
509 | wire dff_rawp_id6_scanin; | |
510 | wire dff_rawp_id6_scanout; | |
511 | wire [7:0] dec_rawp_id6; | |
512 | wire [2:0] rawp_id7; | |
513 | wire [2:0] rawp_id7_hold; | |
514 | wire dff_rawp_id7_scanin; | |
515 | wire dff_rawp_id7_scanout; | |
516 | wire [7:0] dec_rawp_id7; | |
517 | wire [2:0] priv_enc; | |
518 | wire inv_addr_prty_m; | |
519 | wire inv_ecc_m; | |
520 | wire dff_error_inj_scanin; | |
521 | wire dff_error_inj_scanout; | |
522 | wire inv_addr_prty_b; | |
523 | wire inv_ecc_b; | |
524 | wire dff_bist_in_scanin; | |
525 | wire dff_bist_in_scanout; | |
526 | wire bist_scm_cmp_en; | |
527 | wire bist_srm_cmp_en; | |
528 | wire stb_cam_fail; | |
529 | wire stb_ram_fail; | |
530 | wire dff_bist_fail_scanin; | |
531 | wire dff_bist_fail_scanout; | |
532 | wire frf_read_out; | |
533 | wire frf_read_pending_in; | |
534 | wire dff_frf_read_scanin; | |
535 | wire dff_frf_read_scanout; | |
536 | wire spares_scanin; | |
537 | wire spares_scanout; | |
538 | wire [2:0] unused; | |
539 | wire indet_block_req_p4; | |
540 | ||
541 | ||
542 | input l2clk; | |
543 | input scan_in; | |
544 | input tcu_pce_ov; // scan signals | |
545 | input tcu_scan_en; | |
546 | input spc_aclk; | |
547 | input spc_bclk; | |
548 | output scan_out; | |
549 | ||
550 | input dec_st_inst_e; | |
551 | input dec_fpldst_inst_e; | |
552 | input dec_flush_lm; | |
553 | input dec_flush_lb; | |
554 | input [4:3] dec_frf_r2_addr_e; | |
555 | ||
556 | input dcc_lendian_pre_m; | |
557 | input dcc_tte_vld_m; | |
558 | input [1:0] dcc_ldst_sz_m; | |
559 | input [2:0] dcc_tid_e; | |
560 | input dcc_blk_inst_m; | |
561 | input dcc_std_inst_m; | |
562 | input dcc_asi_load_m; | |
563 | input dcc_binit_st_b; | |
564 | input dcc_casa_inst_b; | |
565 | input dcc_exception_flush_b; | |
566 | input dcc_priv_b; | |
567 | input dcc_hpriv_b; | |
568 | input dcc_stb_diag_rd_m; | |
569 | input dcc_wr_error_inj_m; | |
570 | input dcc_sync_pipe_w; | |
571 | ||
572 | input [5:3] lsu_va_b; | |
573 | input lsu_asi_error_inject_b31; | |
574 | input lsu_asi_error_inject_b17; | |
575 | input lsu_asi_error_inject_b19; | |
576 | input [6:0] lsu_asi_error_inject; | |
577 | input lsu_lsu_pmen; | |
578 | ||
579 | input tlu_flush_lsu_b; | |
580 | input tlu_cerer_sbdpc; | |
581 | input tlu_cerer_sbdpu; | |
582 | input tlu_cerer_sbapp; | |
583 | input tlu_cerer_sbdiou; | |
584 | ||
585 | input [2:0] sbs0_stb_wptr_m; | |
586 | input [2:0] sbs1_stb_wptr_m; | |
587 | input [2:0] sbs2_stb_wptr_m; | |
588 | input [2:0] sbs3_stb_wptr_m; | |
589 | input [2:0] sbs4_stb_wptr_m; | |
590 | input [2:0] sbs5_stb_wptr_m; | |
591 | input [2:0] sbs6_stb_wptr_m; | |
592 | input [2:0] sbs7_stb_wptr_m; | |
593 | input [2:0] sbs0_stb_rptr; | |
594 | input [2:0] sbs1_stb_rptr; | |
595 | input [2:0] sbs2_stb_rptr; | |
596 | input [2:0] sbs3_stb_rptr; | |
597 | input [2:0] sbs4_stb_rptr; | |
598 | input [2:0] sbs5_stb_rptr; | |
599 | input [2:0] sbs6_stb_rptr; | |
600 | input [2:0] sbs7_stb_rptr; | |
601 | input [7:0] sbs_pcx_rq_vld; // Request for pcx - one per thread | |
602 | input [7:0] sbs_atm_rq_vld; // Atomic request (CAS) | |
603 | input [7:0] sbs_asi_rq_vld; // Request for asi - one per thread | |
604 | input [7:0] sbs0_state_vld; | |
605 | input [7:0] sbs1_state_vld; | |
606 | input [7:0] sbs2_state_vld; | |
607 | input [7:0] sbs3_state_vld; | |
608 | input [7:0] sbs4_state_vld; | |
609 | input [7:0] sbs5_state_vld; | |
610 | input [7:0] sbs6_state_vld; | |
611 | input [7:0] sbs7_state_vld; | |
612 | input [7:0] sbs0_state_ced; | |
613 | input [7:0] sbs1_state_ced; | |
614 | input [7:0] sbs2_state_ced; | |
615 | input [7:0] sbs3_state_ced; | |
616 | input [7:0] sbs4_state_ced; | |
617 | input [7:0] sbs5_state_ced; | |
618 | input [7:0] sbs6_state_ced; | |
619 | input [7:0] sbs7_state_ced; | |
620 | input [1:0] sbs0_st_type; | |
621 | input [1:0] sbs1_st_type; | |
622 | input [1:0] sbs2_st_type; | |
623 | input [1:0] sbs3_st_type; | |
624 | input [1:0] sbs4_st_type; | |
625 | input [1:0] sbs5_st_type; | |
626 | input [1:0] sbs6_st_type; | |
627 | input [1:0] sbs7_st_type; | |
628 | input [7:0] sbs_state_asi_rngf; | |
629 | input [7:0] sbs_pcx_pst_ie_p4; | |
630 | input [7:0] sbs_bst_req; | |
631 | input [7:0] sbs_asi_indet_req; | |
632 | input [7:0] sbs_asi_indet_retire; | |
633 | input [7:0] sbs_rmo_st_p4; | |
634 | input [7:0] sbs_blk_st_p4; | |
635 | input [7:0] sbs_stb_empty; | |
636 | ||
637 | input stb_cam_hit; | |
638 | input stb_cam_mhit; | |
639 | input stb_ld_part_raw; | |
640 | input [2:0] stb_cam_hit_ptr; | |
641 | input [7:0] stb_cam_data; // Byte mask (also has ASI value for internal ASI stores) | |
642 | input stb_cam_addr_b39; | |
643 | input stb_cecc_err; | |
644 | input stb_uecc_err; | |
645 | input [2:0] stb_ram_ctl; | |
646 | ||
647 | input stb_cam_perr; // parity error occured on CAM read | |
648 | ||
649 | input [7:0] lmd_asi_asi; | |
650 | input [1:0] lmd_asi_type; | |
651 | ||
652 | input lmc_ld_inst_w; // Unflushed load in W | |
653 | input lmc_asi_indet_retire; | |
654 | ||
655 | input pic_st_pcx_sel_p3; // STB gets access to pcx | |
656 | input pic_st_asi_sel_p3; // STB gets access to asi | |
657 | input pic_asi_sel_p4; | |
658 | ||
659 | input tlb_pgnum_b39; | |
660 | input tlb_tte_ie_b; | |
661 | input tlb_cam_mhit; | |
662 | ||
663 | input fgu_fst_ecc_error_fx2; | |
664 | ||
665 | input sed_bist_cmp_0; | |
666 | input sed_bist_cmp_1; | |
667 | input sed_bist_cmp_2; | |
668 | input sed_bist_cmp_3; | |
669 | ||
670 | input lbist_run; | |
671 | input mbi_run; | |
672 | input [5:0] mbi_addr; | |
673 | input [2:0] mbi_wdata; | |
674 | input mbi_stb_cam_read_en; | |
675 | input mbi_stb_cam_write_en; | |
676 | input mbi_stb_ram_read_en; | |
677 | input mbi_stb_ram_write_en; | |
678 | output bist_srm_rd_1; | |
679 | output bist_scm_rd_1; | |
680 | ||
681 | output [7:0] sbc_thread_b; | |
682 | output sbc_st_int_sel_m; | |
683 | output sbc_std_le_m; | |
684 | output sbc_st_le_if_ie_m; | |
685 | output sbc_st_le_not_ie_m; | |
686 | output [1:0] sbc_st_sz_m; | |
687 | output sbc_inv_addr_prty; | |
688 | output [6:0] sbc_inv_ecc; | |
689 | output [2:0] sbc_stb_ctl_data; | |
690 | output sbc_twocycle_inst_w; | |
691 | output sbc_tte_vld_b; // tlb_miss not accounted for | |
692 | ||
693 | output [7:0] sbc_cam_wvld_m; | |
694 | output sbc_cam_wptr_vld_m; // enable stb_cam write | |
695 | output sbc_cam_rptr_vld; | |
696 | output [5:0] sbc_cam_rwptr; // stb_cam write pointer | |
697 | output [7:0] sbc_cam_line_en_m; | |
698 | output sbc_ram_wptr_vld_b; // enable stb_ram write | |
699 | output sbc_ram_rptr_vld; | |
700 | output [5:0] sbc_ram_wptr; // stb_ram write pointer | |
701 | output [5:0] sbc_ram_rptr; // stb_ram read pointer | |
702 | output [2:0] sbc_cam_tid; // stb_cam lookup tid | |
703 | output [2:0] sbc_diag_wptr_w3; | |
704 | ||
705 | output sbc_st_rq_p2; | |
706 | output sbc_st_atomic_p2; | |
707 | output sbc_pcx_rq_p3; // STB wants access to the pcx | |
708 | output sbc_asi_rq_p3; // STB wants access to the asi | |
709 | output [7:0] sbc_st_sel_p3; // Selected thread in P3 (not qual'ed with store select) | |
710 | output [7:0] sbc_bst_sel; | |
711 | output [2:0] sbc_st_sel_tid_p4; | |
712 | output sbc_st_pcx_nc; | |
713 | output [7:0] sbc_pcx_bmask; // Byte mask for pcx requests | |
714 | output [2:0] sbc_pcx_addr; // Byte mask for pcx requests | |
715 | output sbc_pcx_rmo_st; // Store in P4 is RMO | |
716 | output sbc_pcx_blk_st; // Store in P4 is block store | |
717 | output sbc_st_asi_fs; | |
718 | output [7:0] sbc_st_addr_new; | |
719 | output sbc_spd_clken; | |
720 | output sbc_ramout_clken; | |
721 | output sbc_tidb_eq_tidw; | |
722 | output [2:0] sbc_tid_m; | |
723 | output [7:0] sbc_st_atom_p3; | |
724 | output sbc_load_bst_addr; // Enables the bst addr register in sbd | |
725 | output sbc_bst_in_prog_m; | |
726 | output sbc_bst_in_prog_b; | |
727 | output [2:0] sbc_bst_offset; | |
728 | output sbc_rmo_st_b; | |
729 | output [7:0] sbc_rawp_rst; | |
730 | output sbc_fgu_ecc_b; | |
731 | output sbc_bst_rd_err; | |
732 | output sbc_pid_kill_store_p4_; | |
733 | output sbc_pic_kill_store_p4_; | |
734 | output sbc_sbs_kill_store_p4_; | |
735 | output sbc_force_inv; | |
736 | output [2:0] sbc_st_type_p4; | |
737 | output sbc_blk_inst_b; | |
738 | output sbc_indet_block_p3; | |
739 | ||
740 | output lsu_block_store_stall; | |
741 | output [4:3] lsu_block_store_rd; | |
742 | output [2:0] lsu_block_store_tid; | |
743 | output [7:0] lsu_block_store_alloc; | |
744 | output [7:0] lsu_block_store_b; | |
745 | output lsu_block_store_m; | |
746 | ||
747 | output lsu_sbdpc_err_g; | |
748 | output lsu_sbdpu_err_g; | |
749 | output lsu_sbapp_err_g; | |
750 | output lsu_sbdiou_err_g; | |
751 | output [2:0] lsu_stberr_index_g; | |
752 | output [1:0] lsu_stberr_priv_g; | |
753 | output lsu_stb_flush_g; | |
754 | ||
755 | output lsu_frf_read_pending; | |
756 | ||
757 | output sbc_mbi_run; | |
758 | output lsu_mbi_stb_cam_fail; | |
759 | output lsu_mbi_stb_ram_fail; | |
760 | output lsu_mbi_scm_hit; | |
761 | output lsu_mbi_scm_mhit; | |
762 | output [2:0] lsu_mbi_scm_hit_ptr; | |
763 | output lsu_mbi_scm_praw; | |
764 | ||
765 | // scan renames | |
766 | assign se = tcu_scan_en; | |
767 | assign pce_ov = tcu_pce_ov; | |
768 | assign stop = 1'b0; | |
769 | assign siclk = spc_aclk; | |
770 | assign soclk = spc_bclk; | |
771 | // end scan | |
772 | ||
773 | ////////////////////////////// | |
774 | // Clock header | |
775 | ////////////////////////////// | |
776 | ||
777 | assign stb_clken = stb_cam_wptr_vld_m | stb_cam_wptr_vld_b | stb_cam_wptr_vld_w | | |
778 | st_rq_p1 | st_rq_p2 | st_rq_p3 | st_rq_p4 | mbi_run | ~lsu_lsu_pmen; | |
779 | ||
780 | lsu_sbc_ctll1clkhdr_ctl_macro clkgen_stb ( | |
781 | .l2clk (l2clk ), | |
782 | .l1en (stb_clken ), | |
783 | .l1clk (l1clk_pm1 ), | |
784 | .pce_ov(pce_ov), | |
785 | .stop(stop), | |
786 | .se(se) | |
787 | ); | |
788 | ||
789 | lsu_sbc_ctll1clkhdr_ctl_macro clkgen ( | |
790 | .l2clk (l2clk ), | |
791 | .l1en (1'b1 ), | |
792 | .l1clk (l1clk ), | |
793 | .pce_ov(pce_ov), | |
794 | .stop(stop), | |
795 | .se(se) | |
796 | ); | |
797 | ||
798 | ////////////////////////////// | |
799 | // Flush logic | |
800 | ////////////////////////////// | |
801 | ||
802 | lsu_sbc_ctlmsff_ctl_macro__width_1 dff_flush_b ( | |
803 | .scan_in(dff_flush_b_scanin), | |
804 | .scan_out(dff_flush_b_scanout), | |
805 | .din (dec_flush_lm), | |
806 | .dout (local_flush_b), | |
807 | .l1clk(l1clk), | |
808 | .siclk(siclk), | |
809 | .soclk(soclk) | |
810 | ); | |
811 | ||
812 | assign flush_b = tlu_flush_lsu_b | dec_flush_lb | local_flush_b | dcc_exception_flush_b; | |
813 | assign pipe_flush_b = dec_flush_lb | local_flush_b; | |
814 | ||
815 | lsu_sbc_ctlmsff_ctl_macro__width_1 dff_flush_w ( | |
816 | .scan_in(dff_flush_w_scanin), | |
817 | .scan_out(dff_flush_w_scanout), | |
818 | .din (flush_b), | |
819 | .dout (flush_w), | |
820 | .l1clk(l1clk), | |
821 | .siclk(siclk), | |
822 | .soclk(soclk) | |
823 | ); | |
824 | ||
825 | /////////////////////////////////////////////////// | |
826 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_inst_m ( | |
827 | .scan_in(dff_inst_m_scanin), | |
828 | .scan_out(dff_inst_m_scanout), | |
829 | .din ({dec_frf_r2_addr_e[4:3],dec_st_inst_e}), | |
830 | .dout ({bst_addr_m[4:3], st_inst_vld_m}), | |
831 | .l1clk(l1clk), | |
832 | .siclk(siclk), | |
833 | .soclk(soclk) | |
834 | ); | |
835 | ||
836 | ||
837 | //////////////////////////////////////////////////////////////////////////////// | |
838 | // Store data source selects | |
839 | //////////////////////////////////////////////////////////////////////////////// | |
840 | ||
841 | // M stage | |
842 | // Select between integer store and fp stores. FP stores can be 32b or | |
843 | // 64b. | |
844 | lsu_sbc_ctlmsff_ctl_macro__width_1 dff_ldst_fp_m ( | |
845 | .scan_in(dff_ldst_fp_m_scanin), | |
846 | .scan_out(dff_ldst_fp_m_scanout), | |
847 | .din (dec_fpldst_inst_e), | |
848 | .dout (ldst_fp_m), | |
849 | .l1clk(l1clk), | |
850 | .siclk(siclk), | |
851 | .soclk(soclk) | |
852 | ); | |
853 | ||
854 | assign sbc_st_int_sel_m = ~(ldst_fp_m | bst_in_prog_m); | |
855 | ||
856 | //////////////////////////////////////////////////////////////////////////////// | |
857 | // Store data formatting | |
858 | // | |
859 | // Data must be swapped if little endian and then replicated for stores less | |
860 | // than 8 bytes. | |
861 | //////////////////////////////////////////////////////////////////////////////// | |
862 | ||
863 | // Force block stores to size=11. CAS formats data over two cycles. | |
864 | assign st_sz_m[1:0] = ((dcc_casa_inst_b | std_inst_b) ? st_sz_b[1:0] : dcc_ldst_sz_m[1:0]) | | |
865 | {2{bst_in_prog_m}} ; | |
866 | ||
867 | assign sbc_st_sz_m[1:0] = st_sz_m[1:0]; | |
868 | ||
869 | lsu_sbc_ctlmsff_ctl_macro__width_2 dff_ldst_sz_b ( | |
870 | .scan_in(dff_ldst_sz_b_scanin), | |
871 | .scan_out(dff_ldst_sz_b_scanout), | |
872 | .l1clk (l1clk_pm1), | |
873 | .din (st_sz_m[1:0]), | |
874 | .dout (st_sz_b[1:0]), | |
875 | .siclk(siclk), | |
876 | .soclk(soclk) | |
877 | ); | |
878 | ||
879 | assign tidm_eq_tidb = (tid_m[2:0] == tid_b[2:0]) & stb_cam_wptr_vld_b; | |
880 | ||
881 | lsu_sbc_ctlmsff_ctl_macro__width_2 dff_st_w ( | |
882 | .scan_in(dff_st_w_scanin), | |
883 | .scan_out(dff_st_w_scanout), | |
884 | .l1clk (l1clk_pm1), | |
885 | .din ({tidm_eq_tidb, dcc_casa_inst_b}), | |
886 | .dout ({sbc_tidb_eq_tidw, casa_inst_w}), | |
887 | .siclk(siclk), | |
888 | .soclk(soclk) | |
889 | ); | |
890 | ||
891 | // Endian swapping in sbd. PE mux defaults to big endian. Final qualification with TTE.IE will be | |
892 | // done in sbd for timing reasons. | |
893 | assign st_lendian_b = lendian_pre_b ^ (sbc_tte_vld_b & tlb_tte_ie_b); | |
894 | ||
895 | assign st_pre_le_m = (dcc_casa_inst_b & st_lendian_b) | | |
896 | (bst_in_prog_m & block_store_lendian) | | |
897 | (st_inst_vld_m & dcc_lendian_pre_m); | |
898 | ||
899 | assign std_le_m = std_inst_b & st_lendian_b; | |
900 | assign st_le_if_ie_m = (dcc_tte_vld_m & ~st_pre_le_m) | (~dcc_tte_vld_m & st_pre_le_m); | |
901 | assign st_le_not_ie_m = (dcc_tte_vld_m & st_pre_le_m) | (~dcc_tte_vld_m & st_pre_le_m); | |
902 | ||
903 | assign sbc_std_le_m = std_le_m; | |
904 | assign sbc_st_le_if_ie_m = st_le_if_ie_m; | |
905 | assign sbc_st_le_not_ie_m = st_le_not_ie_m; | |
906 | ||
907 | lsu_sbc_ctlmsff_ctl_macro__width_2 dff_st_le_b ( | |
908 | .scan_in(dff_st_le_b_scanin), | |
909 | .scan_out(dff_st_le_b_scanout), | |
910 | .l1clk (l1clk_pm1), | |
911 | .din ({dcc_tte_vld_m,dcc_lendian_pre_m}), | |
912 | .dout ({sbc_tte_vld_b, lendian_pre_b}), | |
913 | .siclk(siclk), | |
914 | .soclk(soclk) | |
915 | ); | |
916 | ||
917 | ||
918 | //////////////////////////////////////////////////////////////////////////////// | |
919 | // STB array controls | |
920 | //////////////////////////////////////////////////////////////////////////////// | |
921 | ||
922 | assign stb_cam_hit_b = stb_cam_hit & ~lbist_run; | |
923 | assign stb_cam_mhit_b = stb_cam_mhit & ~lbist_run; | |
924 | assign stb_ld_part_raw_b = stb_ld_part_raw & ~lbist_run; | |
925 | assign stb_cam_hit_ptr_b[2:0] = stb_cam_hit_ptr[2:0] & {3{~lbist_run}}; | |
926 | ||
927 | lsu_sbc_ctlmsff_ctl_macro__width_9 dff_cam_hit ( | |
928 | .scan_in(dff_cam_hit_scanin), | |
929 | .scan_out(dff_cam_hit_scanout), | |
930 | .din ({tid_b[2:0],stb_cam_hit_b,stb_cam_mhit_b,stb_ld_part_raw_b,stb_cam_hit_ptr_b[2:0]}), | |
931 | .dout ({tid_w[2:0],stb_cam_hit_w,stb_cam_mhit_w,stb_ld_part_raw_w,stb_cam_hit_ptr_w[2:0]}), | |
932 | .l1clk(l1clk), | |
933 | .siclk(siclk), | |
934 | .soclk(soclk) | |
935 | ); | |
936 | ||
937 | assign lsu_mbi_scm_hit = stb_cam_hit_w; | |
938 | assign lsu_mbi_scm_mhit = stb_cam_mhit_w; | |
939 | assign lsu_mbi_scm_hit_ptr = stb_cam_hit_ptr_w[2:0]; | |
940 | assign lsu_mbi_scm_praw = stb_ld_part_raw_w; | |
941 | ||
942 | // stb ram is read on a full RAW | |
943 | // Note: There are cases (LDD/QUAD come to mind) where full_raw_w evaulates true but a bypass will | |
944 | // not occur. The full qualification is done in lsu_lmc_ctl. In those cases, the stb will get read | |
945 | // but the data will not be used. | |
946 | assign full_raw_w = stb_cam_hit_w & ~(stb_cam_mhit_w | stb_ld_part_raw_w | io_or_asi_load_w | flush_w); | |
947 | ||
948 | assign thread_w[0] = ~tid_w[2] & ~tid_w[1] & ~tid_w[0]; | |
949 | assign thread_w[1] = ~tid_w[2] & ~tid_w[1] & tid_w[0]; | |
950 | assign thread_w[2] = ~tid_w[2] & tid_w[1] & ~tid_w[0]; | |
951 | assign thread_w[3] = ~tid_w[2] & tid_w[1] & tid_w[0]; | |
952 | assign thread_w[4] = tid_w[2] & ~tid_w[1] & ~tid_w[0]; | |
953 | assign thread_w[5] = tid_w[2] & ~tid_w[1] & tid_w[0]; | |
954 | assign thread_w[6] = tid_w[2] & tid_w[1] & ~tid_w[0]; | |
955 | assign thread_w[7] = tid_w[2] & tid_w[1] & tid_w[0]; | |
956 | ||
957 | // Valid signals from each threads state determine which cam entries are valid. | |
958 | assign sbc_cam_line_en_m[7:0] = ({8{thread_m[0]}} & sbs0_state_vld[7:0] | | |
959 | {8{thread_m[1]}} & sbs1_state_vld[7:0] | | |
960 | {8{thread_m[2]}} & sbs2_state_vld[7:0] | | |
961 | {8{thread_m[3]}} & sbs3_state_vld[7:0] | | |
962 | {8{thread_m[4]}} & sbs4_state_vld[7:0] | | |
963 | {8{thread_m[5]}} & sbs5_state_vld[7:0] | | |
964 | {8{thread_m[6]}} & sbs6_state_vld[7:0] | | |
965 | {8{thread_m[7]}} & sbs7_state_vld[7:0] ) | | |
966 | {8{mbi_run_local}} ; | |
967 | ||
968 | ||
969 | // Write pointer generation | |
970 | ||
971 | assign stb_cam_wptr_vld_m = (st_inst_vld_m | bst_in_prog_m) & ~mbi_run_local; // does not include BIST | |
972 | assign sbc_cam_wptr_vld_m = mbi_run_local ? mbi_stb_cam_write_en : | |
973 | stb_cam_wptr_vld_m & ~(dcc_sync_pipe_w & (tid_m[2:0] == tid_w[2:0])); | |
974 | ||
975 | lsu_sbc_ctlmsff_ctl_macro__width_1 dff_ram_wptr_vld_b ( | |
976 | .scan_in(dff_ram_wptr_vld_b_scanin), | |
977 | .scan_out(dff_ram_wptr_vld_b_scanout), | |
978 | .l1clk (l1clk_pm1), | |
979 | .din (stb_cam_wptr_vld_m), | |
980 | .dout (stb_cam_wptr_vld_b), | |
981 | .siclk(siclk), | |
982 | .soclk(soclk) | |
983 | ); | |
984 | ||
985 | assign stb_ram_wptr_vld_b = stb_cam_wptr_vld_b & ~(dcc_sync_pipe_w & (tid_b[2:0] == tid_w[2:0])); | |
986 | ||
987 | assign sbc_ram_wptr_vld_b = mbi_run_local ? mbi_stb_ram_write_en : (stb_ram_wptr_vld_b | std_inst_w | casa_inst_w); | |
988 | ||
989 | lsu_sbc_ctlmsff_ctl_macro__width_1 dff_stb_wptr_vld_w ( | |
990 | .scan_in(dff_stb_wptr_vld_w_scanin), | |
991 | .scan_out(dff_stb_wptr_vld_w_scanout), | |
992 | .l1clk (l1clk_pm1), | |
993 | .din (stb_cam_wptr_vld_b), | |
994 | .dout (stb_cam_wptr_vld_w), | |
995 | .siclk(siclk), | |
996 | .soclk(soclk) | |
997 | ); | |
998 | ||
999 | assign unflushed_store_w = stb_cam_wptr_vld_w & ~flush_w; | |
1000 | ||
1001 | assign tid_e[2:0] = bst_in_prog_e ? bst_tid[2:0] : dcc_tid_e[2:0]; | |
1002 | ||
1003 | lsu_sbc_ctlmsff_ctl_macro__width_6 dff_tid_m ( | |
1004 | .scan_in(dff_tid_m_scanin), | |
1005 | .scan_out(dff_tid_m_scanout), | |
1006 | .din ({tid_e[2:0],tid_m[2:0]}), | |
1007 | .dout ({tid_m[2:0],tid_b[2:0]}), | |
1008 | .l1clk(l1clk), | |
1009 | .siclk(siclk), | |
1010 | .soclk(soclk) | |
1011 | ); | |
1012 | ||
1013 | assign sbc_tid_m[2:0] = tid_m[2:0]; | |
1014 | ||
1015 | assign thread_m[0] = ~tid_m[2] & ~tid_m[1] & ~tid_m[0]; | |
1016 | assign thread_m[1] = ~tid_m[2] & ~tid_m[1] & tid_m[0]; | |
1017 | assign thread_m[2] = ~tid_m[2] & tid_m[1] & ~tid_m[0]; | |
1018 | assign thread_m[3] = ~tid_m[2] & tid_m[1] & tid_m[0]; | |
1019 | assign thread_m[4] = tid_m[2] & ~tid_m[1] & ~tid_m[0]; | |
1020 | assign thread_m[5] = tid_m[2] & ~tid_m[1] & tid_m[0]; | |
1021 | assign thread_m[6] = tid_m[2] & tid_m[1] & ~tid_m[0]; | |
1022 | assign thread_m[7] = tid_m[2] & tid_m[1] & tid_m[0]; | |
1023 | ||
1024 | assign sbc_cam_wvld_m[0] = stb_cam_wptr_vld_m & thread_m[0]; | |
1025 | assign sbc_cam_wvld_m[1] = stb_cam_wptr_vld_m & thread_m[1]; | |
1026 | assign sbc_cam_wvld_m[2] = stb_cam_wptr_vld_m & thread_m[2]; | |
1027 | assign sbc_cam_wvld_m[3] = stb_cam_wptr_vld_m & thread_m[3]; | |
1028 | assign sbc_cam_wvld_m[4] = stb_cam_wptr_vld_m & thread_m[4]; | |
1029 | assign sbc_cam_wvld_m[5] = stb_cam_wptr_vld_m & thread_m[5]; | |
1030 | assign sbc_cam_wvld_m[6] = stb_cam_wptr_vld_m & thread_m[6]; | |
1031 | assign sbc_cam_wvld_m[7] = stb_cam_wptr_vld_m & thread_m[7]; | |
1032 | ||
1033 | lsu_sbc_ctlmsff_ctl_macro__width_8 dff_thread_b ( | |
1034 | .scan_in(dff_thread_b_scanin), | |
1035 | .scan_out(dff_thread_b_scanout), | |
1036 | .l1clk (l1clk_pm1), | |
1037 | .din (thread_m[7:0]), | |
1038 | .dout (thread_b[7:0]), | |
1039 | .siclk(siclk), | |
1040 | .soclk(soclk) | |
1041 | ); | |
1042 | ||
1043 | assign sbc_thread_b[7:0] = thread_b[7:0]; | |
1044 | ||
1045 | assign stb_wptr[2:0] = {3{thread_m[0]}} & sbs0_stb_wptr_m[2:0] | | |
1046 | {3{thread_m[1]}} & sbs1_stb_wptr_m[2:0] | | |
1047 | {3{thread_m[2]}} & sbs2_stb_wptr_m[2:0] | | |
1048 | {3{thread_m[3]}} & sbs3_stb_wptr_m[2:0] | | |
1049 | {3{thread_m[4]}} & sbs4_stb_wptr_m[2:0] | | |
1050 | {3{thread_m[5]}} & sbs5_stb_wptr_m[2:0] | | |
1051 | {3{thread_m[6]}} & sbs6_stb_wptr_m[2:0] | | |
1052 | {3{thread_m[7]}} & sbs7_stb_wptr_m[2:0]; | |
1053 | ||
1054 | assign cam_wptr_m[2:0] = stb_wptr[2:0]; | |
1055 | ||
1056 | // CAM is 1rw. Writes always have priority, so anything that generated a read must be deferred. | |
1057 | // 0in bits_on -var {sbc_cam_rptr_vld,sbc_cam_wptr_vld_m} -max 1 -message "stb_cam read/write contention" | |
1058 | // 0in bits_on -var {(st_pcx_rq_p2 | st_asi_rq_p2),any_bst_req,stb_diag_rd_w} -max 1 | |
1059 | ||
1060 | assign sbc_cam_rptr_vld = mbi_run_local ? mbi_stb_cam_read_en : (st_pcx_rq_p2 | st_asi_rq_p2 | any_bst_req | stb_diag_rd_w); | |
1061 | ||
1062 | // STB CAM is 1rw, so read and write pointers must be muxed. | |
1063 | // 0in bits_on -var {stb_cam_wptr_vld_m,stb_diag_rd_w,mbi_run_local} -max 1 -message "multiple stb_cam address selects" | |
1064 | assign sbc_cam_rwptr[5:0] = mbi_run_local ? mbi_addr[5:0] : | |
1065 | (({6{stb_cam_wptr_vld_m}} & {tid_m[2:0],cam_wptr_m[2:0]}) | // write | |
1066 | ({6{stb_diag_rd_w}} & {tid_w[2:0],va_w[5:3]}) | // diag read | |
1067 | ({6{~(stb_cam_wptr_vld_m | stb_diag_rd_w)}} & {st_rd_tid[2:0],stb_rptr_pcx[2:0]})); // read for pcx/asi/bst | |
1068 | ||
1069 | assign sbc_cam_tid[2:0] = mbi_run_local ? mbi_addr[5:3] : tid_m[2:0]; | |
1070 | ||
1071 | lsu_sbc_ctlmsff_ctl_macro__width_12 dff_cam_wptr ( | |
1072 | .scan_in(dff_cam_wptr_scanin), | |
1073 | .scan_out(dff_cam_wptr_scanout), | |
1074 | .din ({cam_wptr_m[2:0],cam_wptr_b[2:0],cam_wptr_w[2:0], cam_wptr_w2[2:0]}), | |
1075 | .dout ({cam_wptr_b[2:0],cam_wptr_w[2:0],cam_wptr_w2[2:0],cam_wptr_w3[2:0]}), | |
1076 | .l1clk(l1clk), | |
1077 | .siclk(siclk), | |
1078 | .soclk(soclk) | |
1079 | ); | |
1080 | assign sbc_diag_wptr_w3[2:0] = cam_wptr_w3[2:0]; | |
1081 | ||
1082 | assign sbc_ram_wptr[5:0] = mbi_run_local ? mbi_addr[5:0] : | |
1083 | ((std_inst_w | casa_inst_w) ? {tid_w[2:0],cam_wptr_w[2:0]} : {tid_b[2:0],cam_wptr_b[2:0]}); | |
1084 | ||
1085 | // Read pointer generation | |
1086 | ||
1087 | // rptr_vld and rptr_pcx can be generated from an earlier pcx_rq signal. The | |
1088 | // advantage of the later signal is that the array will only be read when | |
1089 | // absolutely necessary. | |
1090 | // 0in bits_on -var {(st_pcx_rq_p2 | st_asi_rq_p2),full_raw_w,stb_diag_rd_w} -max 1 | |
1091 | ||
1092 | assign sbc_ram_rptr_vld = mbi_run_local ? mbi_stb_ram_read_en : | |
1093 | ((st_pcx_rq_p2 | st_asi_rq_p2) | // read for pcx/asi | |
1094 | full_raw_w | // read for RAW bypass | |
1095 | any_bst_req | // read for block store initiate | |
1096 | stb_diag_rd_w); // diag read | |
1097 | ||
1098 | assign sbc_ram_rptr[5:0] = mbi_run_local ? mbi_addr[5:0] : | |
1099 | (full_raw_w ? {tid_w[2:0],stb_cam_hit_ptr_w[2:0]} : // read for RAW bypass | |
1100 | stb_diag_rd_w ? {tid_w[2:0],va_w[5:3]} : // diag read | |
1101 | {st_rd_tid[2:0],stb_rptr_pcx[2:0]}); // read for pcx | |
1102 | ||
1103 | lsu_sbc_ctlmsff_ctl_macro__width_12 dff_ram_rptr ( | |
1104 | .scan_in(dff_ram_rptr_scanin), | |
1105 | .scan_out(dff_ram_rptr_scanout), | |
1106 | .din ({sbc_ram_rptr_vld,sbc_ram_rptr[2:0],ram_rptr_d1[2:0],lsu_va_b[5:3], | |
1107 | dcc_stb_diag_rd_m,stb_diag_rd_b_in}), | |
1108 | .dout ({ram_rptr_vld_2, ram_rptr_d1[2:0], ram_rptr_d2[2:0],va_w[5:3], | |
1109 | stb_diag_rd_b, stb_diag_rd_w}), | |
1110 | .l1clk(l1clk), | |
1111 | .siclk(siclk), | |
1112 | .soclk(soclk) | |
1113 | ); | |
1114 | ||
1115 | assign stb_diag_rd_b_in = stb_diag_rd_b & ~mbi_run_local; | |
1116 | ||
1117 | assign sbc_ramout_clken = ram_rptr_vld_2 | ~lsu_lsu_pmen; | |
1118 | ||
1119 | assign stb_rptr_pcx[2:0] = {3{st_rd_thread[0]}} & sbs0_stb_rptr[2:0] | | |
1120 | {3{st_rd_thread[1]}} & sbs1_stb_rptr[2:0] | | |
1121 | {3{st_rd_thread[2]}} & sbs2_stb_rptr[2:0] | | |
1122 | {3{st_rd_thread[3]}} & sbs3_stb_rptr[2:0] | | |
1123 | {3{st_rd_thread[4]}} & sbs4_stb_rptr[2:0] | | |
1124 | {3{st_rd_thread[5]}} & sbs5_stb_rptr[2:0] | | |
1125 | {3{st_rd_thread[6]}} & sbs6_stb_rptr[2:0] | | |
1126 | {3{st_rd_thread[7]}} & sbs7_stb_rptr[2:0]; | |
1127 | ||
1128 | // Update last stored address for pipelining comparisons | |
1129 | assign sbc_st_addr_new[0] = unflushed_store_w & thread_w[0]; | |
1130 | assign sbc_st_addr_new[1] = unflushed_store_w & thread_w[1]; | |
1131 | assign sbc_st_addr_new[2] = unflushed_store_w & thread_w[2]; | |
1132 | assign sbc_st_addr_new[3] = unflushed_store_w & thread_w[3]; | |
1133 | assign sbc_st_addr_new[4] = unflushed_store_w & thread_w[4]; | |
1134 | assign sbc_st_addr_new[5] = unflushed_store_w & thread_w[5]; | |
1135 | assign sbc_st_addr_new[6] = unflushed_store_w & thread_w[6]; | |
1136 | assign sbc_st_addr_new[7] = unflushed_store_w & thread_w[7]; | |
1137 | ||
1138 | // Clock enables for pipe address flops | |
1139 | ||
1140 | assign sbc_spd_clken = stb_cam_wptr_vld_m | stb_cam_wptr_vld_b | mbi_run_local | ~lsu_lsu_pmen; | |
1141 | ||
1142 | //////////////////////////////////////////////////////////////////////////////// | |
1143 | // PCX/ASI Arbitration | |
1144 | //////////////////////////////////////////////////////////////////////////////// | |
1145 | ||
1146 | ///////////////////////////////////////////////////// | |
1147 | // P1 - receive requests from sbs | |
1148 | ///////////////////////////////////////////////////// | |
1149 | ||
1150 | // Turn off indeterminate ASI requests if they're blocked | |
1151 | // If an asi was selected in P2, clear the request since ASI can only issue | |
1152 | // every other cycle. | |
1153 | assign asi_rq_vld[7:0] = sbs_asi_rq_vld[7:0] & | |
1154 | ~(sbs_asi_indet_req[7:0] & {8{asi_indet_block | asi_indet_sel_qual_p2 | (asi_indet_sel_p3 & pic_st_asi_sel_p3)}}); | |
1155 | ||
1156 | assign asi_rq_blocked_p1 = |(sbs_asi_rq_vld[7:0] & sbs_asi_indet_req[7:0]) & | |
1157 | (asi_indet_block | asi_indet_sel_qual_p2 | (asi_indet_sel_p3 & pic_st_asi_sel_p3)); | |
1158 | ||
1159 | // Combine all requests for power management | |
1160 | assign st_rq_p1 = (|(sbs_pcx_rq_vld[7:0])) | (|(sbs_asi_rq_vld[7:0])); | |
1161 | ||
1162 | // Turn off pcx requests for a thread during it's block store transfer. Need to hold | |
1163 | // off until the end in case an ECC error occurs in the FGU. | |
1164 | assign pcx_rq_vld[7:0] = sbs_pcx_rq_vld[7:0] & ~lsu_block_store_b[7:0]; | |
1165 | ||
1166 | assign st_rq_vld_p1[7:0] = (pcx_rq_vld[7:0] | asi_rq_vld[7:0]) & ~st_rq_sel_p2[7:0] & ~st_sel_p3[7:0]; | |
1167 | assign st_rq_asi_p1[7:0] = asi_rq_vld[7:0] & ~st_rq_sel_p2[7:0] & ~st_sel_p3[7:0]; | |
1168 | ||
1169 | lsu_sbc_ctlmsff_ctl_macro__width_18 dff_st_rq_p2 ( | |
1170 | .scan_in(dff_st_rq_p2_scanin), | |
1171 | .scan_out(dff_st_rq_p2_scanout), | |
1172 | .l1clk (l1clk_pm1), | |
1173 | .din ({st_rq_p1,st_rq_vld_p1[7:0],st_rq_asi_p1[7:0],asi_rq_blocked_p1}), | |
1174 | .dout ({st_rq_p2,st_rq_vld_p2[7:0],st_rq_asi_p2[7:0],asi_rq_blocked_p2}), | |
1175 | .siclk(siclk), | |
1176 | .soclk(soclk) | |
1177 | ); | |
1178 | ||
1179 | ///////////////////////////////////////////////////// | |
1180 | // P2 - arbitrate among the threads | |
1181 | ///////////////////////////////////////////////////// | |
1182 | ||
1183 | // Stores cannot request under the following conditions | |
1184 | // 1 - when a load in W is reading the STB for RAW bypass | |
1185 | // 2 - when another thread is reading the STB to initiate a block store | |
1186 | // 3 - when a store in M will be writing the STB | |
1187 | // 4 - when a STD or CASA in W needs to write the STB | |
1188 | // 5 - when a diagnostic STB read is in M or W | |
1189 | assign stb_hazard_p2 = full_raw_w | any_bst_req | stb_cam_wptr_vld_m | std_inst_w | | |
1190 | casa_inst_w | stb_diag_rd_w | st_pcx_rq_p3 | st_asi_rq_p3; | |
1191 | ||
1192 | // Pseudo-LRU picker to choose the oldest thread for issuing to pcx. | |
1193 | lsu_lru8_ctl st_lru8 ( | |
1194 | .scan_in(st_lru8_scanin), | |
1195 | .scan_out(st_lru8_scanout), | |
1196 | .l1clk (l1clk_pm1), | |
1197 | .request(st_rq_vld_p2[7:0]), | |
1198 | .enable (st_lru_update_p3[7:0]), | |
1199 | .select (st_rq_sel_unqual_p2[7:0]), | |
1200 | .spc_aclk(spc_aclk), | |
1201 | .spc_bclk(spc_bclk) | |
1202 | ); | |
1203 | ||
1204 | assign st_rq_sel_p2[7:0] = st_rq_sel_unqual_p2[7:0] & {8{~stb_hazard_p2}}; | |
1205 | ||
1206 | assign st_asi_unqual_p2 = |(st_rq_sel_unqual_p2[7:0] & st_rq_asi_p2[7:0]); | |
1207 | assign st_pcx_rq_p2 = ~st_asi_unqual_p2 & |(st_rq_vld_p2[7:0]) & ~stb_hazard_p2; | |
1208 | assign st_asi_rq_p2 = st_asi_unqual_p2 & |(st_rq_vld_p2[7:0]) & ~stb_hazard_p2; | |
1209 | ||
1210 | // 0in arbiter -req st_rq_vld_p2[7:0] -gnt st_rq_sel_unqual_p2[7:0] -known_grant | |
1211 | ||
1212 | // Encode tid for use in STB read pointer | |
1213 | assign st_tid_p2[2] = st_rq_sel_p2[4] | st_rq_sel_p2[5] | st_rq_sel_p2[6] | st_rq_sel_p2[7]; | |
1214 | assign st_tid_p2[1] = st_rq_sel_p2[2] | st_rq_sel_p2[3] | st_rq_sel_p2[6] | st_rq_sel_p2[7]; | |
1215 | assign st_tid_p2[0] = st_rq_sel_p2[1] | st_rq_sel_p2[3] | st_rq_sel_p2[5] | st_rq_sel_p2[7]; | |
1216 | ||
1217 | // CAS tracking | |
1218 | assign sbc_st_atomic_p2 = |(st_rq_sel_p2[7:0] & sbs_atm_rq_vld[7:0]); | |
1219 | ||
1220 | // Indeterminate asi tracking | |
1221 | assign asi_indet_sel_p2 = |(sbs_asi_indet_req[7:0] & st_rq_sel_unqual_p2[7:0]); | |
1222 | ||
1223 | assign asi_indet_sel_qual_p2 = asi_indet_sel_p2 & ~stb_hazard_p2; | |
1224 | ||
1225 | lsu_sbc_ctlmsff_ctl_macro__width_2 dff_indet_temp ( | |
1226 | .scan_in(dff_indet_temp_scanin), | |
1227 | .scan_out(dff_indet_temp_scanout), | |
1228 | .l1clk (l1clk_pm1), | |
1229 | .din ({asi_indet_sel_qual_p2,asi_rq_blocked_p2}), | |
1230 | .dout ({asi_indet_sel_p3, asi_rq_blocked_p3}), | |
1231 | .siclk(siclk), | |
1232 | .soclk(soclk) | |
1233 | ); | |
1234 | ||
1235 | // To prevent indeterminates from getting locked out, block the next two cycles if an | |
1236 | // indeterminate gets picked, but not selected in p3. | |
1237 | assign indet_block_req_p2 = asi_indet_sel_p3 & ~pic_st_asi_sel_p3; | |
1238 | //assign sbc_indet_block_p3 = indet_block_req_p3 | indet_block_req_p4; | |
1239 | assign sbc_indet_block_p3 = indet_block_req_p3; | |
1240 | ||
1241 | // Data for STB read pointers | |
1242 | assign st_rd_tid[2:0] = st_tid_p2[2:0] | ({3{any_bst_req}} & lsu_block_store_tid[2:0]); | |
1243 | assign st_rd_thread[7:0] = st_rq_sel_p2[7:0] | bst_sel[7:0]; | |
1244 | ||
1245 | assign sbc_st_rq_p2 = st_pcx_rq_p2 | st_asi_rq_p2; | |
1246 | ||
1247 | lsu_sbc_ctlmsff_ctl_macro__width_11 dff_st_sel_p3 ( | |
1248 | .scan_in(dff_st_sel_p3_scanin), | |
1249 | .scan_out(dff_st_sel_p3_scanout), | |
1250 | .l1clk (l1clk_pm1), | |
1251 | .din ({st_rq_p2,st_rq_sel_p2[7:0],st_pcx_rq_p2,st_asi_rq_p2}), | |
1252 | .dout ({st_rq_p3,st_rq_sel_p3[7:0],st_pcx_rq_p3,st_asi_rq_p3}), | |
1253 | .siclk(siclk), | |
1254 | .soclk(soclk) | |
1255 | ); | |
1256 | ||
1257 | assign st_atom_p3[7:0] = st_rq_sel_p3[7:0] & sbs_atm_rq_vld[7:0]; | |
1258 | ||
1259 | //////////////////////////////////// | |
1260 | // P3 - pic selects load or store // | |
1261 | //////////////////////////////////// | |
1262 | ||
1263 | assign sbc_st_atom_p3[7:0] = st_atom_p3[7:0] & {8{pic_st_pcx_sel_p3}}; | |
1264 | ||
1265 | assign sbc_asi_rq_p3 = st_asi_rq_p3; | |
1266 | assign sbc_pcx_rq_p3 = st_pcx_rq_p3; | |
1267 | ||
1268 | assign st_sel_p3[7:0] = st_rq_sel_p3[7:0] & {8{(pic_st_pcx_sel_p3 | pic_st_asi_sel_p3)}}; | |
1269 | assign sbc_st_sel_p3[7:0] = st_rq_sel_p3[7:0]; | |
1270 | ||
1271 | assign st_lru_update_p3[7:0] = st_sel_p3[7:0] & {8{~asi_rq_blocked_p3}}; | |
1272 | ||
1273 | assign st_asi_fs_p3 = (st_sel_p3[0] & sbs_state_asi_rngf[0]) | | |
1274 | (st_sel_p3[1] & sbs_state_asi_rngf[1]) | | |
1275 | (st_sel_p3[2] & sbs_state_asi_rngf[2]) | | |
1276 | (st_sel_p3[3] & sbs_state_asi_rngf[3]) | | |
1277 | (st_sel_p3[4] & sbs_state_asi_rngf[4]) | | |
1278 | (st_sel_p3[5] & sbs_state_asi_rngf[5]) | | |
1279 | (st_sel_p3[6] & sbs_state_asi_rngf[6]) | | |
1280 | (st_sel_p3[7] & sbs_state_asi_rngf[7]); | |
1281 | ||
1282 | // Must track indeterminate ASI stores. Only one (across all threads) can | |
1283 | // be outstanding at any time. | |
1284 | ||
1285 | assign asi_indet_in = (asi_indet_sel_p3 & pic_st_asi_sel_p3) | (asi_indet_block & ~|(sbs_asi_indet_retire[7:0])); | |
1286 | ||
1287 | lsu_sbc_ctlmsff_ctl_macro__width_1 dff_asi_indet ( | |
1288 | .scan_in(dff_asi_indet_scanin), | |
1289 | .scan_out(dff_asi_indet_scanout), | |
1290 | .din (asi_indet_in), | |
1291 | .dout (asi_indet_block), | |
1292 | .l1clk(l1clk), | |
1293 | .siclk(siclk), | |
1294 | .soclk(soclk) | |
1295 | ); | |
1296 | ||
1297 | ///////////////////////////////////// | |
1298 | // P4 - data is valid from CAM/RAM // | |
1299 | ///////////////////////////////////// | |
1300 | ||
1301 | lsu_sbc_ctlmsff_ctl_macro__width_12 dff_st_sel_p4 ( | |
1302 | .scan_in(dff_st_sel_p4_scanin), | |
1303 | .scan_out(dff_st_sel_p4_scanout), | |
1304 | .l1clk (l1clk_pm1), | |
1305 | .din ({st_rq_p3,st_asi_fs_p3, st_sel_p3[7:0],pic_st_asi_sel_p3,pic_st_pcx_sel_p3}), | |
1306 | .dout ({st_rq_p4,sbc_st_asi_fs,st_sel_p4[7:0],st_asi_sel_p4, st_pcx_sel_p4}), | |
1307 | .siclk(siclk), | |
1308 | .soclk(soclk) | |
1309 | ); | |
1310 | ||
1311 | assign st_sel_tid_p4[2] = st_sel_p4[4] | st_sel_p4[5] | st_sel_p4[6] | st_sel_p4[7]; | |
1312 | assign st_sel_tid_p4[1] = st_sel_p4[2] | st_sel_p4[3] | st_sel_p4[6] | st_sel_p4[7]; | |
1313 | assign st_sel_tid_p4[0] = st_sel_p4[1] | st_sel_p4[3] | st_sel_p4[5] | st_sel_p4[7]; | |
1314 | ||
1315 | assign sbc_st_sel_tid_p4[2:0] = bst_p2 ? bst_tid[2:0] : st_sel_tid_p4[2:0]; | |
1316 | ||
1317 | // Partial store mask calculation | |
1318 | assign pst_ie_p4 = |(sbs_pcx_pst_ie_p4[7:0]); | |
1319 | ||
1320 | assign bmask_ie[7:0] = {stb_cam_data[0],stb_cam_data[1],stb_cam_data[2],stb_cam_data[3], | |
1321 | stb_cam_data[4],stb_cam_data[5],stb_cam_data[6],stb_cam_data[7]}; | |
1322 | assign sbc_pcx_bmask[7:0] = pst_ie_p4 ? bmask_ie[7:0] : stb_cam_data[7:0]; | |
1323 | ||
1324 | // Generate addr[2:0] based on byte mask. It won't be correct for PST instructions, but | |
1325 | // the L2 shouldn't use the address bits for those anyway. | |
1326 | assign sbc_pcx_addr[2] = (!stb_cam_data[0]&stb_cam_data[2]) | (!stb_cam_data[1]&stb_cam_data[0]) | | |
1327 | (!stb_cam_data[2]&stb_cam_data[1]) | (!stb_cam_data[4]&stb_cam_data[3]); | |
1328 | assign sbc_pcx_addr[1] = (!stb_cam_data[5]&stb_cam_data[4]) | (!stb_cam_data[1]&stb_cam_data[0]) | | |
1329 | (!stb_cam_data[6]&stb_cam_data[5]) | (!stb_cam_data[2]&stb_cam_data[1]); | |
1330 | assign sbc_pcx_addr[0] = (!stb_cam_data[7]&stb_cam_data[6]) | (!stb_cam_data[5]&stb_cam_data[4]) | | |
1331 | (!stb_cam_data[3]&stb_cam_data[2]) | (!stb_cam_data[1]&stb_cam_data[0]); | |
1332 | ||
1333 | ||
1334 | assign sbc_pcx_rmo_st = |(sbs_rmo_st_p4[7:0]); | |
1335 | assign sbc_pcx_blk_st = |(sbs_blk_st_p4[7:0]); | |
1336 | ||
1337 | // Store type muxing | |
1338 | assign st_type_enc[1:0] = ({2{st_sel_p4[0]}} & sbs0_st_type[1:0]) | | |
1339 | ({2{st_sel_p4[1]}} & sbs1_st_type[1:0]) | | |
1340 | ({2{st_sel_p4[2]}} & sbs2_st_type[1:0]) | | |
1341 | ({2{st_sel_p4[3]}} & sbs3_st_type[1:0]) | | |
1342 | ({2{st_sel_p4[4]}} & sbs4_st_type[1:0]) | | |
1343 | ({2{st_sel_p4[5]}} & sbs5_st_type[1:0]) | | |
1344 | ({2{st_sel_p4[6]}} & sbs6_st_type[1:0]) | | |
1345 | ({2{st_sel_p4[7]}} & sbs7_st_type[1:0]) ; | |
1346 | ||
1347 | assign sbc_st_type_p4[2] = st_pcx_sel_p4 & st_type_enc[1]; | |
1348 | assign sbc_st_type_p4[1] = st_pcx_sel_p4 ? st_type_enc[0] : st_type_enc[1]; | |
1349 | assign sbc_st_type_p4[0] = st_pcx_sel_p4 ? (~st_type_enc[0] | st_type_enc[1]) : st_type_enc[0]; | |
1350 | ||
1351 | /////////////////////////////// | |
1352 | // STB error detection | |
1353 | /////////////////////////////// | |
1354 | ||
1355 | lsu_sbc_ctlmsff_ctl_macro__width_4 dff_cerer ( | |
1356 | .scan_in(dff_cerer_scanin), | |
1357 | .scan_out(dff_cerer_scanout), | |
1358 | .l1clk (l1clk_pm1), | |
1359 | .din ({tlu_cerer_sbdpc,tlu_cerer_sbdpu,tlu_cerer_sbapp,tlu_cerer_sbdiou}), | |
1360 | .dout ({ cerer_sbdpc, cerer_sbdpu, cerer_sbapp, cerer_sbdiou}), | |
1361 | .siclk(siclk), | |
1362 | .soclk(soclk) | |
1363 | ); | |
1364 | ||
1365 | assign sbdpc_err = cerer_sbdpc & stb_cecc_err & ~stb_uecc_err & (st_pcx_sel_p4 | st_asi_sel_p4) & ~st_err_flush; | |
1366 | assign sbdpu_err = cerer_sbdpu & stb_uecc_err & st_pcx_sel_p4 & ~stb_cam_addr_b39 & ~st_err_flush; | |
1367 | assign sbapp_err = cerer_sbapp & stb_cam_perr & (st_pcx_sel_p4 | st_asi_sel_p4 | bst_p2) & ~st_err_flush; | |
1368 | assign sbdiou_err = cerer_sbdiou & stb_uecc_err & ((st_pcx_sel_p4 & stb_cam_addr_b39) | st_asi_sel_p4) & ~st_err_flush; | |
1369 | ||
1370 | // Check that errors are never signaled during normal testing | |
1371 | ||
1372 | ||
1373 | ||
1374 | assign kill_store_p4_ = ~(sbapp_err | sbdiou_err | (st_asi_sel_p4 & sbdpu_err) | st_err_flush); | |
1375 | assign sbc_pid_kill_store_p4_ = kill_store_p4_; | |
1376 | assign sbc_pic_kill_store_p4_ = kill_store_p4_; | |
1377 | assign sbc_sbs_kill_store_p4_ = kill_store_p4_; | |
1378 | ||
1379 | // On UE for store and CAS, assert the inv bit of the pcx packet so the L2 stores NotData | |
1380 | assign sbc_force_inv = sbdpu_err; | |
1381 | ||
1382 | // Decode the priv encodings | |
1383 | assign stb_priv[1] = (stb_ram_ctl[1]&!stb_ram_ctl[0]) | (!stb_ram_ctl[1]&stb_ram_ctl[0]) | (stb_ram_ctl[2]); | |
1384 | assign stb_priv[0] = (stb_ram_ctl[2]&!stb_ram_ctl[0]) | (!stb_ram_ctl[2]&stb_ram_ctl[0]) | (stb_ram_ctl[1]); | |
1385 | ||
1386 | lsu_sbc_ctlmsff_ctl_macro__width_10 dff_stb_err ( | |
1387 | .scan_in(dff_stb_err_scanin), | |
1388 | .scan_out(dff_stb_err_scanout), | |
1389 | .din ({sbdpc_err, sbdpu_err, sbapp_err, sbdiou_err , | |
1390 | ram_rptr_d2[2:0], stb_priv[1:0], st_err_flush}), | |
1391 | .dout ({lsu_sbdpc_err_g,lsu_sbdpu_err_g,lsu_sbapp_err_g,lsu_sbdiou_err_g, | |
1392 | lsu_stberr_index_g[2:0],lsu_stberr_priv_g[1:0],lsu_stb_flush_g}), | |
1393 | .l1clk(l1clk), | |
1394 | .siclk(siclk), | |
1395 | .soclk(soclk) | |
1396 | ); | |
1397 | ||
1398 | // When a "fatal" error occurs (one which kills a store), all other stores in the buffer should | |
1399 | // also be killed. Keep a flag that indicates the error condition and kill all stores as they | |
1400 | // try to issue. Once the stb is empty, reset the flag. | |
1401 | assign fatal_err_cond_in[7:0] = (({8{~kill_store_p4_}} & st_sel_p4[7:0]) | fatal_err_cond[7:0]) & ~sbs_stb_empty[7:0]; | |
1402 | ||
1403 | lsu_sbc_ctlmsff_ctl_macro__width_8 dff_fatal_err ( | |
1404 | .scan_in(dff_fatal_err_scanin), | |
1405 | .scan_out(dff_fatal_err_scanout), | |
1406 | .din (fatal_err_cond_in[7:0]), | |
1407 | .dout (fatal_err_cond[7:0]), | |
1408 | .l1clk(l1clk), | |
1409 | .siclk(siclk), | |
1410 | .soclk(soclk) | |
1411 | ); | |
1412 | ||
1413 | assign st_err_flush = |(fatal_err_cond[7:0] & (st_sel_p4[7:0] | bst_sel[7:0])); | |
1414 | ||
1415 | //////////////////////////////////////////////////////////////////////////////// | |
1416 | // Block stores | |
1417 | //////////////////////////////////////////////////////////////////////////////// | |
1418 | ||
1419 | // Must hold onto Rd value for the bst to send back to decode. | |
1420 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_bst_addr_pipe ( | |
1421 | .scan_in(dff_bst_addr_pipe_scanin), | |
1422 | .scan_out(dff_bst_addr_pipe_scanout), | |
1423 | .l1clk (l1clk_pm1), | |
1424 | .din ({bst_addr_m[4:3],dcc_blk_inst_m}), | |
1425 | .dout ({bst_addr_b[4:3],sbc_blk_inst_b}), | |
1426 | .siclk(siclk), | |
1427 | .soclk(soclk) | |
1428 | ); | |
1429 | ||
1430 | assign bst_addr0_in[4:3] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[0] & ~pipe_flush_b) ? bst_addr_b[4:3] : bst_addr0[4:3]; | |
1431 | assign bst_addr1_in[4:3] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[1] & ~pipe_flush_b) ? bst_addr_b[4:3] : bst_addr1[4:3]; | |
1432 | assign bst_addr2_in[4:3] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[2] & ~pipe_flush_b) ? bst_addr_b[4:3] : bst_addr2[4:3]; | |
1433 | assign bst_addr3_in[4:3] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[3] & ~pipe_flush_b) ? bst_addr_b[4:3] : bst_addr3[4:3]; | |
1434 | assign bst_addr4_in[4:3] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[4] & ~pipe_flush_b) ? bst_addr_b[4:3] : bst_addr4[4:3]; | |
1435 | assign bst_addr5_in[4:3] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[5] & ~pipe_flush_b) ? bst_addr_b[4:3] : bst_addr5[4:3]; | |
1436 | assign bst_addr6_in[4:3] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[6] & ~pipe_flush_b) ? bst_addr_b[4:3] : bst_addr6[4:3]; | |
1437 | assign bst_addr7_in[4:3] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[7] & ~pipe_flush_b) ? bst_addr_b[4:3] : bst_addr7[4:3]; | |
1438 | ||
1439 | lsu_sbc_ctlmsff_ctl_macro__width_16 dff_bst_addr ( | |
1440 | .scan_in(dff_bst_addr_scanin), | |
1441 | .scan_out(dff_bst_addr_scanout), | |
1442 | .l1clk (l1clk_pm1), | |
1443 | .din ({bst_addr7_in[4:3],bst_addr6_in[4:3],bst_addr5_in[4:3],bst_addr4_in[4:3], | |
1444 | bst_addr3_in[4:3],bst_addr2_in[4:3],bst_addr1_in[4:3],bst_addr0_in[4:3]}), | |
1445 | .dout ({bst_addr7[4:3],bst_addr6[4:3],bst_addr5[4:3],bst_addr4[4:3], | |
1446 | bst_addr3[4:3],bst_addr2[4:3],bst_addr1[4:3],bst_addr0[4:3]}), | |
1447 | .siclk(siclk), | |
1448 | .soclk(soclk) | |
1449 | ); | |
1450 | ||
1451 | // Have to store the endianess of the store | |
1452 | assign bst_lendian_in[0] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[0] & ~pipe_flush_b) ? st_lendian_b : bst_lendian[0]; | |
1453 | assign bst_lendian_in[1] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[1] & ~pipe_flush_b) ? st_lendian_b : bst_lendian[1]; | |
1454 | assign bst_lendian_in[2] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[2] & ~pipe_flush_b) ? st_lendian_b : bst_lendian[2]; | |
1455 | assign bst_lendian_in[3] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[3] & ~pipe_flush_b) ? st_lendian_b : bst_lendian[3]; | |
1456 | assign bst_lendian_in[4] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[4] & ~pipe_flush_b) ? st_lendian_b : bst_lendian[4]; | |
1457 | assign bst_lendian_in[5] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[5] & ~pipe_flush_b) ? st_lendian_b : bst_lendian[5]; | |
1458 | assign bst_lendian_in[6] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[6] & ~pipe_flush_b) ? st_lendian_b : bst_lendian[6]; | |
1459 | assign bst_lendian_in[7] = (sbc_blk_inst_b & stb_cam_wptr_vld_b & thread_b[7] & ~pipe_flush_b) ? st_lendian_b : bst_lendian[7]; | |
1460 | ||
1461 | lsu_sbc_ctlmsff_ctl_macro__width_8 dff_bst_lendian ( | |
1462 | .scan_in(dff_bst_lendian_scanin), | |
1463 | .scan_out(dff_bst_lendian_scanout), | |
1464 | .l1clk (l1clk_pm1), | |
1465 | .din (bst_lendian_in[7:0]), | |
1466 | .dout (bst_lendian[7:0]), | |
1467 | .siclk(siclk), | |
1468 | .soclk(soclk) | |
1469 | ); | |
1470 | assign block_store_lendian = ((bst_tid[2:0] == 3'd0) & bst_lendian[0]) | | |
1471 | ((bst_tid[2:0] == 3'd1) & bst_lendian[1]) | | |
1472 | ((bst_tid[2:0] == 3'd2) & bst_lendian[2]) | | |
1473 | ((bst_tid[2:0] == 3'd3) & bst_lendian[3]) | | |
1474 | ((bst_tid[2:0] == 3'd4) & bst_lendian[4]) | | |
1475 | ((bst_tid[2:0] == 3'd5) & bst_lendian[5]) | | |
1476 | ((bst_tid[2:0] == 3'd6) & bst_lendian[6]) | | |
1477 | ((bst_tid[2:0] == 3'd7) & bst_lendian[7]) ; | |
1478 | ||
1479 | assign bst_busy_rst = &(bst_count[2:0]); | |
1480 | ||
1481 | assign bst_busy_in = (|(bst_sel[7:0])) | (bst_busy & ~bst_busy_rst); | |
1482 | ||
1483 | lsu_sbc_ctlmsff_ctl_macro__width_1 dff_bst_busy ( | |
1484 | .scan_in(dff_bst_busy_scanin), | |
1485 | .scan_out(dff_bst_busy_scanout), | |
1486 | .din (bst_busy_in), | |
1487 | .dout (bst_busy_out), | |
1488 | .l1clk(l1clk), | |
1489 | .siclk(siclk), | |
1490 | .soclk(soclk) | |
1491 | ); | |
1492 | ||
1493 | // If a store buffer diag read is in M, there will be a read-write collision in the stb_cam. | |
1494 | // In this case, restart the block store sequence by reissuing the lsu_block_store_stall | |
1495 | // and reseting the internal state machine. | |
1496 | assign bst_busy = bst_busy_out & ~(bst_p2 & dcc_stb_diag_rd_m); | |
1497 | ||
1498 | lsu_lru8_ctl bst_lru8 ( | |
1499 | .scan_in(bst_lru8_scanin), | |
1500 | .scan_out(bst_lru8_scanout), | |
1501 | .request (sbs_bst_req[7:0]), | |
1502 | .enable (bst_sel[7:0]), | |
1503 | .select (bst_sel_unqual_p[7:0]), | |
1504 | .l1clk(l1clk), | |
1505 | .spc_aclk(spc_aclk), | |
1506 | .spc_bclk(spc_bclk) | |
1507 | ); | |
1508 | ||
1509 | lsu_sbc_ctlmsff_ctl_macro__width_8 dff_bst_req ( | |
1510 | .scan_in(dff_bst_req_scanin), | |
1511 | .scan_out(dff_bst_req_scanout), | |
1512 | .din (bst_sel_unqual_p[7:0]), | |
1513 | .dout (bst_sel_unqual[7:0]), | |
1514 | .l1clk(l1clk), | |
1515 | .siclk(siclk), | |
1516 | .soclk(soclk) | |
1517 | ); | |
1518 | ||
1519 | assign bst_sel[7:0] = bst_sel_unqual[7:0] & ~fatal_err_cond[7:0] & | |
1520 | {8{~(bst_busy | st_inst_vld_m | stb_diag_rd_w | full_raw_w | frf_read_pending)}}; | |
1521 | ||
1522 | assign sbc_bst_sel[7:0] = {8{bst_p2 & ~dcc_stb_diag_rd_m}} & block_store_thread[7:0]; | |
1523 | assign any_bst_req = |(bst_sel[7:0]); | |
1524 | ||
1525 | assign bst_tid_in[2:0] = lsu_block_store_stall ? lsu_block_store_tid[2:0] : bst_tid[2:0]; | |
1526 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_bst_tid ( | |
1527 | .scan_in(dff_bst_tid_scanin), | |
1528 | .scan_out(dff_bst_tid_scanout), | |
1529 | .din (bst_tid_in[2:0]), | |
1530 | .dout (bst_tid[2:0]), | |
1531 | .l1clk(l1clk), | |
1532 | .siclk(siclk), | |
1533 | .soclk(soclk) | |
1534 | ); | |
1535 | ||
1536 | assign block_store_thread[0] = (bst_tid[2:0] == 3'd0); | |
1537 | assign block_store_thread[1] = (bst_tid[2:0] == 3'd1); | |
1538 | assign block_store_thread[2] = (bst_tid[2:0] == 3'd2); | |
1539 | assign block_store_thread[3] = (bst_tid[2:0] == 3'd3); | |
1540 | assign block_store_thread[4] = (bst_tid[2:0] == 3'd4); | |
1541 | assign block_store_thread[5] = (bst_tid[2:0] == 3'd5); | |
1542 | assign block_store_thread[6] = (bst_tid[2:0] == 3'd6); | |
1543 | assign block_store_thread[7] = (bst_tid[2:0] == 3'd7); | |
1544 | ||
1545 | assign sbc_rmo_st_b = (dcc_binit_st_b & ~(tlb_pgnum_b39 & ~tlb_cam_mhit)) | bst_in_prog_b | (rmo_st_w & std_inst_w); | |
1546 | ||
1547 | lsu_sbc_ctlmsff_ctl_macro__width_1 dff_rmo_st_w ( | |
1548 | .scan_in(dff_rmo_st_w_scanin), | |
1549 | .scan_out(dff_rmo_st_w_scanout), | |
1550 | .l1clk (l1clk_pm1), | |
1551 | .din (sbc_rmo_st_b), | |
1552 | .dout (rmo_st_w), | |
1553 | .siclk(siclk), | |
1554 | .soclk(soclk) | |
1555 | ); | |
1556 | ||
1557 | assign lsu_block_store_stall = |(bst_sel[7:0]); | |
1558 | assign lsu_block_store_tid[2] = bst_sel_unqual[4] | bst_sel_unqual[5] | bst_sel_unqual[6] | bst_sel_unqual[7]; | |
1559 | assign lsu_block_store_tid[1] = bst_sel_unqual[2] | bst_sel_unqual[3] | bst_sel_unqual[6] | bst_sel_unqual[7]; | |
1560 | assign lsu_block_store_tid[0] = bst_sel_unqual[1] | bst_sel_unqual[3] | bst_sel_unqual[5] | bst_sel_unqual[7]; | |
1561 | assign lsu_block_store_rd[4:3] = {2{bst_sel_unqual[0]}} & bst_addr0[4:3] | | |
1562 | {2{bst_sel_unqual[1]}} & bst_addr1[4:3] | | |
1563 | {2{bst_sel_unqual[2]}} & bst_addr2[4:3] | | |
1564 | {2{bst_sel_unqual[3]}} & bst_addr3[4:3] | | |
1565 | {2{bst_sel_unqual[4]}} & bst_addr4[4:3] | | |
1566 | {2{bst_sel_unqual[5]}} & bst_addr5[4:3] | | |
1567 | {2{bst_sel_unqual[6]}} & bst_addr6[4:3] | | |
1568 | {2{bst_sel_unqual[7]}} & bst_addr7[4:3] ; | |
1569 | ||
1570 | // TLU must know which thread is receiving the data transfer in case of an FRF ECC error | |
1571 | assign lsu_block_store_b[0] = bst_in_prog_b & (bst_tid[2:0] == 3'd0); | |
1572 | assign lsu_block_store_b[1] = bst_in_prog_b & (bst_tid[2:0] == 3'd1); | |
1573 | assign lsu_block_store_b[2] = bst_in_prog_b & (bst_tid[2:0] == 3'd2); | |
1574 | assign lsu_block_store_b[3] = bst_in_prog_b & (bst_tid[2:0] == 3'd3); | |
1575 | assign lsu_block_store_b[4] = bst_in_prog_b & (bst_tid[2:0] == 3'd4); | |
1576 | assign lsu_block_store_b[5] = bst_in_prog_b & (bst_tid[2:0] == 3'd5); | |
1577 | assign lsu_block_store_b[6] = bst_in_prog_b & (bst_tid[2:0] == 3'd6); | |
1578 | assign lsu_block_store_b[7] = bst_in_prog_b & (bst_tid[2:0] == 3'd7); | |
1579 | ||
1580 | // Sequencing logic | |
1581 | ||
1582 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_bst_seq ( | |
1583 | .scan_in(dff_bst_seq_scanin), | |
1584 | .scan_out(dff_bst_seq_scanout), | |
1585 | .din ({any_bst_req,bst_p1,bst_p2_in}), | |
1586 | .dout ({bst_p1, bst_p2,bst_p3}), | |
1587 | .l1clk(l1clk), | |
1588 | .siclk(siclk), | |
1589 | .soclk(soclk) | |
1590 | ); | |
1591 | ||
1592 | assign bst_p2_in = bst_p2 & ~dcc_stb_diag_rd_m; | |
1593 | ||
1594 | assign sbc_load_bst_addr = bst_p2; | |
1595 | ||
1596 | assign bst_count_in[2:0] = bst_count[2:0] + {2'b00,bst_in_prog_m}; | |
1597 | ||
1598 | assign bst_in_prog_e = bst_p3 | (|(bst_count_in[2:0])); | |
1599 | ||
1600 | lsu_sbc_ctlmsff_ctl_macro__width_6 dff_bst_count ( | |
1601 | .scan_in(dff_bst_count_scanin), | |
1602 | .scan_out(dff_bst_count_scanout), | |
1603 | .din ({bst_count_in[2:0],bst_in_prog_e,bst_in_prog_e ,bst_in_prog_m}), | |
1604 | .dout ({bst_count[2:0], bst_in_prog_m,lsu_block_store_m,bst_in_prog_b}), | |
1605 | .l1clk(l1clk), | |
1606 | .siclk(siclk), | |
1607 | .soclk(soclk) | |
1608 | ); | |
1609 | ||
1610 | assign sbc_bst_in_prog_m = bst_in_prog_m; | |
1611 | assign sbc_bst_in_prog_b = bst_in_prog_b; | |
1612 | ||
1613 | assign sbc_bst_offset[2:0] = bst_count[2:0]; | |
1614 | ||
1615 | assign lsu_block_store_alloc[0] = (bst_count[2:0] == 3'b001) & (bst_tid[2:0] == 3'd0); | |
1616 | assign lsu_block_store_alloc[1] = (bst_count[2:0] == 3'b001) & (bst_tid[2:0] == 3'd1); | |
1617 | assign lsu_block_store_alloc[2] = (bst_count[2:0] == 3'b001) & (bst_tid[2:0] == 3'd2); | |
1618 | assign lsu_block_store_alloc[3] = (bst_count[2:0] == 3'b001) & (bst_tid[2:0] == 3'd3); | |
1619 | assign lsu_block_store_alloc[4] = (bst_count[2:0] == 3'b001) & (bst_tid[2:0] == 3'd4); | |
1620 | assign lsu_block_store_alloc[5] = (bst_count[2:0] == 3'b001) & (bst_tid[2:0] == 3'd5); | |
1621 | assign lsu_block_store_alloc[6] = (bst_count[2:0] == 3'b001) & (bst_tid[2:0] == 3'd6); | |
1622 | assign lsu_block_store_alloc[7] = (bst_count[2:0] == 3'b001) & (bst_tid[2:0] == 3'd7); | |
1623 | ||
1624 | // Must watch fgu ecc errors to know whether to kill block store | |
1625 | assign sbc_fgu_ecc_b = fgu_fst_ecc_error_fx2; | |
1626 | ||
1627 | // If the read of the block store request gets a fatal error, kill the block store | |
1628 | assign bst_err_p3 = lsu_sbapp_err_g & bst_p3; | |
1629 | ||
1630 | lsu_sbc_ctlmsff_ctl_macro__width_2 dff_bst_rd_err ( | |
1631 | .scan_in(dff_bst_rd_err_scanin), | |
1632 | .scan_out(dff_bst_rd_err_scanout), | |
1633 | .din ({bst_err_p3,bst_err_p4}), | |
1634 | .dout ({bst_err_p4,sbc_bst_rd_err}), | |
1635 | .l1clk(l1clk), | |
1636 | .siclk(siclk), | |
1637 | .soclk(soclk) | |
1638 | ); | |
1639 | ||
1640 | //////////////////////////////////////////////////////////////////////////////// | |
1641 | // STD | |
1642 | //////////////////////////////////////////////////////////////////////////////// | |
1643 | ||
1644 | lsu_sbc_ctlmsff_ctl_macro__width_2 dff_std_seq ( | |
1645 | .scan_in(dff_std_seq_scanin), | |
1646 | .scan_out(dff_std_seq_scanout), | |
1647 | .l1clk (l1clk_pm1), | |
1648 | .din ({dcc_std_inst_m,std_inst_b}), | |
1649 | .dout ({std_inst_b, std_inst_w}), | |
1650 | .siclk(siclk), | |
1651 | .soclk(soclk) | |
1652 | ); | |
1653 | ||
1654 | // Need to know when a 2 cycle is writing in W in order to used the older address parity | |
1655 | assign sbc_twocycle_inst_w = std_inst_w | casa_inst_w; | |
1656 | ||
1657 | //////////////////////////////////////////////////////////////////////////////// | |
1658 | // Partial RAW handling | |
1659 | // Generate an ID for use by partial raw cases. | |
1660 | //////////////////////////////////////////////////////////////////////////////// | |
1661 | ||
1662 | lsu_sbc_ctlmsff_ctl_macro__width_2 dff_praw_ctl_w ( | |
1663 | .scan_in(dff_praw_ctl_w_scanin), | |
1664 | .scan_out(dff_praw_ctl_w_scanout), | |
1665 | .din ({dcc_asi_load_m,io_or_asi_load_b}), | |
1666 | .dout ({asi_load_b, io_or_asi_load_w}), | |
1667 | .l1clk(l1clk), | |
1668 | .siclk(siclk), | |
1669 | .soclk(soclk) | |
1670 | ); | |
1671 | assign io_or_asi_load_b = asi_load_b | (tlb_pgnum_b39 & ~tlb_cam_mhit); | |
1672 | ||
1673 | assign last_stb_wptr_w[2:0] = cam_wptr_w[2:0] - {3'b001}; | |
1674 | assign rawp_id_w[2:0] = (stb_cam_mhit_w | io_or_asi_load_w | stb_diag_rd_w) ? | |
1675 | last_stb_wptr_w[2:0] : stb_cam_hit_ptr_w[2:0]; | |
1676 | ||
1677 | // Thread 0 | |
1678 | assign rawp_id0[2:0] = (lmc_ld_inst_w & thread_w[0]) ? rawp_id_w[2:0] : rawp_id0_hold[2:0]; | |
1679 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_rawp_id0 ( | |
1680 | .scan_in(dff_rawp_id0_scanin), | |
1681 | .scan_out(dff_rawp_id0_scanout), | |
1682 | .din (rawp_id0[2:0]), | |
1683 | .dout (rawp_id0_hold[2:0]), | |
1684 | .l1clk(l1clk), | |
1685 | .siclk(siclk), | |
1686 | .soclk(soclk) | |
1687 | ); | |
1688 | assign dec_rawp_id0[0] = ~rawp_id0[2] & ~rawp_id0[1] & ~rawp_id0[0]; | |
1689 | assign dec_rawp_id0[1] = ~rawp_id0[2] & ~rawp_id0[1] & rawp_id0[0]; | |
1690 | assign dec_rawp_id0[2] = ~rawp_id0[2] & rawp_id0[1] & ~rawp_id0[0]; | |
1691 | assign dec_rawp_id0[3] = ~rawp_id0[2] & rawp_id0[1] & rawp_id0[0]; | |
1692 | assign dec_rawp_id0[4] = rawp_id0[2] & ~rawp_id0[1] & ~rawp_id0[0]; | |
1693 | assign dec_rawp_id0[5] = rawp_id0[2] & ~rawp_id0[1] & rawp_id0[0]; | |
1694 | assign dec_rawp_id0[6] = rawp_id0[2] & rawp_id0[1] & ~rawp_id0[0]; | |
1695 | assign dec_rawp_id0[7] = rawp_id0[2] & rawp_id0[1] & rawp_id0[0]; | |
1696 | assign sbc_rawp_rst[0] = |(dec_rawp_id0[7:0] & sbs0_state_ced[7:0]); | |
1697 | ||
1698 | // Thread 1 | |
1699 | assign rawp_id1[2:0] = (lmc_ld_inst_w & thread_w[1]) ? rawp_id_w[2:0] : rawp_id1_hold[2:0]; | |
1700 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_rawp_id1 ( | |
1701 | .scan_in(dff_rawp_id1_scanin), | |
1702 | .scan_out(dff_rawp_id1_scanout), | |
1703 | .din (rawp_id1[2:0]), | |
1704 | .dout (rawp_id1_hold[2:0]), | |
1705 | .l1clk(l1clk), | |
1706 | .siclk(siclk), | |
1707 | .soclk(soclk) | |
1708 | ); | |
1709 | assign dec_rawp_id1[0] = ~rawp_id1[2] & ~rawp_id1[1] & ~rawp_id1[0]; | |
1710 | assign dec_rawp_id1[1] = ~rawp_id1[2] & ~rawp_id1[1] & rawp_id1[0]; | |
1711 | assign dec_rawp_id1[2] = ~rawp_id1[2] & rawp_id1[1] & ~rawp_id1[0]; | |
1712 | assign dec_rawp_id1[3] = ~rawp_id1[2] & rawp_id1[1] & rawp_id1[0]; | |
1713 | assign dec_rawp_id1[4] = rawp_id1[2] & ~rawp_id1[1] & ~rawp_id1[0]; | |
1714 | assign dec_rawp_id1[5] = rawp_id1[2] & ~rawp_id1[1] & rawp_id1[0]; | |
1715 | assign dec_rawp_id1[6] = rawp_id1[2] & rawp_id1[1] & ~rawp_id1[0]; | |
1716 | assign dec_rawp_id1[7] = rawp_id1[2] & rawp_id1[1] & rawp_id1[0]; | |
1717 | assign sbc_rawp_rst[1] = |(dec_rawp_id1[7:0] & sbs1_state_ced[7:0]); | |
1718 | ||
1719 | // Thread 2 | |
1720 | assign rawp_id2[2:0] = (lmc_ld_inst_w & thread_w[2]) ? rawp_id_w[2:0] : rawp_id2_hold[2:0]; | |
1721 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_rawp_id2 ( | |
1722 | .scan_in(dff_rawp_id2_scanin), | |
1723 | .scan_out(dff_rawp_id2_scanout), | |
1724 | .din (rawp_id2[2:0]), | |
1725 | .dout (rawp_id2_hold[2:0]), | |
1726 | .l1clk(l1clk), | |
1727 | .siclk(siclk), | |
1728 | .soclk(soclk) | |
1729 | ); | |
1730 | assign dec_rawp_id2[0] = ~rawp_id2[2] & ~rawp_id2[1] & ~rawp_id2[0]; | |
1731 | assign dec_rawp_id2[1] = ~rawp_id2[2] & ~rawp_id2[1] & rawp_id2[0]; | |
1732 | assign dec_rawp_id2[2] = ~rawp_id2[2] & rawp_id2[1] & ~rawp_id2[0]; | |
1733 | assign dec_rawp_id2[3] = ~rawp_id2[2] & rawp_id2[1] & rawp_id2[0]; | |
1734 | assign dec_rawp_id2[4] = rawp_id2[2] & ~rawp_id2[1] & ~rawp_id2[0]; | |
1735 | assign dec_rawp_id2[5] = rawp_id2[2] & ~rawp_id2[1] & rawp_id2[0]; | |
1736 | assign dec_rawp_id2[6] = rawp_id2[2] & rawp_id2[1] & ~rawp_id2[0]; | |
1737 | assign dec_rawp_id2[7] = rawp_id2[2] & rawp_id2[1] & rawp_id2[0]; | |
1738 | assign sbc_rawp_rst[2] = |(dec_rawp_id2[7:0] & sbs2_state_ced[7:0]); | |
1739 | ||
1740 | // Thread 3 | |
1741 | assign rawp_id3[2:0] = (lmc_ld_inst_w & thread_w[3]) ? rawp_id_w[2:0] : rawp_id3_hold[2:0]; | |
1742 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_rawp_id3 ( | |
1743 | .scan_in(dff_rawp_id3_scanin), | |
1744 | .scan_out(dff_rawp_id3_scanout), | |
1745 | .din (rawp_id3[2:0]), | |
1746 | .dout (rawp_id3_hold[2:0]), | |
1747 | .l1clk(l1clk), | |
1748 | .siclk(siclk), | |
1749 | .soclk(soclk) | |
1750 | ); | |
1751 | assign dec_rawp_id3[0] = ~rawp_id3[2] & ~rawp_id3[1] & ~rawp_id3[0]; | |
1752 | assign dec_rawp_id3[1] = ~rawp_id3[2] & ~rawp_id3[1] & rawp_id3[0]; | |
1753 | assign dec_rawp_id3[2] = ~rawp_id3[2] & rawp_id3[1] & ~rawp_id3[0]; | |
1754 | assign dec_rawp_id3[3] = ~rawp_id3[2] & rawp_id3[1] & rawp_id3[0]; | |
1755 | assign dec_rawp_id3[4] = rawp_id3[2] & ~rawp_id3[1] & ~rawp_id3[0]; | |
1756 | assign dec_rawp_id3[5] = rawp_id3[2] & ~rawp_id3[1] & rawp_id3[0]; | |
1757 | assign dec_rawp_id3[6] = rawp_id3[2] & rawp_id3[1] & ~rawp_id3[0]; | |
1758 | assign dec_rawp_id3[7] = rawp_id3[2] & rawp_id3[1] & rawp_id3[0]; | |
1759 | assign sbc_rawp_rst[3] = |(dec_rawp_id3[7:0] & sbs3_state_ced[7:0]); | |
1760 | ||
1761 | // Thread 4 | |
1762 | assign rawp_id4[2:0] = (lmc_ld_inst_w & thread_w[4]) ? rawp_id_w[2:0] : rawp_id4_hold[2:0]; | |
1763 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_rawp_id4 ( | |
1764 | .scan_in(dff_rawp_id4_scanin), | |
1765 | .scan_out(dff_rawp_id4_scanout), | |
1766 | .din (rawp_id4[2:0]), | |
1767 | .dout (rawp_id4_hold[2:0]), | |
1768 | .l1clk(l1clk), | |
1769 | .siclk(siclk), | |
1770 | .soclk(soclk) | |
1771 | ); | |
1772 | assign dec_rawp_id4[0] = ~rawp_id4[2] & ~rawp_id4[1] & ~rawp_id4[0]; | |
1773 | assign dec_rawp_id4[1] = ~rawp_id4[2] & ~rawp_id4[1] & rawp_id4[0]; | |
1774 | assign dec_rawp_id4[2] = ~rawp_id4[2] & rawp_id4[1] & ~rawp_id4[0]; | |
1775 | assign dec_rawp_id4[3] = ~rawp_id4[2] & rawp_id4[1] & rawp_id4[0]; | |
1776 | assign dec_rawp_id4[4] = rawp_id4[2] & ~rawp_id4[1] & ~rawp_id4[0]; | |
1777 | assign dec_rawp_id4[5] = rawp_id4[2] & ~rawp_id4[1] & rawp_id4[0]; | |
1778 | assign dec_rawp_id4[6] = rawp_id4[2] & rawp_id4[1] & ~rawp_id4[0]; | |
1779 | assign dec_rawp_id4[7] = rawp_id4[2] & rawp_id4[1] & rawp_id4[0]; | |
1780 | assign sbc_rawp_rst[4] = |(dec_rawp_id4[7:0] & sbs4_state_ced[7:0]); | |
1781 | ||
1782 | // Thread 5 | |
1783 | assign rawp_id5[2:0] = (lmc_ld_inst_w & thread_w[5]) ? rawp_id_w[2:0] : rawp_id5_hold[2:0]; | |
1784 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_rawp_id5 ( | |
1785 | .scan_in(dff_rawp_id5_scanin), | |
1786 | .scan_out(dff_rawp_id5_scanout), | |
1787 | .din (rawp_id5[2:0]), | |
1788 | .dout (rawp_id5_hold[2:0]), | |
1789 | .l1clk(l1clk), | |
1790 | .siclk(siclk), | |
1791 | .soclk(soclk) | |
1792 | ); | |
1793 | assign dec_rawp_id5[0] = ~rawp_id5[2] & ~rawp_id5[1] & ~rawp_id5[0]; | |
1794 | assign dec_rawp_id5[1] = ~rawp_id5[2] & ~rawp_id5[1] & rawp_id5[0]; | |
1795 | assign dec_rawp_id5[2] = ~rawp_id5[2] & rawp_id5[1] & ~rawp_id5[0]; | |
1796 | assign dec_rawp_id5[3] = ~rawp_id5[2] & rawp_id5[1] & rawp_id5[0]; | |
1797 | assign dec_rawp_id5[4] = rawp_id5[2] & ~rawp_id5[1] & ~rawp_id5[0]; | |
1798 | assign dec_rawp_id5[5] = rawp_id5[2] & ~rawp_id5[1] & rawp_id5[0]; | |
1799 | assign dec_rawp_id5[6] = rawp_id5[2] & rawp_id5[1] & ~rawp_id5[0]; | |
1800 | assign dec_rawp_id5[7] = rawp_id5[2] & rawp_id5[1] & rawp_id5[0]; | |
1801 | assign sbc_rawp_rst[5] = |(dec_rawp_id5[7:0] & sbs5_state_ced[7:0]); | |
1802 | ||
1803 | // Thread 6 | |
1804 | assign rawp_id6[2:0] = (lmc_ld_inst_w & thread_w[6]) ? rawp_id_w[2:0] : rawp_id6_hold[2:0]; | |
1805 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_rawp_id6 ( | |
1806 | .scan_in(dff_rawp_id6_scanin), | |
1807 | .scan_out(dff_rawp_id6_scanout), | |
1808 | .din (rawp_id6[2:0]), | |
1809 | .dout (rawp_id6_hold[2:0]), | |
1810 | .l1clk(l1clk), | |
1811 | .siclk(siclk), | |
1812 | .soclk(soclk) | |
1813 | ); | |
1814 | assign dec_rawp_id6[0] = ~rawp_id6[2] & ~rawp_id6[1] & ~rawp_id6[0]; | |
1815 | assign dec_rawp_id6[1] = ~rawp_id6[2] & ~rawp_id6[1] & rawp_id6[0]; | |
1816 | assign dec_rawp_id6[2] = ~rawp_id6[2] & rawp_id6[1] & ~rawp_id6[0]; | |
1817 | assign dec_rawp_id6[3] = ~rawp_id6[2] & rawp_id6[1] & rawp_id6[0]; | |
1818 | assign dec_rawp_id6[4] = rawp_id6[2] & ~rawp_id6[1] & ~rawp_id6[0]; | |
1819 | assign dec_rawp_id6[5] = rawp_id6[2] & ~rawp_id6[1] & rawp_id6[0]; | |
1820 | assign dec_rawp_id6[6] = rawp_id6[2] & rawp_id6[1] & ~rawp_id6[0]; | |
1821 | assign dec_rawp_id6[7] = rawp_id6[2] & rawp_id6[1] & rawp_id6[0]; | |
1822 | assign sbc_rawp_rst[6] = |(dec_rawp_id6[7:0] & sbs6_state_ced[7:0]); | |
1823 | ||
1824 | // Thread 7 | |
1825 | assign rawp_id7[2:0] = (lmc_ld_inst_w & thread_w[7]) ? rawp_id_w[2:0] : rawp_id7_hold[2:0]; | |
1826 | lsu_sbc_ctlmsff_ctl_macro__width_3 dff_rawp_id7 ( | |
1827 | .scan_in(dff_rawp_id7_scanin), | |
1828 | .scan_out(dff_rawp_id7_scanout), | |
1829 | .din (rawp_id7[2:0]), | |
1830 | .dout (rawp_id7_hold[2:0]), | |
1831 | .l1clk(l1clk), | |
1832 | .siclk(siclk), | |
1833 | .soclk(soclk) | |
1834 | ); | |
1835 | assign dec_rawp_id7[0] = ~rawp_id7[2] & ~rawp_id7[1] & ~rawp_id7[0]; | |
1836 | assign dec_rawp_id7[1] = ~rawp_id7[2] & ~rawp_id7[1] & rawp_id7[0]; | |
1837 | assign dec_rawp_id7[2] = ~rawp_id7[2] & rawp_id7[1] & ~rawp_id7[0]; | |
1838 | assign dec_rawp_id7[3] = ~rawp_id7[2] & rawp_id7[1] & rawp_id7[0]; | |
1839 | assign dec_rawp_id7[4] = rawp_id7[2] & ~rawp_id7[1] & ~rawp_id7[0]; | |
1840 | assign dec_rawp_id7[5] = rawp_id7[2] & ~rawp_id7[1] & rawp_id7[0]; | |
1841 | assign dec_rawp_id7[6] = rawp_id7[2] & rawp_id7[1] & ~rawp_id7[0]; | |
1842 | assign dec_rawp_id7[7] = rawp_id7[2] & rawp_id7[1] & rawp_id7[0]; | |
1843 | assign sbc_rawp_rst[7] = |(dec_rawp_id7[7:0] & sbs7_state_ced[7:0]); | |
1844 | ||
1845 | //////////////////////////////////////////////////////////////////////////////// | |
1846 | // Misc | |
1847 | //////////////////////////////////////////////////////////////////////////////// | |
1848 | ||
1849 | // Atomics are uncacheable. | |
1850 | assign sbc_st_pcx_nc = sbc_st_type_p4[1]; | |
1851 | ||
1852 | //////////////////////////////////////////////////////////////////////////////// | |
1853 | // Store buffer RAM diagnostics and error handling | |
1854 | //////////////////////////////////////////////////////////////////////////////// | |
1855 | ||
1856 | // To make the error resolution even more robust, I'm encoding the priv/hpriv bits | |
1857 | // into three bits. Each priv level has a Hamming distance >1 from the others, so | |
1858 | // I know if the parity error affected the priv information. | |
1859 | ||
1860 | assign priv_enc[2] = dcc_hpriv_b; | |
1861 | assign priv_enc[1] = dcc_priv_b & ~dcc_hpriv_b; | |
1862 | assign priv_enc[0] = dcc_hpriv_b | dcc_priv_b; | |
1863 | ||
1864 | assign sbc_stb_ctl_data[2:0] = mbi_run_local ? mbi_wdata[2:0] : priv_enc[2:0]; | |
1865 | ||
1866 | assign inv_addr_prty_m = lsu_asi_error_inject_b31 & lsu_asi_error_inject_b19 & ~dcc_wr_error_inj_m; | |
1867 | assign inv_ecc_m = lsu_asi_error_inject_b31 & lsu_asi_error_inject_b17 & ~dcc_wr_error_inj_m; | |
1868 | ||
1869 | lsu_sbc_ctlmsff_ctl_macro__width_2 dff_error_inj ( | |
1870 | .scan_in(dff_error_inj_scanin), | |
1871 | .scan_out(dff_error_inj_scanout), | |
1872 | .l1clk (l1clk_pm1), | |
1873 | .din ({inv_addr_prty_m,inv_ecc_m}), | |
1874 | .dout ({inv_addr_prty_b,inv_ecc_b}), | |
1875 | .siclk(siclk), | |
1876 | .soclk(soclk) | |
1877 | ); | |
1878 | assign sbc_inv_addr_prty = inv_addr_prty_b; | |
1879 | assign sbc_inv_ecc[6:0] = {7{inv_ecc_b}} & lsu_asi_error_inject[6:0]; | |
1880 | ||
1881 | //////////////////////////////////////////////////////////////////////////////// | |
1882 | // BIST | |
1883 | //////////////////////////////////////////////////////////////////////////////// | |
1884 | ||
1885 | lsu_sbc_ctlmsff_ctl_macro__width_5 dff_bist_in ( | |
1886 | .scan_in(dff_bist_in_scanin), | |
1887 | .scan_out(dff_bist_in_scanout), | |
1888 | .l1clk (l1clk_pm1), | |
1889 | .din ({mbi_stb_cam_read_en,bist_scm_rd_1, mbi_stb_ram_read_en,bist_srm_rd_1, mbi_run}), | |
1890 | .dout ({bist_scm_rd_1, bist_scm_cmp_en,bist_srm_rd_1, bist_srm_cmp_en,mbi_run_local}), | |
1891 | .siclk(siclk), | |
1892 | .soclk(soclk) | |
1893 | ); | |
1894 | ||
1895 | assign sbc_mbi_run = mbi_run_local; | |
1896 | ||
1897 | assign stb_cam_fail = bist_scm_cmp_en & (~sed_bist_cmp_0 | ~sed_bist_cmp_1 | ~sed_bist_cmp_2 | ~sed_bist_cmp_3); | |
1898 | assign stb_ram_fail = bist_srm_cmp_en & (~sed_bist_cmp_0 | ~sed_bist_cmp_1 | ~sed_bist_cmp_2 | ~sed_bist_cmp_3); | |
1899 | ||
1900 | lsu_sbc_ctlmsff_ctl_macro__width_2 dff_bist_fail ( | |
1901 | .scan_in(dff_bist_fail_scanin), | |
1902 | .scan_out(dff_bist_fail_scanout), | |
1903 | .l1clk (l1clk_pm1), | |
1904 | .din ({stb_cam_fail, stb_ram_fail}), | |
1905 | .dout ({lsu_mbi_stb_cam_fail,lsu_mbi_stb_ram_fail}), | |
1906 | .siclk(siclk), | |
1907 | .soclk(soclk) | |
1908 | ); | |
1909 | ||
1910 | //////////////////////////////////////////////////////////////////////////////// | |
1911 | // Junk to prevent a collision at the FRF. Without this, there is a possibility | |
1912 | // that a block store (which reads the FRF) could collide with an ASI read. | |
1913 | // When I detect an ASI read going out, supress block store requests until it | |
1914 | // comes back. | |
1915 | //////////////////////////////////////////////////////////////////////////////// | |
1916 | ||
1917 | assign frf_read_out = pic_asi_sel_p4 & ~st_asi_sel_p4 & (lmd_asi_type[1:0] == 2'b00) & (lmd_asi_asi[7:0] == 8'h49); | |
1918 | assign frf_read_pending_in = frf_read_out | (frf_read_pending & ~lmc_asi_indet_retire); | |
1919 | ||
1920 | lsu_sbc_ctlmsff_ctl_macro__width_1 dff_frf_read ( | |
1921 | .scan_in(dff_frf_read_scanin), | |
1922 | .scan_out(dff_frf_read_scanout), | |
1923 | .din (frf_read_pending_in), | |
1924 | .dout (frf_read_pending), | |
1925 | .l1clk(l1clk), | |
1926 | .siclk(siclk), | |
1927 | .soclk(soclk) | |
1928 | ); | |
1929 | ||
1930 | assign lsu_frf_read_pending = frf_read_pending; | |
1931 | ||
1932 | lsu_sbc_ctlmsff_ctl_macro__scanreverse_1__width_5 dff_spares ( | |
1933 | .scan_in(spares_scanin), | |
1934 | .scan_out(spares_scanout), | |
1935 | .din ({3'b0, indet_block_req_p2,indet_block_req_p3}), | |
1936 | .dout ({unused[2:0],indet_block_req_p3,indet_block_req_p4}), | |
1937 | .l1clk(l1clk), | |
1938 | .siclk(siclk), | |
1939 | .soclk(soclk) | |
1940 | ); | |
1941 | ||
1942 | //spare_ctl_macro spares (num=5) ( | |
1943 | // .scan_in(spares_scanin), | |
1944 | // .scan_out(spares_scanout), | |
1945 | // .l1clk (l1clk) | |
1946 | //); | |
1947 | ||
1948 | supply0 vss; | |
1949 | supply1 vdd; | |
1950 | // fixscan start: | |
1951 | assign dff_flush_b_scanin = scan_in ; | |
1952 | assign dff_flush_w_scanin = dff_flush_b_scanout ; | |
1953 | assign dff_inst_m_scanin = dff_flush_w_scanout ; | |
1954 | assign dff_ldst_fp_m_scanin = dff_inst_m_scanout ; | |
1955 | assign dff_ldst_sz_b_scanin = dff_ldst_fp_m_scanout ; | |
1956 | assign dff_st_w_scanin = dff_ldst_sz_b_scanout ; | |
1957 | assign dff_st_le_b_scanin = dff_st_w_scanout ; | |
1958 | assign dff_cam_hit_scanin = dff_st_le_b_scanout ; | |
1959 | assign dff_ram_wptr_vld_b_scanin = dff_cam_hit_scanout ; | |
1960 | assign dff_stb_wptr_vld_w_scanin = dff_ram_wptr_vld_b_scanout; | |
1961 | assign dff_tid_m_scanin = dff_stb_wptr_vld_w_scanout; | |
1962 | assign dff_thread_b_scanin = dff_tid_m_scanout ; | |
1963 | assign dff_cam_wptr_scanin = dff_thread_b_scanout ; | |
1964 | assign dff_ram_rptr_scanin = dff_cam_wptr_scanout ; | |
1965 | assign dff_st_rq_p2_scanin = dff_ram_rptr_scanout ; | |
1966 | assign st_lru8_scanin = dff_st_rq_p2_scanout ; | |
1967 | assign dff_indet_temp_scanin = st_lru8_scanout ; | |
1968 | assign dff_st_sel_p3_scanin = dff_indet_temp_scanout ; | |
1969 | assign dff_asi_indet_scanin = dff_st_sel_p3_scanout ; | |
1970 | assign dff_st_sel_p4_scanin = dff_asi_indet_scanout ; | |
1971 | assign dff_cerer_scanin = dff_st_sel_p4_scanout ; | |
1972 | assign dff_stb_err_scanin = dff_cerer_scanout ; | |
1973 | assign dff_fatal_err_scanin = dff_stb_err_scanout ; | |
1974 | assign dff_bst_addr_pipe_scanin = dff_fatal_err_scanout ; | |
1975 | assign dff_bst_addr_scanin = dff_bst_addr_pipe_scanout; | |
1976 | assign dff_bst_lendian_scanin = dff_bst_addr_scanout ; | |
1977 | assign dff_bst_busy_scanin = dff_bst_lendian_scanout ; | |
1978 | assign bst_lru8_scanin = dff_bst_busy_scanout ; | |
1979 | assign dff_bst_req_scanin = bst_lru8_scanout ; | |
1980 | assign dff_bst_tid_scanin = dff_bst_req_scanout ; | |
1981 | assign dff_rmo_st_w_scanin = dff_bst_tid_scanout ; | |
1982 | assign dff_bst_seq_scanin = dff_rmo_st_w_scanout ; | |
1983 | assign dff_bst_count_scanin = dff_bst_seq_scanout ; | |
1984 | assign dff_bst_rd_err_scanin = dff_bst_count_scanout ; | |
1985 | assign dff_std_seq_scanin = dff_bst_rd_err_scanout ; | |
1986 | assign dff_praw_ctl_w_scanin = dff_std_seq_scanout ; | |
1987 | assign dff_rawp_id0_scanin = dff_praw_ctl_w_scanout ; | |
1988 | assign dff_rawp_id1_scanin = dff_rawp_id0_scanout ; | |
1989 | assign dff_rawp_id2_scanin = dff_rawp_id1_scanout ; | |
1990 | assign dff_rawp_id3_scanin = dff_rawp_id2_scanout ; | |
1991 | assign dff_rawp_id4_scanin = dff_rawp_id3_scanout ; | |
1992 | assign dff_rawp_id5_scanin = dff_rawp_id4_scanout ; | |
1993 | assign dff_rawp_id6_scanin = dff_rawp_id5_scanout ; | |
1994 | assign dff_rawp_id7_scanin = dff_rawp_id6_scanout ; | |
1995 | assign dff_error_inj_scanin = dff_rawp_id7_scanout ; | |
1996 | assign dff_bist_in_scanin = dff_error_inj_scanout ; | |
1997 | assign dff_bist_fail_scanin = dff_bist_in_scanout ; | |
1998 | assign dff_frf_read_scanin = dff_bist_fail_scanout ; | |
1999 | assign spares_scanin = dff_frf_read_scanout ; | |
2000 | assign scan_out = spares_scanout ; | |
2001 | // fixscan end: | |
2002 | endmodule | |
2003 | ||
2004 | ||
2005 | ||
2006 | ||
2007 | ||
2008 | ||
2009 | // any PARAMS parms go into naming of macro | |
2010 | ||
2011 | module lsu_sbc_ctll1clkhdr_ctl_macro ( | |
2012 | l2clk, | |
2013 | l1en, | |
2014 | pce_ov, | |
2015 | stop, | |
2016 | se, | |
2017 | l1clk); | |
2018 | ||
2019 | ||
2020 | input l2clk; | |
2021 | input l1en; | |
2022 | input pce_ov; | |
2023 | input stop; | |
2024 | input se; | |
2025 | output l1clk; | |
2026 | ||
2027 | ||
2028 | ||
2029 | ||
2030 | ||
2031 | cl_sc1_l1hdr_8x c_0 ( | |
2032 | ||
2033 | ||
2034 | .l2clk(l2clk), | |
2035 | .pce(l1en), | |
2036 | .l1clk(l1clk), | |
2037 | .se(se), | |
2038 | .pce_ov(pce_ov), | |
2039 | .stop(stop) | |
2040 | ); | |
2041 | ||
2042 | ||
2043 | ||
2044 | endmodule | |
2045 | ||
2046 | ||
2047 | ||
2048 | ||
2049 | ||
2050 | ||
2051 | ||
2052 | ||
2053 | ||
2054 | ||
2055 | ||
2056 | ||
2057 | ||
2058 | // any PARAMS parms go into naming of macro | |
2059 | ||
2060 | module lsu_sbc_ctlmsff_ctl_macro__width_1 ( | |
2061 | din, | |
2062 | l1clk, | |
2063 | scan_in, | |
2064 | siclk, | |
2065 | soclk, | |
2066 | dout, | |
2067 | scan_out); | |
2068 | wire [0:0] fdin; | |
2069 | ||
2070 | input [0:0] din; | |
2071 | input l1clk; | |
2072 | input scan_in; | |
2073 | ||
2074 | ||
2075 | input siclk; | |
2076 | input soclk; | |
2077 | ||
2078 | output [0:0] dout; | |
2079 | output scan_out; | |
2080 | assign fdin[0:0] = din[0:0]; | |
2081 | ||
2082 | ||
2083 | ||
2084 | ||
2085 | ||
2086 | ||
2087 | dff #(1) d0_0 ( | |
2088 | .l1clk(l1clk), | |
2089 | .siclk(siclk), | |
2090 | .soclk(soclk), | |
2091 | .d(fdin[0:0]), | |
2092 | .si(scan_in), | |
2093 | .so(scan_out), | |
2094 | .q(dout[0:0]) | |
2095 | ); | |
2096 | ||
2097 | ||
2098 | ||
2099 | ||
2100 | ||
2101 | ||
2102 | ||
2103 | ||
2104 | ||
2105 | ||
2106 | ||
2107 | ||
2108 | endmodule | |
2109 | ||
2110 | ||
2111 | ||
2112 | ||
2113 | ||
2114 | ||
2115 | ||
2116 | ||
2117 | ||
2118 | ||
2119 | ||
2120 | ||
2121 | ||
2122 | // any PARAMS parms go into naming of macro | |
2123 | ||
2124 | module lsu_sbc_ctlmsff_ctl_macro__width_3 ( | |
2125 | din, | |
2126 | l1clk, | |
2127 | scan_in, | |
2128 | siclk, | |
2129 | soclk, | |
2130 | dout, | |
2131 | scan_out); | |
2132 | wire [2:0] fdin; | |
2133 | wire [1:0] so; | |
2134 | ||
2135 | input [2:0] din; | |
2136 | input l1clk; | |
2137 | input scan_in; | |
2138 | ||
2139 | ||
2140 | input siclk; | |
2141 | input soclk; | |
2142 | ||
2143 | output [2:0] dout; | |
2144 | output scan_out; | |
2145 | assign fdin[2:0] = din[2:0]; | |
2146 | ||
2147 | ||
2148 | ||
2149 | ||
2150 | ||
2151 | ||
2152 | dff #(3) d0_0 ( | |
2153 | .l1clk(l1clk), | |
2154 | .siclk(siclk), | |
2155 | .soclk(soclk), | |
2156 | .d(fdin[2:0]), | |
2157 | .si({scan_in,so[1:0]}), | |
2158 | .so({so[1:0],scan_out}), | |
2159 | .q(dout[2:0]) | |
2160 | ); | |
2161 | ||
2162 | ||
2163 | ||
2164 | ||
2165 | ||
2166 | ||
2167 | ||
2168 | ||
2169 | ||
2170 | ||
2171 | ||
2172 | ||
2173 | endmodule | |
2174 | ||
2175 | ||
2176 | ||
2177 | ||
2178 | ||
2179 | ||
2180 | ||
2181 | ||
2182 | ||
2183 | ||
2184 | ||
2185 | ||
2186 | ||
2187 | // any PARAMS parms go into naming of macro | |
2188 | ||
2189 | module lsu_sbc_ctlmsff_ctl_macro__width_2 ( | |
2190 | din, | |
2191 | l1clk, | |
2192 | scan_in, | |
2193 | siclk, | |
2194 | soclk, | |
2195 | dout, | |
2196 | scan_out); | |
2197 | wire [1:0] fdin; | |
2198 | wire [0:0] so; | |
2199 | ||
2200 | input [1:0] din; | |
2201 | input l1clk; | |
2202 | input scan_in; | |
2203 | ||
2204 | ||
2205 | input siclk; | |
2206 | input soclk; | |
2207 | ||
2208 | output [1:0] dout; | |
2209 | output scan_out; | |
2210 | assign fdin[1:0] = din[1:0]; | |
2211 | ||
2212 | ||
2213 | ||
2214 | ||
2215 | ||
2216 | ||
2217 | dff #(2) d0_0 ( | |
2218 | .l1clk(l1clk), | |
2219 | .siclk(siclk), | |
2220 | .soclk(soclk), | |
2221 | .d(fdin[1:0]), | |
2222 | .si({scan_in,so[0:0]}), | |
2223 | .so({so[0:0],scan_out}), | |
2224 | .q(dout[1:0]) | |
2225 | ); | |
2226 | ||
2227 | ||
2228 | ||
2229 | ||
2230 | ||
2231 | ||
2232 | ||
2233 | ||
2234 | ||
2235 | ||
2236 | ||
2237 | ||
2238 | endmodule | |
2239 | ||
2240 | ||
2241 | ||
2242 | ||
2243 | ||
2244 | ||
2245 | ||
2246 | ||
2247 | ||
2248 | ||
2249 | ||
2250 | ||
2251 | ||
2252 | // any PARAMS parms go into naming of macro | |
2253 | ||
2254 | module lsu_sbc_ctlmsff_ctl_macro__width_9 ( | |
2255 | din, | |
2256 | l1clk, | |
2257 | scan_in, | |
2258 | siclk, | |
2259 | soclk, | |
2260 | dout, | |
2261 | scan_out); | |
2262 | wire [8:0] fdin; | |
2263 | wire [7:0] so; | |
2264 | ||
2265 | input [8:0] din; | |
2266 | input l1clk; | |
2267 | input scan_in; | |
2268 | ||
2269 | ||
2270 | input siclk; | |
2271 | input soclk; | |
2272 | ||
2273 | output [8:0] dout; | |
2274 | output scan_out; | |
2275 | assign fdin[8:0] = din[8:0]; | |
2276 | ||
2277 | ||
2278 | ||
2279 | ||
2280 | ||
2281 | ||
2282 | dff #(9) d0_0 ( | |
2283 | .l1clk(l1clk), | |
2284 | .siclk(siclk), | |
2285 | .soclk(soclk), | |
2286 | .d(fdin[8:0]), | |
2287 | .si({scan_in,so[7:0]}), | |
2288 | .so({so[7:0],scan_out}), | |
2289 | .q(dout[8:0]) | |
2290 | ); | |
2291 | ||
2292 | ||
2293 | ||
2294 | ||
2295 | ||
2296 | ||
2297 | ||
2298 | ||
2299 | ||
2300 | ||
2301 | ||
2302 | ||
2303 | endmodule | |
2304 | ||
2305 | ||
2306 | ||
2307 | ||
2308 | ||
2309 | ||
2310 | ||
2311 | ||
2312 | ||
2313 | ||
2314 | ||
2315 | ||
2316 | ||
2317 | // any PARAMS parms go into naming of macro | |
2318 | ||
2319 | module lsu_sbc_ctlmsff_ctl_macro__width_6 ( | |
2320 | din, | |
2321 | l1clk, | |
2322 | scan_in, | |
2323 | siclk, | |
2324 | soclk, | |
2325 | dout, | |
2326 | scan_out); | |
2327 | wire [5:0] fdin; | |
2328 | wire [4:0] so; | |
2329 | ||
2330 | input [5:0] din; | |
2331 | input l1clk; | |
2332 | input scan_in; | |
2333 | ||
2334 | ||
2335 | input siclk; | |
2336 | input soclk; | |
2337 | ||
2338 | output [5:0] dout; | |
2339 | output scan_out; | |
2340 | assign fdin[5:0] = din[5:0]; | |
2341 | ||
2342 | ||
2343 | ||
2344 | ||
2345 | ||
2346 | ||
2347 | dff #(6) d0_0 ( | |
2348 | .l1clk(l1clk), | |
2349 | .siclk(siclk), | |
2350 | .soclk(soclk), | |
2351 | .d(fdin[5:0]), | |
2352 | .si({scan_in,so[4:0]}), | |
2353 | .so({so[4:0],scan_out}), | |
2354 | .q(dout[5:0]) | |
2355 | ); | |
2356 | ||
2357 | ||
2358 | ||
2359 | ||
2360 | ||
2361 | ||
2362 | ||
2363 | ||
2364 | ||
2365 | ||
2366 | ||
2367 | ||
2368 | endmodule | |
2369 | ||
2370 | ||
2371 | ||
2372 | ||
2373 | ||
2374 | ||
2375 | ||
2376 | ||
2377 | ||
2378 | ||
2379 | ||
2380 | ||
2381 | ||
2382 | // any PARAMS parms go into naming of macro | |
2383 | ||
2384 | module lsu_sbc_ctlmsff_ctl_macro__width_8 ( | |
2385 | din, | |
2386 | l1clk, | |
2387 | scan_in, | |
2388 | siclk, | |
2389 | soclk, | |
2390 | dout, | |
2391 | scan_out); | |
2392 | wire [7:0] fdin; | |
2393 | wire [6:0] so; | |
2394 | ||
2395 | input [7:0] din; | |
2396 | input l1clk; | |
2397 | input scan_in; | |
2398 | ||
2399 | ||
2400 | input siclk; | |
2401 | input soclk; | |
2402 | ||
2403 | output [7:0] dout; | |
2404 | output scan_out; | |
2405 | assign fdin[7:0] = din[7:0]; | |
2406 | ||
2407 | ||
2408 | ||
2409 | ||
2410 | ||
2411 | ||
2412 | dff #(8) d0_0 ( | |
2413 | .l1clk(l1clk), | |
2414 | .siclk(siclk), | |
2415 | .soclk(soclk), | |
2416 | .d(fdin[7:0]), | |
2417 | .si({scan_in,so[6:0]}), | |
2418 | .so({so[6:0],scan_out}), | |
2419 | .q(dout[7:0]) | |
2420 | ); | |
2421 | ||
2422 | ||
2423 | ||
2424 | ||
2425 | ||
2426 | ||
2427 | ||
2428 | ||
2429 | ||
2430 | ||
2431 | ||
2432 | ||
2433 | endmodule | |
2434 | ||
2435 | ||
2436 | ||
2437 | ||
2438 | ||
2439 | ||
2440 | ||
2441 | ||
2442 | ||
2443 | ||
2444 | ||
2445 | ||
2446 | ||
2447 | // any PARAMS parms go into naming of macro | |
2448 | ||
2449 | module lsu_sbc_ctlmsff_ctl_macro__width_12 ( | |
2450 | din, | |
2451 | l1clk, | |
2452 | scan_in, | |
2453 | siclk, | |
2454 | soclk, | |
2455 | dout, | |
2456 | scan_out); | |
2457 | wire [11:0] fdin; | |
2458 | wire [10:0] so; | |
2459 | ||
2460 | input [11:0] din; | |
2461 | input l1clk; | |
2462 | input scan_in; | |
2463 | ||
2464 | ||
2465 | input siclk; | |
2466 | input soclk; | |
2467 | ||
2468 | output [11:0] dout; | |
2469 | output scan_out; | |
2470 | assign fdin[11:0] = din[11:0]; | |
2471 | ||
2472 | ||
2473 | ||
2474 | ||
2475 | ||
2476 | ||
2477 | dff #(12) d0_0 ( | |
2478 | .l1clk(l1clk), | |
2479 | .siclk(siclk), | |
2480 | .soclk(soclk), | |
2481 | .d(fdin[11:0]), | |
2482 | .si({scan_in,so[10:0]}), | |
2483 | .so({so[10:0],scan_out}), | |
2484 | .q(dout[11:0]) | |
2485 | ); | |
2486 | ||
2487 | ||
2488 | ||
2489 | ||
2490 | ||
2491 | ||
2492 | ||
2493 | ||
2494 | ||
2495 | ||
2496 | ||
2497 | ||
2498 | endmodule | |
2499 | ||
2500 | ||
2501 | ||
2502 | ||
2503 | ||
2504 | ||
2505 | ||
2506 | ||
2507 | ||
2508 | ||
2509 | ||
2510 | ||
2511 | ||
2512 | // any PARAMS parms go into naming of macro | |
2513 | ||
2514 | module lsu_sbc_ctlmsff_ctl_macro__width_18 ( | |
2515 | din, | |
2516 | l1clk, | |
2517 | scan_in, | |
2518 | siclk, | |
2519 | soclk, | |
2520 | dout, | |
2521 | scan_out); | |
2522 | wire [17:0] fdin; | |
2523 | wire [16:0] so; | |
2524 | ||
2525 | input [17:0] din; | |
2526 | input l1clk; | |
2527 | input scan_in; | |
2528 | ||
2529 | ||
2530 | input siclk; | |
2531 | input soclk; | |
2532 | ||
2533 | output [17:0] dout; | |
2534 | output scan_out; | |
2535 | assign fdin[17:0] = din[17:0]; | |
2536 | ||
2537 | ||
2538 | ||
2539 | ||
2540 | ||
2541 | ||
2542 | dff #(18) d0_0 ( | |
2543 | .l1clk(l1clk), | |
2544 | .siclk(siclk), | |
2545 | .soclk(soclk), | |
2546 | .d(fdin[17:0]), | |
2547 | .si({scan_in,so[16:0]}), | |
2548 | .so({so[16:0],scan_out}), | |
2549 | .q(dout[17:0]) | |
2550 | ); | |
2551 | ||
2552 | ||
2553 | ||
2554 | ||
2555 | ||
2556 | ||
2557 | ||
2558 | ||
2559 | ||
2560 | ||
2561 | ||
2562 | ||
2563 | endmodule | |
2564 | ||
2565 | ||
2566 | ||
2567 | ||
2568 | ||
2569 | ||
2570 | ||
2571 | // any PARAMS parms go into naming of macro | |
2572 | ||
2573 | module lsu_sbc_ctlmsff_ctl_macro__width_7 ( | |
2574 | din, | |
2575 | l1clk, | |
2576 | scan_in, | |
2577 | siclk, | |
2578 | soclk, | |
2579 | dout, | |
2580 | scan_out); | |
2581 | wire [6:0] fdin; | |
2582 | wire [5:0] so; | |
2583 | ||
2584 | input [6:0] din; | |
2585 | input l1clk; | |
2586 | input scan_in; | |
2587 | ||
2588 | ||
2589 | input siclk; | |
2590 | input soclk; | |
2591 | ||
2592 | output [6:0] dout; | |
2593 | output scan_out; | |
2594 | assign fdin[6:0] = din[6:0]; | |
2595 | ||
2596 | ||
2597 | ||
2598 | ||
2599 | ||
2600 | ||
2601 | dff #(7) d0_0 ( | |
2602 | .l1clk(l1clk), | |
2603 | .siclk(siclk), | |
2604 | .soclk(soclk), | |
2605 | .d(fdin[6:0]), | |
2606 | .si({scan_in,so[5:0]}), | |
2607 | .so({so[5:0],scan_out}), | |
2608 | .q(dout[6:0]) | |
2609 | ); | |
2610 | ||
2611 | ||
2612 | ||
2613 | ||
2614 | ||
2615 | ||
2616 | ||
2617 | ||
2618 | ||
2619 | ||
2620 | ||
2621 | ||
2622 | endmodule | |
2623 | ||
2624 | ||
2625 | ||
2626 | ||
2627 | ||
2628 | ||
2629 | ||
2630 | ||
2631 | ||
2632 | ||
2633 | ||
2634 | ||
2635 | ||
2636 | // any PARAMS parms go into naming of macro | |
2637 | ||
2638 | module lsu_sbc_ctlmsff_ctl_macro__width_11 ( | |
2639 | din, | |
2640 | l1clk, | |
2641 | scan_in, | |
2642 | siclk, | |
2643 | soclk, | |
2644 | dout, | |
2645 | scan_out); | |
2646 | wire [10:0] fdin; | |
2647 | wire [9:0] so; | |
2648 | ||
2649 | input [10:0] din; | |
2650 | input l1clk; | |
2651 | input scan_in; | |
2652 | ||
2653 | ||
2654 | input siclk; | |
2655 | input soclk; | |
2656 | ||
2657 | output [10:0] dout; | |
2658 | output scan_out; | |
2659 | assign fdin[10:0] = din[10:0]; | |
2660 | ||
2661 | ||
2662 | ||
2663 | ||
2664 | ||
2665 | ||
2666 | dff #(11) d0_0 ( | |
2667 | .l1clk(l1clk), | |
2668 | .siclk(siclk), | |
2669 | .soclk(soclk), | |
2670 | .d(fdin[10:0]), | |
2671 | .si({scan_in,so[9:0]}), | |
2672 | .so({so[9:0],scan_out}), | |
2673 | .q(dout[10:0]) | |
2674 | ); | |
2675 | ||
2676 | ||
2677 | ||
2678 | ||
2679 | ||
2680 | ||
2681 | ||
2682 | ||
2683 | ||
2684 | ||
2685 | ||
2686 | ||
2687 | endmodule | |
2688 | ||
2689 | ||
2690 | ||
2691 | ||
2692 | ||
2693 | ||
2694 | ||
2695 | ||
2696 | ||
2697 | ||
2698 | ||
2699 | ||
2700 | ||
2701 | // any PARAMS parms go into naming of macro | |
2702 | ||
2703 | module lsu_sbc_ctlmsff_ctl_macro__width_4 ( | |
2704 | din, | |
2705 | l1clk, | |
2706 | scan_in, | |
2707 | siclk, | |
2708 | soclk, | |
2709 | dout, | |
2710 | scan_out); | |
2711 | wire [3:0] fdin; | |
2712 | wire [2:0] so; | |
2713 | ||
2714 | input [3:0] din; | |
2715 | input l1clk; | |
2716 | input scan_in; | |
2717 | ||
2718 | ||
2719 | input siclk; | |
2720 | input soclk; | |
2721 | ||
2722 | output [3:0] dout; | |
2723 | output scan_out; | |
2724 | assign fdin[3:0] = din[3:0]; | |
2725 | ||
2726 | ||
2727 | ||
2728 | ||
2729 | ||
2730 | ||
2731 | dff #(4) d0_0 ( | |
2732 | .l1clk(l1clk), | |
2733 | .siclk(siclk), | |
2734 | .soclk(soclk), | |
2735 | .d(fdin[3:0]), | |
2736 | .si({scan_in,so[2:0]}), | |
2737 | .so({so[2:0],scan_out}), | |
2738 | .q(dout[3:0]) | |
2739 | ); | |
2740 | ||
2741 | ||
2742 | ||
2743 | ||
2744 | ||
2745 | ||
2746 | ||
2747 | ||
2748 | ||
2749 | ||
2750 | ||
2751 | ||
2752 | endmodule | |
2753 | ||
2754 | ||
2755 | ||
2756 | ||
2757 | ||
2758 | ||
2759 | ||
2760 | ||
2761 | ||
2762 | ||
2763 | ||
2764 | ||
2765 | ||
2766 | // any PARAMS parms go into naming of macro | |
2767 | ||
2768 | module lsu_sbc_ctlmsff_ctl_macro__width_10 ( | |
2769 | din, | |
2770 | l1clk, | |
2771 | scan_in, | |
2772 | siclk, | |
2773 | soclk, | |
2774 | dout, | |
2775 | scan_out); | |
2776 | wire [9:0] fdin; | |
2777 | wire [8:0] so; | |
2778 | ||
2779 | input [9:0] din; | |
2780 | input l1clk; | |
2781 | input scan_in; | |
2782 | ||
2783 | ||
2784 | input siclk; | |
2785 | input soclk; | |
2786 | ||
2787 | output [9:0] dout; | |
2788 | output scan_out; | |
2789 | assign fdin[9:0] = din[9:0]; | |
2790 | ||
2791 | ||
2792 | ||
2793 | ||
2794 | ||
2795 | ||
2796 | dff #(10) d0_0 ( | |
2797 | .l1clk(l1clk), | |
2798 | .siclk(siclk), | |
2799 | .soclk(soclk), | |
2800 | .d(fdin[9:0]), | |
2801 | .si({scan_in,so[8:0]}), | |
2802 | .so({so[8:0],scan_out}), | |
2803 | .q(dout[9:0]) | |
2804 | ); | |
2805 | ||
2806 | ||
2807 | ||
2808 | ||
2809 | ||
2810 | ||
2811 | ||
2812 | ||
2813 | ||
2814 | ||
2815 | ||
2816 | ||
2817 | endmodule | |
2818 | ||
2819 | ||
2820 | ||
2821 | ||
2822 | ||
2823 | ||
2824 | ||
2825 | ||
2826 | ||
2827 | ||
2828 | ||
2829 | ||
2830 | ||
2831 | // any PARAMS parms go into naming of macro | |
2832 | ||
2833 | module lsu_sbc_ctlmsff_ctl_macro__width_16 ( | |
2834 | din, | |
2835 | l1clk, | |
2836 | scan_in, | |
2837 | siclk, | |
2838 | soclk, | |
2839 | dout, | |
2840 | scan_out); | |
2841 | wire [15:0] fdin; | |
2842 | wire [14:0] so; | |
2843 | ||
2844 | input [15:0] din; | |
2845 | input l1clk; | |
2846 | input scan_in; | |
2847 | ||
2848 | ||
2849 | input siclk; | |
2850 | input soclk; | |
2851 | ||
2852 | output [15:0] dout; | |
2853 | output scan_out; | |
2854 | assign fdin[15:0] = din[15:0]; | |
2855 | ||
2856 | ||
2857 | ||
2858 | ||
2859 | ||
2860 | ||
2861 | dff #(16) d0_0 ( | |
2862 | .l1clk(l1clk), | |
2863 | .siclk(siclk), | |
2864 | .soclk(soclk), | |
2865 | .d(fdin[15:0]), | |
2866 | .si({scan_in,so[14:0]}), | |
2867 | .so({so[14:0],scan_out}), | |
2868 | .q(dout[15:0]) | |
2869 | ); | |
2870 | ||
2871 | ||
2872 | ||
2873 | ||
2874 | ||
2875 | ||
2876 | ||
2877 | ||
2878 | ||
2879 | ||
2880 | ||
2881 | ||
2882 | endmodule | |
2883 | ||
2884 | ||
2885 | ||
2886 | ||
2887 | ||
2888 | ||
2889 | ||
2890 | ||
2891 | ||
2892 | ||
2893 | ||
2894 | ||
2895 | ||
2896 | // any PARAMS parms go into naming of macro | |
2897 | ||
2898 | module lsu_sbc_ctlmsff_ctl_macro__width_5 ( | |
2899 | din, | |
2900 | l1clk, | |
2901 | scan_in, | |
2902 | siclk, | |
2903 | soclk, | |
2904 | dout, | |
2905 | scan_out); | |
2906 | wire [4:0] fdin; | |
2907 | wire [3:0] so; | |
2908 | ||
2909 | input [4:0] din; | |
2910 | input l1clk; | |
2911 | input scan_in; | |
2912 | ||
2913 | ||
2914 | input siclk; | |
2915 | input soclk; | |
2916 | ||
2917 | output [4:0] dout; | |
2918 | output scan_out; | |
2919 | assign fdin[4:0] = din[4:0]; | |
2920 | ||
2921 | ||
2922 | ||
2923 | ||
2924 | ||
2925 | ||
2926 | dff #(5) d0_0 ( | |
2927 | .l1clk(l1clk), | |
2928 | .siclk(siclk), | |
2929 | .soclk(soclk), | |
2930 | .d(fdin[4:0]), | |
2931 | .si({scan_in,so[3:0]}), | |
2932 | .so({so[3:0],scan_out}), | |
2933 | .q(dout[4:0]) | |
2934 | ); | |
2935 | ||
2936 | ||
2937 | ||
2938 | ||
2939 | ||
2940 | ||
2941 | ||
2942 | ||
2943 | ||
2944 | ||
2945 | ||
2946 | ||
2947 | endmodule | |
2948 | ||
2949 | ||
2950 | ||
2951 | ||
2952 | ||
2953 | ||
2954 | ||
2955 | ||
2956 | ||
2957 | ||
2958 | ||
2959 | ||
2960 | ||
2961 | // any PARAMS parms go into naming of macro | |
2962 | ||
2963 | module lsu_sbc_ctlmsff_ctl_macro__scanreverse_1__width_5 ( | |
2964 | din, | |
2965 | l1clk, | |
2966 | scan_in, | |
2967 | siclk, | |
2968 | soclk, | |
2969 | dout, | |
2970 | scan_out); | |
2971 | wire [4:0] fdin; | |
2972 | wire [0:3] so; | |
2973 | ||
2974 | input [4:0] din; | |
2975 | input l1clk; | |
2976 | input scan_in; | |
2977 | ||
2978 | ||
2979 | input siclk; | |
2980 | input soclk; | |
2981 | ||
2982 | output [4:0] dout; | |
2983 | output scan_out; | |
2984 | assign fdin[4:0] = din[4:0]; | |
2985 | ||
2986 | ||
2987 | ||
2988 | ||
2989 | ||
2990 | ||
2991 | dff #(5) d0_0 ( | |
2992 | .l1clk(l1clk), | |
2993 | .siclk(siclk), | |
2994 | .soclk(soclk), | |
2995 | .d(fdin[4:0]), | |
2996 | .si({so[0:3],scan_in}), | |
2997 | .so({scan_out,so[0:3]}), | |
2998 | .q(dout[4:0]) | |
2999 | ); | |
3000 | ||
3001 | ||
3002 | ||
3003 | ||
3004 | ||
3005 | ||
3006 | ||
3007 | ||
3008 | ||
3009 | ||
3010 | ||
3011 | ||
3012 | endmodule | |
3013 | ||
3014 | ||
3015 | ||
3016 | ||
3017 | ||
3018 | ||
3019 | ||
3020 |