Commit | Line | Data |
---|---|---|
86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: lsu_spd_dp.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module lsu_spd_dp ( | |
36 | sbd_st_addr_b, | |
37 | sbc_st_addr_new, | |
38 | sbc_thread_b, | |
39 | sbc_spd_clken, | |
40 | sbc_tidb_eq_tidw, | |
41 | sbc_inv_addr_prty, | |
42 | sbc_cam_line_en_m, | |
43 | stb_cam_data, | |
44 | stb_ram_cparity, | |
45 | dcc_bmask_parity_b, | |
46 | spd_st_line_match, | |
47 | stb_cam_perr, | |
48 | stb_cparity_calc, | |
49 | stb_cam_line_en_b, | |
50 | l2clk, | |
51 | scan_in, | |
52 | tcu_pce_ov, | |
53 | tcu_scan_en, | |
54 | tcu_se_scancollar_in, | |
55 | spc_aclk, | |
56 | spc_bclk, | |
57 | scan_out); | |
58 | wire stop; | |
59 | wire se; | |
60 | wire pce_ov; | |
61 | wire siclk; | |
62 | wire soclk; | |
63 | wire [39:3] st_addr_b; | |
64 | wire dff_st_addr_w_scanin; | |
65 | wire dff_st_addr_w_scanout; | |
66 | wire [38:6] st_addr_w; | |
67 | wire dff_last_line_0_scanin; | |
68 | wire dff_last_line_0_scanout; | |
69 | wire [38:6] last_line_0; | |
70 | wire dff_last_line_1_scanin; | |
71 | wire dff_last_line_1_scanout; | |
72 | wire [38:6] last_line_1; | |
73 | wire dff_last_line_2_scanin; | |
74 | wire dff_last_line_2_scanout; | |
75 | wire [38:6] last_line_2; | |
76 | wire dff_last_line_3_scanin; | |
77 | wire dff_last_line_3_scanout; | |
78 | wire [38:6] last_line_3; | |
79 | wire dff_last_line_4_scanin; | |
80 | wire dff_last_line_4_scanout; | |
81 | wire [38:6] last_line_4; | |
82 | wire dff_last_line_5_scanin; | |
83 | wire dff_last_line_5_scanout; | |
84 | wire [38:6] last_line_5; | |
85 | wire dff_last_line_6_scanin; | |
86 | wire dff_last_line_6_scanout; | |
87 | wire [38:6] last_line_6; | |
88 | wire dff_last_line_7_scanin; | |
89 | wire dff_last_line_7_scanout; | |
90 | wire [38:6] last_line_7; | |
91 | wire [38:6] last_line; | |
92 | wire [38:6] cmp_addr; | |
93 | wire line_match_38_23; | |
94 | wire line_match_22_7; | |
95 | wire line_match_6; | |
96 | wire pa_b39_b_; | |
97 | wire addr_parity_hi; | |
98 | wire addr_parity_lo; | |
99 | wire stb_cparity_calc_; | |
100 | wire rd_p0; | |
101 | wire rd_p1; | |
102 | wire cam_perr_; | |
103 | wire dff_cam_line_en_b_scanin; | |
104 | wire dff_cam_line_en_b_scanout; | |
105 | ||
106 | ||
107 | input [39:3] sbd_st_addr_b; | |
108 | ||
109 | input [7:0] sbc_st_addr_new; | |
110 | input [7:0] sbc_thread_b; | |
111 | input sbc_spd_clken; | |
112 | input sbc_tidb_eq_tidw; | |
113 | input sbc_inv_addr_prty; | |
114 | input [7:0] sbc_cam_line_en_m; | |
115 | ||
116 | input [44:0] stb_cam_data; | |
117 | input stb_ram_cparity; | |
118 | ||
119 | input dcc_bmask_parity_b; | |
120 | ||
121 | output spd_st_line_match; | |
122 | output stb_cam_perr; | |
123 | output stb_cparity_calc; | |
124 | output [7:0] stb_cam_line_en_b; | |
125 | ||
126 | // Globals | |
127 | input l2clk; | |
128 | input scan_in; | |
129 | input tcu_pce_ov; // scan signals | |
130 | input tcu_scan_en; | |
131 | input tcu_se_scancollar_in; | |
132 | input spc_aclk; | |
133 | input spc_bclk; | |
134 | output scan_out; | |
135 | ||
136 | // scan renames | |
137 | assign stop = 1'b0; | |
138 | // end scan | |
139 | ||
140 | lsu_spd_dp_buff_macro__dbuff_32x__rep_1__stack_none__width_4 test_rep0 ( | |
141 | .din ({tcu_scan_en,tcu_pce_ov,spc_aclk,spc_bclk}), | |
142 | .dout({se,pce_ov,siclk,soclk}) | |
143 | ); | |
144 | ||
145 | ||
146 | //////////////////////////////////////////////////////////////////////////////// | |
147 | // Address staging and compare for store pipelining. | |
148 | // For a 64B line, addr[5:0] do not compare. IO stores are not pipelined, so | |
149 | // PA[39] does not need to factor into the compare. | |
150 | ||
151 | lsu_spd_dp_buff_macro__rep_1__stack_40c__width_37 st_addr_b_buf ( | |
152 | .din (sbd_st_addr_b[39:3]), | |
153 | .dout (st_addr_b[39:3]) | |
154 | ); | |
155 | ||
156 | lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 dff_st_addr_w ( | |
157 | .scan_in(dff_st_addr_w_scanin), | |
158 | .scan_out(dff_st_addr_w_scanout), | |
159 | .din (st_addr_b[38:6]), | |
160 | .dout (st_addr_w[38:6]), | |
161 | .clk (l2clk), | |
162 | .en (sbc_spd_clken), | |
163 | .se(se), | |
164 | .siclk(siclk), | |
165 | .soclk(soclk), | |
166 | .pce_ov(pce_ov), | |
167 | .stop(stop) | |
168 | ); | |
169 | ||
170 | lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 dff_last_line_0 ( | |
171 | .scan_in(dff_last_line_0_scanin), | |
172 | .scan_out(dff_last_line_0_scanout), | |
173 | .din (st_addr_w[38:6]), | |
174 | .dout (last_line_0[38:6]), | |
175 | .clk (l2clk), | |
176 | .en (sbc_st_addr_new[0]), | |
177 | .se(se), | |
178 | .siclk(siclk), | |
179 | .soclk(soclk), | |
180 | .pce_ov(pce_ov), | |
181 | .stop(stop) | |
182 | ); | |
183 | lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 dff_last_line_1 ( | |
184 | .scan_in(dff_last_line_1_scanin), | |
185 | .scan_out(dff_last_line_1_scanout), | |
186 | .din (st_addr_w[38:6]), | |
187 | .dout (last_line_1[38:6]), | |
188 | .clk (l2clk), | |
189 | .en (sbc_st_addr_new[1]), | |
190 | .se(se), | |
191 | .siclk(siclk), | |
192 | .soclk(soclk), | |
193 | .pce_ov(pce_ov), | |
194 | .stop(stop) | |
195 | ); | |
196 | lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 dff_last_line_2 ( | |
197 | .scan_in(dff_last_line_2_scanin), | |
198 | .scan_out(dff_last_line_2_scanout), | |
199 | .din (st_addr_w[38:6]), | |
200 | .dout (last_line_2[38:6]), | |
201 | .clk (l2clk), | |
202 | .en (sbc_st_addr_new[2]), | |
203 | .se(se), | |
204 | .siclk(siclk), | |
205 | .soclk(soclk), | |
206 | .pce_ov(pce_ov), | |
207 | .stop(stop) | |
208 | ); | |
209 | lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 dff_last_line_3 ( | |
210 | .scan_in(dff_last_line_3_scanin), | |
211 | .scan_out(dff_last_line_3_scanout), | |
212 | .din (st_addr_w[38:6]), | |
213 | .dout (last_line_3[38:6]), | |
214 | .clk (l2clk), | |
215 | .en (sbc_st_addr_new[3]), | |
216 | .se(se), | |
217 | .siclk(siclk), | |
218 | .soclk(soclk), | |
219 | .pce_ov(pce_ov), | |
220 | .stop(stop) | |
221 | ); | |
222 | lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 dff_last_line_4 ( | |
223 | .scan_in(dff_last_line_4_scanin), | |
224 | .scan_out(dff_last_line_4_scanout), | |
225 | .din (st_addr_w[38:6]), | |
226 | .dout (last_line_4[38:6]), | |
227 | .clk (l2clk), | |
228 | .en (sbc_st_addr_new[4]), | |
229 | .se(se), | |
230 | .siclk(siclk), | |
231 | .soclk(soclk), | |
232 | .pce_ov(pce_ov), | |
233 | .stop(stop) | |
234 | ); | |
235 | lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 dff_last_line_5 ( | |
236 | .scan_in(dff_last_line_5_scanin), | |
237 | .scan_out(dff_last_line_5_scanout), | |
238 | .din (st_addr_w[38:6]), | |
239 | .dout (last_line_5[38:6]), | |
240 | .clk (l2clk), | |
241 | .en (sbc_st_addr_new[5]), | |
242 | .se(se), | |
243 | .siclk(siclk), | |
244 | .soclk(soclk), | |
245 | .pce_ov(pce_ov), | |
246 | .stop(stop) | |
247 | ); | |
248 | lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 dff_last_line_6 ( | |
249 | .scan_in(dff_last_line_6_scanin), | |
250 | .scan_out(dff_last_line_6_scanout), | |
251 | .din (st_addr_w[38:6]), | |
252 | .dout (last_line_6[38:6]), | |
253 | .clk (l2clk), | |
254 | .en (sbc_st_addr_new[6]), | |
255 | .se(se), | |
256 | .siclk(siclk), | |
257 | .soclk(soclk), | |
258 | .pce_ov(pce_ov), | |
259 | .stop(stop) | |
260 | ); | |
261 | lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 dff_last_line_7 ( | |
262 | .scan_in(dff_last_line_7_scanin), | |
263 | .scan_out(dff_last_line_7_scanout), | |
264 | .din (st_addr_w[38:6]), | |
265 | .dout (last_line_7[38:6]), | |
266 | .clk (l2clk), | |
267 | .en (sbc_st_addr_new[7]), | |
268 | .se(se), | |
269 | .siclk(siclk), | |
270 | .soclk(soclk), | |
271 | .pce_ov(pce_ov), | |
272 | .stop(stop) | |
273 | ); | |
274 | ||
275 | // mux out the last line of the store in B | |
276 | lsu_spd_dp_mux_macro__left_3__mux_aonpe__ports_8__stack_40c__width_33 mux_last_line ( | |
277 | .din0 (last_line_0[38:6]), | |
278 | .din1 (last_line_1[38:6]), | |
279 | .din2 (last_line_2[38:6]), | |
280 | .din3 (last_line_3[38:6]), | |
281 | .din4 (last_line_4[38:6]), | |
282 | .din5 (last_line_5[38:6]), | |
283 | .din6 (last_line_6[38:6]), | |
284 | .din7 (last_line_7[38:6]), | |
285 | .sel0 (sbc_thread_b[0]), | |
286 | .sel1 (sbc_thread_b[1]), | |
287 | .sel2 (sbc_thread_b[2]), | |
288 | .sel3 (sbc_thread_b[3]), | |
289 | .sel4 (sbc_thread_b[4]), | |
290 | .sel5 (sbc_thread_b[5]), | |
291 | .sel6 (sbc_thread_b[6]), | |
292 | .sel7 (sbc_thread_b[7]), | |
293 | .dout (last_line[38:6]) | |
294 | ); | |
295 | ||
296 | lsu_spd_dp_mux_macro__left_3__mux_aope__ports_2__stack_40c__width_33 mux_cmp_addr ( | |
297 | .din0 (st_addr_w[38:6]), | |
298 | .din1 (last_line[38:6]), | |
299 | .sel0 (sbc_tidb_eq_tidw), | |
300 | .dout (cmp_addr[38:6]) | |
301 | ); | |
302 | ||
303 | lsu_spd_dp_cmp_macro__width_16 st_addr_cmp0 ( | |
304 | .din0 (st_addr_b[38:23]), | |
305 | .din1 (cmp_addr[38:23]), | |
306 | .dout (line_match_38_23) | |
307 | ); | |
308 | lsu_spd_dp_cmp_macro__width_16 st_addr_cmp1 ( | |
309 | .din0 (st_addr_b[22:7]), | |
310 | .din1 (cmp_addr[22:7]), | |
311 | .dout (line_match_22_7) | |
312 | ); | |
313 | lsu_spd_dp_xnor_macro__width_1 st_addr_cmp2 ( | |
314 | .din0 (st_addr_b[6]), | |
315 | .din1 (cmp_addr[6]), | |
316 | .dout (line_match_6) | |
317 | ); | |
318 | lsu_spd_dp_inv_macro__width_1 pa_b39_inv ( | |
319 | .din (st_addr_b[39]), | |
320 | .dout (pa_b39_b_) | |
321 | ); | |
322 | ||
323 | lsu_spd_dp_and_macro__ports_4__width_1 st_addr_cmp ( | |
324 | .din0 (line_match_38_23), | |
325 | .din1 (line_match_22_7), | |
326 | .din2 (line_match_6), | |
327 | .din3 (pa_b39_b_), // IO stores cannot pipeline | |
328 | .dout (spd_st_line_match) | |
329 | ); | |
330 | ||
331 | //////////////////////////////////////////////////////////////////////////////// | |
332 | // Parity generation for stb_cam. Timing does not allow for parity | |
333 | // to be written into the CAM. The parity is generated in the next cycle and | |
334 | // written to the RAM. | |
335 | ||
336 | // in this physical order : dcc_bmask_parity_b,st_addr_b[39:3] | |
337 | ||
338 | lsu_spd_dp_prty_macro__width_8 cam_wr_p0 ( | |
339 | .din ({dcc_bmask_parity_b,sbc_inv_addr_prty,1'b0,st_addr_b[39:35]}), | |
340 | .dout (addr_parity_hi) | |
341 | ); | |
342 | lsu_spd_dp_prty_macro__width_32 cam_wr_p1 ( | |
343 | .din (st_addr_b[34:3]), | |
344 | .dout (addr_parity_lo) | |
345 | ); | |
346 | lsu_spd_dp_xnor_macro__ports_2__width_1 camwr_parity_bar ( | |
347 | .din0 (addr_parity_hi), | |
348 | .din1 (addr_parity_lo), | |
349 | .dout (stb_cparity_calc_) | |
350 | ); | |
351 | lsu_spd_dp_inv_macro__width_1 camwr_parity ( | |
352 | .din (stb_cparity_calc_), | |
353 | .dout (stb_cparity_calc) | |
354 | ); | |
355 | ||
356 | /////////////////////////////////////////// | |
357 | // Parity error detection for stb_cam | |
358 | // bits in this phyiscal order: stb_cam_data[7:0],2'b00,stb_cam_data[44:8],stb_ram_cparity | |
359 | ||
360 | lsu_spd_dp_prty_macro__width_32 cam_rd_p0 ( | |
361 | .din ({stb_cam_data[7:0],stb_cam_data[44:23],2'b00}), | |
362 | .dout (rd_p0) | |
363 | ); | |
364 | lsu_spd_dp_prty_macro__width_16 cam_rd_p1 ( | |
365 | .din ({stb_cam_data[22:8],stb_ram_cparity}), | |
366 | .dout (rd_p1) | |
367 | ); | |
368 | lsu_spd_dp_xnor_macro__ports_2__width_1 cam_rd_perr ( | |
369 | .din0 (rd_p0), | |
370 | .din1 (rd_p1), | |
371 | .dout (cam_perr_) | |
372 | ); | |
373 | lsu_spd_dp_inv_macro__width_1 buf_cam_perr ( | |
374 | .din (cam_perr_), | |
375 | .dout (stb_cam_perr) | |
376 | ); | |
377 | ||
378 | /////////////////////////////////////////// | |
379 | // flops for stb_cam_line_en_b | |
380 | lsu_spd_dp_msff_macro__stack_8l__width_8 dff_cam_line_en_b ( | |
381 | .scan_in(dff_cam_line_en_b_scanin), | |
382 | .scan_out(dff_cam_line_en_b_scanout), | |
383 | .din (sbc_cam_line_en_m[7:0]), | |
384 | .dout (stb_cam_line_en_b[7:0]), | |
385 | .clk (l2clk), | |
386 | .en (1'b1), | |
387 | .se (tcu_se_scancollar_in), | |
388 | .siclk(siclk), | |
389 | .soclk(soclk), | |
390 | .pce_ov(pce_ov), | |
391 | .stop(stop) | |
392 | ); | |
393 | ||
394 | ||
395 | ||
396 | // fixscan start: | |
397 | assign dff_st_addr_w_scanin = scan_in ; | |
398 | assign dff_last_line_0_scanin = dff_st_addr_w_scanout ; | |
399 | assign dff_last_line_1_scanin = dff_last_line_0_scanout ; | |
400 | assign dff_last_line_2_scanin = dff_last_line_1_scanout ; | |
401 | assign dff_last_line_3_scanin = dff_last_line_2_scanout ; | |
402 | assign dff_last_line_4_scanin = dff_last_line_3_scanout ; | |
403 | assign dff_last_line_5_scanin = dff_last_line_4_scanout ; | |
404 | assign dff_last_line_6_scanin = dff_last_line_5_scanout ; | |
405 | assign dff_last_line_7_scanin = dff_last_line_6_scanout ; | |
406 | assign dff_cam_line_en_b_scanin = dff_last_line_7_scanout ; | |
407 | assign scan_out = dff_cam_line_en_b_scanout; | |
408 | // fixscan end: | |
409 | endmodule | |
410 | ||
411 | ||
412 | // | |
413 | // buff macro | |
414 | // | |
415 | // | |
416 | ||
417 | ||
418 | ||
419 | ||
420 | ||
421 | module lsu_spd_dp_buff_macro__dbuff_32x__rep_1__stack_none__width_4 ( | |
422 | din, | |
423 | dout); | |
424 | input [3:0] din; | |
425 | output [3:0] dout; | |
426 | ||
427 | ||
428 | ||
429 | ||
430 | ||
431 | ||
432 | buff #(4) d0_0 ( | |
433 | .in(din[3:0]), | |
434 | .out(dout[3:0]) | |
435 | ); | |
436 | ||
437 | ||
438 | ||
439 | ||
440 | ||
441 | ||
442 | ||
443 | ||
444 | endmodule | |
445 | ||
446 | ||
447 | ||
448 | ||
449 | ||
450 | // | |
451 | // buff macro | |
452 | // | |
453 | // | |
454 | ||
455 | ||
456 | ||
457 | ||
458 | ||
459 | module lsu_spd_dp_buff_macro__rep_1__stack_40c__width_37 ( | |
460 | din, | |
461 | dout); | |
462 | input [36:0] din; | |
463 | output [36:0] dout; | |
464 | ||
465 | ||
466 | ||
467 | ||
468 | ||
469 | ||
470 | buff #(37) d0_0 ( | |
471 | .in(din[36:0]), | |
472 | .out(dout[36:0]) | |
473 | ); | |
474 | ||
475 | ||
476 | ||
477 | ||
478 | ||
479 | ||
480 | ||
481 | ||
482 | endmodule | |
483 | ||
484 | ||
485 | ||
486 | ||
487 | ||
488 | ||
489 | ||
490 | ||
491 | ||
492 | // any PARAMS parms go into naming of macro | |
493 | ||
494 | module lsu_spd_dp_msff_macro__left_3__stack_40c__width_33 ( | |
495 | din, | |
496 | clk, | |
497 | en, | |
498 | se, | |
499 | scan_in, | |
500 | siclk, | |
501 | soclk, | |
502 | pce_ov, | |
503 | stop, | |
504 | dout, | |
505 | scan_out); | |
506 | wire l1clk; | |
507 | wire siclk_out; | |
508 | wire soclk_out; | |
509 | wire [31:0] so; | |
510 | ||
511 | input [32:0] din; | |
512 | ||
513 | ||
514 | input clk; | |
515 | input en; | |
516 | input se; | |
517 | input scan_in; | |
518 | input siclk; | |
519 | input soclk; | |
520 | input pce_ov; | |
521 | input stop; | |
522 | ||
523 | ||
524 | ||
525 | output [32:0] dout; | |
526 | ||
527 | ||
528 | output scan_out; | |
529 | ||
530 | ||
531 | ||
532 | ||
533 | cl_dp1_l1hdr_8x c0_0 ( | |
534 | .l2clk(clk), | |
535 | .pce(en), | |
536 | .aclk(siclk), | |
537 | .bclk(soclk), | |
538 | .l1clk(l1clk), | |
539 | .se(se), | |
540 | .pce_ov(pce_ov), | |
541 | .stop(stop), | |
542 | .siclk_out(siclk_out), | |
543 | .soclk_out(soclk_out) | |
544 | ); | |
545 | dff #(33) d0_0 ( | |
546 | .l1clk(l1clk), | |
547 | .siclk(siclk_out), | |
548 | .soclk(soclk_out), | |
549 | .d(din[32:0]), | |
550 | .si({scan_in,so[31:0]}), | |
551 | .so({so[31:0],scan_out}), | |
552 | .q(dout[32:0]) | |
553 | ); | |
554 | ||
555 | ||
556 | ||
557 | ||
558 | ||
559 | ||
560 | ||
561 | ||
562 | ||
563 | ||
564 | ||
565 | ||
566 | ||
567 | ||
568 | ||
569 | ||
570 | ||
571 | ||
572 | ||
573 | ||
574 | endmodule | |
575 | ||
576 | ||
577 | ||
578 | ||
579 | ||
580 | ||
581 | ||
582 | ||
583 | ||
584 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
585 | // also for pass-gate with decoder | |
586 | ||
587 | ||
588 | ||
589 | ||
590 | ||
591 | // any PARAMS parms go into naming of macro | |
592 | ||
593 | module lsu_spd_dp_mux_macro__left_3__mux_aonpe__ports_8__stack_40c__width_33 ( | |
594 | din0, | |
595 | sel0, | |
596 | din1, | |
597 | sel1, | |
598 | din2, | |
599 | sel2, | |
600 | din3, | |
601 | sel3, | |
602 | din4, | |
603 | sel4, | |
604 | din5, | |
605 | sel5, | |
606 | din6, | |
607 | sel6, | |
608 | din7, | |
609 | sel7, | |
610 | dout); | |
611 | wire buffout0; | |
612 | wire buffout1; | |
613 | wire buffout2; | |
614 | wire buffout3; | |
615 | wire buffout4; | |
616 | wire buffout5; | |
617 | wire buffout6; | |
618 | wire buffout7; | |
619 | ||
620 | input [32:0] din0; | |
621 | input sel0; | |
622 | input [32:0] din1; | |
623 | input sel1; | |
624 | input [32:0] din2; | |
625 | input sel2; | |
626 | input [32:0] din3; | |
627 | input sel3; | |
628 | input [32:0] din4; | |
629 | input sel4; | |
630 | input [32:0] din5; | |
631 | input sel5; | |
632 | input [32:0] din6; | |
633 | input sel6; | |
634 | input [32:0] din7; | |
635 | input sel7; | |
636 | output [32:0] dout; | |
637 | ||
638 | ||
639 | ||
640 | ||
641 | ||
642 | cl_dp1_muxbuff8_8x c0_0 ( | |
643 | .in0(sel0), | |
644 | .in1(sel1), | |
645 | .in2(sel2), | |
646 | .in3(sel3), | |
647 | .in4(sel4), | |
648 | .in5(sel5), | |
649 | .in6(sel6), | |
650 | .in7(sel7), | |
651 | .out0(buffout0), | |
652 | .out1(buffout1), | |
653 | .out2(buffout2), | |
654 | .out3(buffout3), | |
655 | .out4(buffout4), | |
656 | .out5(buffout5), | |
657 | .out6(buffout6), | |
658 | .out7(buffout7) | |
659 | ); | |
660 | mux8s #(33) d0_0 ( | |
661 | .sel0(buffout0), | |
662 | .sel1(buffout1), | |
663 | .sel2(buffout2), | |
664 | .sel3(buffout3), | |
665 | .sel4(buffout4), | |
666 | .sel5(buffout5), | |
667 | .sel6(buffout6), | |
668 | .sel7(buffout7), | |
669 | .in0(din0[32:0]), | |
670 | .in1(din1[32:0]), | |
671 | .in2(din2[32:0]), | |
672 | .in3(din3[32:0]), | |
673 | .in4(din4[32:0]), | |
674 | .in5(din5[32:0]), | |
675 | .in6(din6[32:0]), | |
676 | .in7(din7[32:0]), | |
677 | .dout(dout[32:0]) | |
678 | ); | |
679 | ||
680 | ||
681 | ||
682 | ||
683 | ||
684 | ||
685 | ||
686 | ||
687 | ||
688 | ||
689 | ||
690 | ||
691 | ||
692 | endmodule | |
693 | ||
694 | ||
695 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
696 | // also for pass-gate with decoder | |
697 | ||
698 | ||
699 | ||
700 | ||
701 | ||
702 | // any PARAMS parms go into naming of macro | |
703 | ||
704 | module lsu_spd_dp_mux_macro__left_3__mux_aope__ports_2__stack_40c__width_33 ( | |
705 | din0, | |
706 | din1, | |
707 | sel0, | |
708 | dout); | |
709 | wire psel0; | |
710 | wire psel1; | |
711 | ||
712 | input [32:0] din0; | |
713 | input [32:0] din1; | |
714 | input sel0; | |
715 | output [32:0] dout; | |
716 | ||
717 | ||
718 | ||
719 | ||
720 | ||
721 | cl_dp1_penc2_8x c0_0 ( | |
722 | .sel0(sel0), | |
723 | .psel0(psel0), | |
724 | .psel1(psel1) | |
725 | ); | |
726 | ||
727 | mux2s #(33) d0_0 ( | |
728 | .sel0(psel0), | |
729 | .sel1(psel1), | |
730 | .in0(din0[32:0]), | |
731 | .in1(din1[32:0]), | |
732 | .dout(dout[32:0]) | |
733 | ); | |
734 | ||
735 | ||
736 | ||
737 | ||
738 | ||
739 | ||
740 | ||
741 | ||
742 | ||
743 | ||
744 | ||
745 | ||
746 | ||
747 | endmodule | |
748 | ||
749 | ||
750 | // | |
751 | // comparator macro (output is 1 if both inputs are equal; 0 otherwise) | |
752 | // | |
753 | // | |
754 | ||
755 | ||
756 | ||
757 | ||
758 | ||
759 | module lsu_spd_dp_cmp_macro__width_16 ( | |
760 | din0, | |
761 | din1, | |
762 | dout); | |
763 | input [15:0] din0; | |
764 | input [15:0] din1; | |
765 | output dout; | |
766 | ||
767 | ||
768 | ||
769 | ||
770 | ||
771 | ||
772 | cmp #(16) m0_0 ( | |
773 | .in0(din0[15:0]), | |
774 | .in1(din1[15:0]), | |
775 | .out(dout) | |
776 | ); | |
777 | ||
778 | ||
779 | ||
780 | ||
781 | ||
782 | ||
783 | ||
784 | ||
785 | ||
786 | ||
787 | endmodule | |
788 | ||
789 | ||
790 | ||
791 | ||
792 | ||
793 | // | |
794 | // xnor macro for ports = 2,3 | |
795 | // | |
796 | // | |
797 | ||
798 | ||
799 | ||
800 | ||
801 | ||
802 | module lsu_spd_dp_xnor_macro__width_1 ( | |
803 | din0, | |
804 | din1, | |
805 | dout); | |
806 | input [0:0] din0; | |
807 | input [0:0] din1; | |
808 | output [0:0] dout; | |
809 | ||
810 | ||
811 | ||
812 | ||
813 | ||
814 | ||
815 | xnor2 #(1) d0_0 ( | |
816 | .in0(din0[0:0]), | |
817 | .in1(din1[0:0]), | |
818 | .out(dout[0:0]) | |
819 | ); | |
820 | ||
821 | ||
822 | ||
823 | ||
824 | ||
825 | ||
826 | ||
827 | endmodule | |
828 | ||
829 | ||
830 | ||
831 | ||
832 | ||
833 | // | |
834 | // invert macro | |
835 | // | |
836 | // | |
837 | ||
838 | ||
839 | ||
840 | ||
841 | ||
842 | module lsu_spd_dp_inv_macro__width_1 ( | |
843 | din, | |
844 | dout); | |
845 | input [0:0] din; | |
846 | output [0:0] dout; | |
847 | ||
848 | ||
849 | ||
850 | ||
851 | ||
852 | ||
853 | inv #(1) d0_0 ( | |
854 | .in(din[0:0]), | |
855 | .out(dout[0:0]) | |
856 | ); | |
857 | ||
858 | ||
859 | ||
860 | ||
861 | ||
862 | ||
863 | ||
864 | ||
865 | ||
866 | endmodule | |
867 | ||
868 | ||
869 | ||
870 | ||
871 | ||
872 | // | |
873 | // and macro for ports = 2,3,4 | |
874 | // | |
875 | // | |
876 | ||
877 | ||
878 | ||
879 | ||
880 | ||
881 | module lsu_spd_dp_and_macro__ports_4__width_1 ( | |
882 | din0, | |
883 | din1, | |
884 | din2, | |
885 | din3, | |
886 | dout); | |
887 | input [0:0] din0; | |
888 | input [0:0] din1; | |
889 | input [0:0] din2; | |
890 | input [0:0] din3; | |
891 | output [0:0] dout; | |
892 | ||
893 | ||
894 | ||
895 | ||
896 | ||
897 | ||
898 | and4 #(1) d0_0 ( | |
899 | .in0(din0[0:0]), | |
900 | .in1(din1[0:0]), | |
901 | .in2(din2[0:0]), | |
902 | .in3(din3[0:0]), | |
903 | .out(dout[0:0]) | |
904 | ); | |
905 | ||
906 | ||
907 | ||
908 | ||
909 | ||
910 | ||
911 | ||
912 | ||
913 | ||
914 | endmodule | |
915 | ||
916 | ||
917 | ||
918 | ||
919 | ||
920 | // | |
921 | // parity macro (even parity) | |
922 | // | |
923 | // | |
924 | ||
925 | ||
926 | ||
927 | ||
928 | ||
929 | module lsu_spd_dp_prty_macro__width_8 ( | |
930 | din, | |
931 | dout); | |
932 | input [7:0] din; | |
933 | output dout; | |
934 | ||
935 | ||
936 | ||
937 | ||
938 | ||
939 | ||
940 | ||
941 | prty #(8) m0_0 ( | |
942 | .in(din[7:0]), | |
943 | .out(dout) | |
944 | ); | |
945 | ||
946 | ||
947 | ||
948 | ||
949 | ||
950 | ||
951 | ||
952 | ||
953 | ||
954 | ||
955 | endmodule | |
956 | ||
957 | ||
958 | ||
959 | ||
960 | ||
961 | // | |
962 | // parity macro (even parity) | |
963 | // | |
964 | // | |
965 | ||
966 | ||
967 | ||
968 | ||
969 | ||
970 | module lsu_spd_dp_prty_macro__width_32 ( | |
971 | din, | |
972 | dout); | |
973 | input [31:0] din; | |
974 | output dout; | |
975 | ||
976 | ||
977 | ||
978 | ||
979 | ||
980 | ||
981 | ||
982 | prty #(32) m0_0 ( | |
983 | .in(din[31:0]), | |
984 | .out(dout) | |
985 | ); | |
986 | ||
987 | ||
988 | ||
989 | ||
990 | ||
991 | ||
992 | ||
993 | ||
994 | ||
995 | ||
996 | endmodule | |
997 | ||
998 | ||
999 | ||
1000 | ||
1001 | ||
1002 | // | |
1003 | // xnor macro for ports = 2,3 | |
1004 | // | |
1005 | // | |
1006 | ||
1007 | ||
1008 | ||
1009 | ||
1010 | ||
1011 | module lsu_spd_dp_xnor_macro__ports_2__width_1 ( | |
1012 | din0, | |
1013 | din1, | |
1014 | dout); | |
1015 | input [0:0] din0; | |
1016 | input [0:0] din1; | |
1017 | output [0:0] dout; | |
1018 | ||
1019 | ||
1020 | ||
1021 | ||
1022 | ||
1023 | ||
1024 | xnor2 #(1) d0_0 ( | |
1025 | .in0(din0[0:0]), | |
1026 | .in1(din1[0:0]), | |
1027 | .out(dout[0:0]) | |
1028 | ); | |
1029 | ||
1030 | ||
1031 | ||
1032 | ||
1033 | ||
1034 | ||
1035 | ||
1036 | endmodule | |
1037 | ||
1038 | ||
1039 | ||
1040 | ||
1041 | ||
1042 | // | |
1043 | // parity macro (even parity) | |
1044 | // | |
1045 | // | |
1046 | ||
1047 | ||
1048 | ||
1049 | ||
1050 | ||
1051 | module lsu_spd_dp_prty_macro__width_16 ( | |
1052 | din, | |
1053 | dout); | |
1054 | input [15:0] din; | |
1055 | output dout; | |
1056 | ||
1057 | ||
1058 | ||
1059 | ||
1060 | ||
1061 | ||
1062 | ||
1063 | prty #(16) m0_0 ( | |
1064 | .in(din[15:0]), | |
1065 | .out(dout) | |
1066 | ); | |
1067 | ||
1068 | ||
1069 | ||
1070 | ||
1071 | ||
1072 | ||
1073 | ||
1074 | ||
1075 | ||
1076 | ||
1077 | endmodule | |
1078 | ||
1079 | ||
1080 | ||
1081 | ||
1082 | ||
1083 | ||
1084 | ||
1085 | ||
1086 | ||
1087 | // any PARAMS parms go into naming of macro | |
1088 | ||
1089 | module lsu_spd_dp_msff_macro__stack_8l__width_8 ( | |
1090 | din, | |
1091 | clk, | |
1092 | en, | |
1093 | se, | |
1094 | scan_in, | |
1095 | siclk, | |
1096 | soclk, | |
1097 | pce_ov, | |
1098 | stop, | |
1099 | dout, | |
1100 | scan_out); | |
1101 | wire l1clk; | |
1102 | wire siclk_out; | |
1103 | wire soclk_out; | |
1104 | wire [6:0] so; | |
1105 | ||
1106 | input [7:0] din; | |
1107 | ||
1108 | ||
1109 | input clk; | |
1110 | input en; | |
1111 | input se; | |
1112 | input scan_in; | |
1113 | input siclk; | |
1114 | input soclk; | |
1115 | input pce_ov; | |
1116 | input stop; | |
1117 | ||
1118 | ||
1119 | ||
1120 | output [7:0] dout; | |
1121 | ||
1122 | ||
1123 | output scan_out; | |
1124 | ||
1125 | ||
1126 | ||
1127 | ||
1128 | cl_dp1_l1hdr_8x c0_0 ( | |
1129 | .l2clk(clk), | |
1130 | .pce(en), | |
1131 | .aclk(siclk), | |
1132 | .bclk(soclk), | |
1133 | .l1clk(l1clk), | |
1134 | .se(se), | |
1135 | .pce_ov(pce_ov), | |
1136 | .stop(stop), | |
1137 | .siclk_out(siclk_out), | |
1138 | .soclk_out(soclk_out) | |
1139 | ); | |
1140 | dff #(8) d0_0 ( | |
1141 | .l1clk(l1clk), | |
1142 | .siclk(siclk_out), | |
1143 | .soclk(soclk_out), | |
1144 | .d(din[7:0]), | |
1145 | .si({scan_in,so[6:0]}), | |
1146 | .so({so[6:0],scan_out}), | |
1147 | .q(dout[7:0]) | |
1148 | ); | |
1149 | ||
1150 | ||
1151 | ||
1152 | ||
1153 | ||
1154 | ||
1155 | ||
1156 | ||
1157 | ||
1158 | ||
1159 | ||
1160 | ||
1161 | ||
1162 | ||
1163 | ||
1164 | ||
1165 | ||
1166 | ||
1167 | ||
1168 | ||
1169 | endmodule | |
1170 | ||
1171 | ||
1172 | ||
1173 | ||
1174 | ||
1175 | ||
1176 | ||
1177 |