Commit | Line | Data |
---|---|---|
86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: mmu.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module mmu ( | |
36 | l2clk, | |
37 | scan_in, | |
38 | tcu_pce_ov, | |
39 | spc_aclk, | |
40 | spc_bclk, | |
41 | tcu_scan_en, | |
42 | tcu_dectest, | |
43 | tcu_muxtest, | |
44 | tcu_array_wr_inhibit, | |
45 | tcu_se_scancollar_in, | |
46 | lb_scan_en_wmr, | |
47 | spc_aclk_wmr, | |
48 | wmr_scan_in, | |
49 | lsu_mmu_pmen, | |
50 | lsu_asi_clken, | |
51 | tlu_tag_access_tid_0_b, | |
52 | tlu_i_tag_access_0_b, | |
53 | tlu_d_tag_access_0_b, | |
54 | tlu_tag_access_tid_1_b, | |
55 | tlu_i_tag_access_1_b, | |
56 | tlu_d_tag_access_1_b, | |
57 | spc_core_running_status, | |
58 | mbi_mra0_write_en, | |
59 | mbi_mra1_write_en, | |
60 | mbi_scp0_write_en, | |
61 | mbi_scp1_write_en, | |
62 | mbi_addr, | |
63 | mbi_run, | |
64 | mbi_wdata, | |
65 | mbi_mra0_read_en, | |
66 | mbi_mra1_read_en, | |
67 | mbi_scp0_read_en, | |
68 | mbi_scp1_read_en, | |
69 | mbi_mmu_cmpsel, | |
70 | lsu_rngf_cdbus, | |
71 | lsu_va_b, | |
72 | lsu_context_b, | |
73 | lsu_tlu_dsfsr_ct_b, | |
74 | lsu_asi_error_inject, | |
75 | tlu_load_i_tag_access_p, | |
76 | tlu_load_i_tag_access_n, | |
77 | tlu_load_d_tag_access, | |
78 | tlu_load_d_tag_access_r, | |
79 | tlu_release_tte, | |
80 | tlu_pc_0_w, | |
81 | tlu_pc_1_w, | |
82 | tlu_iht_request, | |
83 | tlu_dht_request, | |
84 | tlu_mmu_tl_gt_0, | |
85 | tlu_ceter_pscce, | |
86 | tlu_cerer_mrau, | |
87 | tlu_cerer_scac, | |
88 | tlu_cerer_scau, | |
89 | tlu_cerer_hwtwmu, | |
90 | tlu_cerer_hwtwl2, | |
91 | l15_mmu_grant, | |
92 | l15_spc_data1, | |
93 | l15_mmu_cpkt, | |
94 | l15_mmu_valid, | |
95 | scan_out, | |
96 | wmr_scan_out, | |
97 | mmu_mbi_mra0_fail, | |
98 | mmu_mbi_mra1_fail, | |
99 | mmu_mbi_scp0_fail, | |
100 | mmu_mbi_scp1_fail, | |
101 | mmu_l15_cpkt, | |
102 | mmu_l15_addr, | |
103 | mmu_l15_valid, | |
104 | mmu_write_itlb, | |
105 | mmu_itte_tag_data, | |
106 | mmu_asi_data, | |
107 | mmu_asi_read, | |
108 | mmu_dae_req, | |
109 | mmu_dae_tid, | |
110 | mmu_dtlb_reload_stall, | |
111 | mmu_dtlb_reload, | |
112 | mmu_hw_tw_enable, | |
113 | mmu_reload_done, | |
114 | mmu_i_unauth_access, | |
115 | mmu_i_tsb_miss, | |
116 | mmu_d_tsb_miss, | |
117 | mmu_i_tte_outofrange, | |
118 | mmu_d_tte_outofrange, | |
119 | mmu_index, | |
120 | mmu_asi_cecc, | |
121 | mmu_asi_uecc, | |
122 | mmu_asi_tid, | |
123 | mmu_asi_index, | |
124 | mmu_asi_mra_not_sca, | |
125 | mmu_i_l2cerr, | |
126 | mmu_d_l2cerr, | |
127 | mmu_i_eccerr, | |
128 | mmu_d_eccerr, | |
129 | mmu_thr0_err_type, | |
130 | mmu_thr1_err_type, | |
131 | mmu_thr2_err_type, | |
132 | mmu_thr3_err_type, | |
133 | mmu_thr4_err_type, | |
134 | mmu_thr5_err_type, | |
135 | mmu_thr6_err_type, | |
136 | mmu_thr7_err_type, | |
137 | mmu_thr0_err_index, | |
138 | mmu_thr1_err_index, | |
139 | mmu_thr2_err_index, | |
140 | mmu_thr3_err_index, | |
141 | mmu_thr4_err_index, | |
142 | mmu_thr5_err_index, | |
143 | mmu_thr6_err_index, | |
144 | mmu_thr7_err_index, | |
145 | mmu_pmu_l2ret, | |
146 | mmu_pmu_l2miss, | |
147 | mmu_pmu_dtlb, | |
148 | mmu_pmu_tid); | |
149 | wire rd_pce; | |
150 | wire wr_pce; | |
151 | wire bist_clk_mux_sel; | |
152 | wire tcu_scan_en_wmr; | |
153 | wire [30:8] error_inject_unused; | |
154 | wire asi_wmr_scanin; | |
155 | wire asi_wmr_scanout; | |
156 | wire asi_scanin; | |
157 | wire asi_scanout; | |
158 | wire [3:3] asi_rd_dtte_unused; | |
159 | wire [6:0] asi_rd_dtte; | |
160 | wire asd0_wmr_scanin; | |
161 | wire asd0_wmr_scanout; | |
162 | wire asd0_scanin; | |
163 | wire asd0_scanout; | |
164 | wire [47:13] asd_pc_0_w; | |
165 | wire [1:0] asi_mra_rd_en_last; | |
166 | wire [7:0] asi_rd_immu_tag_target; | |
167 | wire [7:0] asi_rd_immu_tag_access; | |
168 | wire [7:0] asi_rd_dmmu_tag_target; | |
169 | wire [7:0] asi_rd_dmmu_tag_access; | |
170 | wire [1:0] asi_rd_i_access_target; | |
171 | wire [1:0] asi_rd_d_access_target; | |
172 | wire [1:0] asi_rd_access_target; | |
173 | wire [7:0] asi_rd_itte_tag; | |
174 | wire [7:0] asi_rd_itte_data; | |
175 | wire [7:0] asi_wr_immu_tag_access; | |
176 | wire [7:0] asi_i_tag_access_en; | |
177 | wire [7:0] asi_wr_itlb_data_in; | |
178 | wire [7:0] asi_wr_itlb_data_access; | |
179 | wire [7:0] asi_wr_immu_demap; | |
180 | wire [7:0] asi_wr_immu_demap_p; | |
181 | wire [7:0] asi_wr_immu_demap_n; | |
182 | wire [7:0] asi_i_data_in_en; | |
183 | wire [7:0] asi_wr_dmmu_tag_access; | |
184 | wire [7:0] asi_d_tag_access_en; | |
185 | wire [7:0] asi_wr_dtlb_data_in; | |
186 | wire [7:0] asi_wr_dtlb_data_access; | |
187 | wire [7:0] asi_wr_dmmu_demap; | |
188 | wire [7:0] asi_wr_dmmu_demap_p; | |
189 | wire [7:0] asi_wr_dmmu_demap_s_n; | |
190 | wire [7:0] asi_d_data_in_en; | |
191 | wire [7:0] asi_wr_p_context_0; | |
192 | wire [1:0] asi_p_context_0_en; | |
193 | wire [4:0] asi_mra_rd_addr_0; | |
194 | wire [81:0] mra0_data; | |
195 | wire [7:0] htc_wr_itlb_data_in; | |
196 | wire [7:0] htc_wr_dtlb_data_in; | |
197 | wire [81:0] asd0_rd_data; | |
198 | wire [63:0] asd0_asi_rd_data; | |
199 | wire [47:0] asd0_dtte_tag; | |
200 | wire [54:0] asd0_dtte_data; | |
201 | wire [47:0] asd0_itte_tag_data_; | |
202 | wire [6:0] asd0_itte_index; | |
203 | wire [12:0] asd_i_p_ctx_0_0; | |
204 | wire [12:0] asd_i_p_ctx_0_1; | |
205 | wire [12:0] asd_i_p_ctx_0_2; | |
206 | wire [12:0] asd_i_p_ctx_0_3; | |
207 | wire [47:0] asd0_tag_access; | |
208 | wire asd0_zero_context; | |
209 | wire asd0_asi_zero_context; | |
210 | wire asd0_mra_rd_addr_bit_1; | |
211 | wire asd1_wmr_scanin; | |
212 | wire asd1_wmr_scanout; | |
213 | wire asd1_scanin; | |
214 | wire asd1_scanout; | |
215 | wire [47:13] asd_pc_1_w; | |
216 | wire [4:0] asi_mra_rd_addr_1; | |
217 | wire [81:0] mra1_data; | |
218 | wire [81:0] asd1_rd_data; | |
219 | wire [63:0] asd1_asi_rd_data; | |
220 | wire [47:0] asd1_dtte_tag; | |
221 | wire [54:0] asd1_dtte_data; | |
222 | wire [47:0] asd1_itte_tag_data_; | |
223 | wire [6:0] asd1_itte_index; | |
224 | wire [12:0] asd_i_p_ctx_0_4; | |
225 | wire [12:0] asd_i_p_ctx_0_5; | |
226 | wire [12:0] asd_i_p_ctx_0_6; | |
227 | wire [12:0] asd_i_p_ctx_0_7; | |
228 | wire [47:0] asd1_tag_access; | |
229 | wire asd1_zero_context; | |
230 | wire asd1_asi_zero_context; | |
231 | wire asd1_mra_rd_addr_bit_1; | |
232 | wire ase_scanin; | |
233 | wire ase_scanout; | |
234 | wire [81:0] ase_mra_wr_data; | |
235 | wire [1:0] meg_parity; | |
236 | wire meg1_parity_err_unused; | |
237 | wire meg0_parity_err_unused; | |
238 | wire asi_error_mrau; | |
239 | wire [3:2] asi_mbist_ecc; | |
240 | wire [1:0] mem_parity; | |
241 | wire mel0_scanin; | |
242 | wire mel0_scanout; | |
243 | wire [1:0] mra0_parity; | |
244 | wire med00_parity_err; | |
245 | wire med01_parity_err; | |
246 | wire [1:0] mel0_crit_parity; | |
247 | wire [1:0] mel0_parity; | |
248 | wire mel0_parity_err; | |
249 | wire mel0_htc_parity_err; | |
250 | wire med01_parity_out_unused; | |
251 | wire med00_parity_out_unused; | |
252 | wire mra0_scanin; | |
253 | wire mra0_scanout; | |
254 | wire [1:0] asi_mra_rd_en; | |
255 | wire [4:0] asi_mra_wr_addr; | |
256 | wire [1:0] asi_mra_wr_en; | |
257 | wire [81:0] ase_mra_wr_data_minbuf; | |
258 | wire mel1_scanin; | |
259 | wire mel1_scanout; | |
260 | wire [1:0] mra1_parity; | |
261 | wire med10_parity_err; | |
262 | wire med11_parity_err; | |
263 | wire [1:0] mel1_crit_parity; | |
264 | wire [1:0] mel1_parity; | |
265 | wire mel1_parity_err; | |
266 | wire mel1_htc_parity_err; | |
267 | wire med11_parity_out_unused; | |
268 | wire med10_parity_out_unused; | |
269 | wire mra1_scanin; | |
270 | wire mra1_scanout; | |
271 | wire [63:0] asi_seg_wr_data; | |
272 | wire [7:0] seg_ecc; | |
273 | wire asi_error_scau; | |
274 | wire [7:0] sem_ecc; | |
275 | wire sel_scanin; | |
276 | wire sel_scanout; | |
277 | wire [63:0] asi_rd_data; | |
278 | wire [7:0] sel_crit_ecc; | |
279 | wire [7:0] sed_syndrome; | |
280 | wire sed_cecc_err; | |
281 | wire sed_uecc_err; | |
282 | wire scp0_scanin; | |
283 | wire scp0_scanout; | |
284 | wire [4:0] asi_scp_addr; | |
285 | wire [1:0] asi_scp_rd_en; | |
286 | wire [1:0] asi_scp_wr_en; | |
287 | wire [63:0] asi_wr_data; | |
288 | wire [7:0] scp0_ecc; | |
289 | wire [63:0] scp0_data; | |
290 | wire scp1_scanin; | |
291 | wire scp1_scanout; | |
292 | wire [7:0] scp1_ecc; | |
293 | wire [63:0] scp1_data; | |
294 | wire htc_wmr_scanin; | |
295 | wire htc_wmr_scanout; | |
296 | wire htc_scanin; | |
297 | wire htc_scanout; | |
298 | wire [7:0] mmu_reload_done_unused; | |
299 | wire htd_scanin; | |
300 | wire htd_scanout; | |
301 | wire tmc_scanin; | |
302 | wire tmc_scanout; | |
303 | wire trc_scanin; | |
304 | wire trc_scanout; | |
305 | wire [7:0] htc_itlb_clken; | |
306 | wire [7:0] htc_dtlb_clken; | |
307 | wire mbd_compare; | |
308 | wire sel_scac; | |
309 | wire sel_scau; | |
310 | wire [63:0] ase_mra_rd_data; | |
311 | wire [39:4] htd_tsbptr; | |
312 | wire [4:0] htc_mra_addr_in; | |
313 | wire [1:0] htc_mra_rd_en; | |
314 | wire [7:0] asi_error_mask; | |
315 | wire asi_rd_scp0; | |
316 | wire asi_rd_tsb_cfg_0_2; | |
317 | wire asi_rd_tsb_cfg_1_3; | |
318 | wire asi_rd_tsb_ptr_; | |
319 | wire asi_rd_real_range; | |
320 | wire asi_rd_physical_offset; | |
321 | wire asi_sel_mra_0_in; | |
322 | wire asi_mra_wr_en_next; | |
323 | wire [7:0] asi_wr_partition_id; | |
324 | wire asi_dmmu_demap_s; | |
325 | wire [2:0] asi_tag_access_sel; | |
326 | wire asi_tsb_ptr_req_valid; | |
327 | wire [2:0] asi_tsb_ptr_req; | |
328 | wire [1:0] asi_tsb_ptr_number; | |
329 | wire [1:0] asi_tsb_hwtw_enable_0; | |
330 | wire [1:0] asi_tsb_hwtw_enable_1; | |
331 | wire asi_data_in_real; | |
332 | wire [63:0] asi_mra_wr_data; | |
333 | wire asi_mra_req_grant; | |
334 | wire asi_demap_r_bit; | |
335 | wire [1:0] asi_hwtw_config_0; | |
336 | wire [1:0] asi_hwtw_config_1; | |
337 | wire [1:0] asi_hwtw_config_2; | |
338 | wire [1:0] asi_hwtw_config_3; | |
339 | wire [1:0] asi_hwtw_config_4; | |
340 | wire [1:0] asi_hwtw_config_5; | |
341 | wire [1:0] asi_hwtw_config_6; | |
342 | wire [1:0] asi_hwtw_config_7; | |
343 | wire asi_sel_en; | |
344 | wire [7:0] asi_mbist_wdata; | |
345 | wire [7:0] asi_ase_compare_data; | |
346 | wire [7:0] asi_compare_data; | |
347 | wire [31:0] asi_mbd_scp_data; | |
348 | wire asi_mbd_sel_scp; | |
349 | wire [7:0] asi_mbist_ecc_in; | |
350 | wire asi_mbist_run; | |
351 | wire asi_ecc_cmpsel_in; | |
352 | wire [1:0] asi_ase_cmpsel_in; | |
353 | wire [47:13] ase_lsu_va_w; | |
354 | wire [12:0] ase_lsu_context_w; | |
355 | wire [47:0] htd_tagaccess_din; | |
356 | wire [38:0] htd_tlbdatain_din; | |
357 | wire mmu_use_context_0; | |
358 | wire mmu_use_context_1; | |
359 | wire mmu_sec_context; | |
360 | wire [31:0] ase_mbd_mbist_data; | |
361 | wire htd_ra2pa_lower_hit_hw4; | |
362 | wire htd_ra2pa_upper_hit_hw4; | |
363 | wire htd_razero_hw4; | |
364 | wire htd_range_en_hw4; | |
365 | wire [7:0] htd_zeroctx_m0; | |
366 | wire htd_zeroctx_hw1; | |
367 | wire htd_usectx0_hw1; | |
368 | wire htd_usectx1_hw1; | |
369 | wire htd_ranotpa_hw1; | |
370 | wire htd_ptr_hit0_hw1; | |
371 | wire htd_ptr_hit1_hw1; | |
372 | wire htd_ptr_hit2_hw1; | |
373 | wire htd_ctx_hit_hw1; | |
374 | wire htd_tte_ep_hw1; | |
375 | wire htd_dmiss_hw1; | |
376 | wire [5:0] htd_pred0_idx_m0; | |
377 | wire [5:0] htd_pred1_idx_m0; | |
378 | wire [15:0] htd_pred0_m0; | |
379 | wire [15:0] htd_pred1_m0; | |
380 | wire [7:0] htd_dmiss; | |
381 | wire [7:0] htd_sec_ctx; | |
382 | wire [7:0] tsm_rqv; | |
383 | wire [7:0] tsm_tsb_miss_hw2; | |
384 | wire [7:0] trs_rqv; | |
385 | wire [7:0] trs_null_st; | |
386 | wire [7:0] trs_waitrr3_st; | |
387 | wire [7:0] trs_ecc_err; | |
388 | wire [7:0] trs_ep_err; | |
389 | wire [2:0] trs0_err_type; | |
390 | wire [2:0] trs1_err_type; | |
391 | wire [2:0] trs2_err_type; | |
392 | wire [2:0] trs3_err_type; | |
393 | wire [2:0] trs4_err_type; | |
394 | wire [2:0] trs5_err_type; | |
395 | wire [2:0] trs6_err_type; | |
396 | wire [2:0] trs7_err_type; | |
397 | wire [2:0] trs0_err_index; | |
398 | wire [2:0] trs1_err_index; | |
399 | wire [2:0] trs2_err_index; | |
400 | wire [2:0] trs3_err_index; | |
401 | wire [2:0] trs4_err_index; | |
402 | wire [2:0] trs5_err_index; | |
403 | wire [2:0] trs6_err_index; | |
404 | wire [2:0] trs7_err_index; | |
405 | wire [7:0] htc_core_running; | |
406 | wire htc_m1_clken; | |
407 | wire htc_hw3_clken; | |
408 | wire htc_hw4_clken; | |
409 | wire htc_zero_ctx_m2; | |
410 | wire [5:3] htc_upd_pred_idx_hw2; | |
411 | wire [7:0] htc_upd_grp; | |
412 | wire [7:0] htc_upd_grp_x; | |
413 | wire [1:0] htc_new_pred_bit; | |
414 | wire htc_wrpred0_hw2; | |
415 | wire htc_wrpred1_hw2; | |
416 | wire htc_wrpred2_hw2; | |
417 | wire htc_wrpred3_hw2; | |
418 | wire [7:0] htc_tlb_miss_m; | |
419 | wire htc_l15_en; | |
420 | wire htc_wr_q0new_nogrant; | |
421 | wire htc_wr_q0new_grant; | |
422 | wire htc_wr_q1new; | |
423 | wire htc_shift_q1_grant; | |
424 | wire htc_wr_m3new; | |
425 | wire htc_wr_m3q0; | |
426 | wire htc_mra_sel_0; | |
427 | wire htc_sel_mra_lo; | |
428 | wire [1:0] htc_conf_index_m2; | |
429 | wire [7:0] htc_vld_tsbptr_m2; | |
430 | wire [7:0] htc_rd_tteq; | |
431 | wire [7:0] htc_ra2pahit_hw5; | |
432 | wire [7:0] htc_ranotpax_hw5; | |
433 | wire [7:0] htc_cindex_bit0; | |
434 | wire [7:0] htc_cindex_bit1; | |
435 | wire [7:0] htc_rrindex_bit0; | |
436 | wire [7:0] htc_rrindex_bit1; | |
437 | wire [2:0] htc_pid0_m0; | |
438 | wire [2:0] htc_pid1_m0; | |
439 | wire [7:0] htc_tsbrd_valid_m0; | |
440 | wire [7:0] htc_thr_valid_hw3; | |
441 | wire [7:0] htc_thr_prevalid_hw3; | |
442 | wire [7:0] htc_va_rd_m2_in; | |
443 | wire htc_ranotpa_hw4; | |
444 | wire [7:0] htc_data_rcvd_hw1; | |
445 | wire [7:0] htc_tsb_hit_hw1; | |
446 | wire [7:0] htc_tsb_done_hw2; | |
447 | wire [7:0] htc_thr_valid_m1; | |
448 | wire [7:0] htc_thr_valid_m0; | |
449 | wire [7:0] htc_hwtw_burst; | |
450 | wire [1:0] rr_ecc_err_type; | |
451 | wire [1:0] cfg_ecc_err_type; | |
452 | wire [1:0] l2_ecc_err_type; | |
453 | wire [7:0] rr_ecc_err_hw5; | |
454 | wire [7:0] cfg_ecc_err_m3; | |
455 | wire [7:0] l2_ecc_err_hw1; | |
456 | wire [7:0] htc_ep_miss_hw1; | |
457 | wire [2:0] cfg_ecc_err_index; | |
458 | wire [2:0] rr_ecc_err_index; | |
459 | wire [7:0] trs_eperr_st; | |
460 | wire [7:0] trs_eccerr_st; | |
461 | wire [7:0] tsm_waitfortte; | |
462 | ||
463 | ||
464 | ||
465 | ||
466 | input l2clk; | |
467 | input scan_in; | |
468 | input tcu_pce_ov; | |
469 | input spc_aclk; | |
470 | input spc_bclk; | |
471 | input tcu_scan_en; | |
472 | input tcu_dectest; | |
473 | input tcu_muxtest; | |
474 | input tcu_array_wr_inhibit; | |
475 | input tcu_se_scancollar_in; | |
476 | ||
477 | input lb_scan_en_wmr; | |
478 | input spc_aclk_wmr; // Warm reset (non)scan | |
479 | input wmr_scan_in; | |
480 | ||
481 | // Power management | |
482 | input lsu_mmu_pmen; | |
483 | input lsu_asi_clken; | |
484 | input [1:0] tlu_tag_access_tid_0_b; // Tag access power management | |
485 | input tlu_i_tag_access_0_b; // Tag access power management | |
486 | input tlu_d_tag_access_0_b; // Tag access power management | |
487 | input [1:0] tlu_tag_access_tid_1_b; // Tag access power management | |
488 | input tlu_i_tag_access_1_b; // Tag access power management | |
489 | input tlu_d_tag_access_1_b; // Tag access power management | |
490 | input [7:0] spc_core_running_status; | |
491 | ||
492 | // MBIST | |
493 | input mbi_mra0_write_en; // MBIST write control | |
494 | input mbi_mra1_write_en; // MBIST write control | |
495 | input mbi_scp0_write_en; // MBIST write control | |
496 | input mbi_scp1_write_en; // MBIST write control | |
497 | input [4:0] mbi_addr; // 32 entry addressability for MBIST | |
498 | input mbi_run; // Select MBIST controls | |
499 | input [7:0] mbi_wdata; // MBIST write data | |
500 | input mbi_mra0_read_en; // MBIST read control | |
501 | input mbi_mra1_read_en; // MBIST read control | |
502 | input mbi_scp0_read_en; // MBIST read control | |
503 | input mbi_scp1_read_en; // MBIST read control | |
504 | input [1:0] mbi_mmu_cmpsel; // Mux (DEC) between 32 bit chunks | |
505 | ||
506 | input [64:0] lsu_rngf_cdbus; | |
507 | input [47:0] lsu_va_b; | |
508 | input [12:0] lsu_context_b; | |
509 | input [1:0] lsu_tlu_dsfsr_ct_b; // Indicates pri/sec context to HWTW | |
510 | ||
511 | input [31:0] lsu_asi_error_inject; // 31:Enb 23:SCAU 20:MRAU 7:0 ECCMASK | |
512 | ||
513 | input [7:0] tlu_load_i_tag_access_p; | |
514 | input [7:0] tlu_load_i_tag_access_n; | |
515 | input [7:0] tlu_load_d_tag_access; | |
516 | input [7:0] tlu_load_d_tag_access_r; | |
517 | input [7:0] tlu_release_tte; | |
518 | input [47:13] tlu_pc_0_w; | |
519 | input [47:13] tlu_pc_1_w; | |
520 | input [7:0] tlu_iht_request; // ITLB hardware tablewalk request | |
521 | input [7:0] tlu_dht_request; // DTLB hardware tablewalk request | |
522 | input [7:0] tlu_mmu_tl_gt_0; // Load '0' as ITLB context | |
523 | input [7:0] tlu_ceter_pscce; | |
524 | input tlu_cerer_mrau; | |
525 | input tlu_cerer_scac; | |
526 | input tlu_cerer_scau; | |
527 | input tlu_cerer_hwtwmu; | |
528 | input tlu_cerer_hwtwl2; | |
529 | ||
530 | input l15_mmu_grant; | |
531 | input [127:0] l15_spc_data1; // 16 bytes of return data from L2 | |
532 | input [17:0] l15_mmu_cpkt; // Control part of cpx packet | |
533 | input l15_mmu_valid; | |
534 | ||
535 | ||
536 | ||
537 | ||
538 | output scan_out; | |
539 | ||
540 | output wmr_scan_out; // Warm reset (non)scan | |
541 | ||
542 | // MBIST | |
543 | output mmu_mbi_mra0_fail; // MBIST fail | |
544 | output mmu_mbi_mra1_fail; // MBIST fail | |
545 | output mmu_mbi_scp0_fail; // MBIST fail | |
546 | output mmu_mbi_scp1_fail; // MBIST fail | |
547 | ||
548 | output [4:0] mmu_l15_cpkt; | |
549 | output [39:4] mmu_l15_addr; | |
550 | output mmu_l15_valid; | |
551 | ||
552 | output [7:0] mmu_write_itlb; | |
553 | output [47:0] mmu_itte_tag_data; | |
554 | ||
555 | output [64:0] mmu_asi_data; // ASI read data for fast bus | |
556 | output mmu_asi_read; // Valid for MMU ASI read | |
557 | ||
558 | output mmu_dae_req; // data_access_exception for bad pg size | |
559 | output [2:0] mmu_dae_tid; | |
560 | ||
561 | output mmu_dtlb_reload_stall; | |
562 | output mmu_dtlb_reload; | |
563 | ||
564 | output [7:0] mmu_hw_tw_enable; | |
565 | output [7:0] mmu_reload_done; | |
566 | output [7:0] mmu_i_unauth_access; | |
567 | output [7:0] mmu_i_tsb_miss; | |
568 | output [7:0] mmu_d_tsb_miss; | |
569 | ||
570 | output [7:0] mmu_i_tte_outofrange; // RA out of range | |
571 | output [7:0] mmu_d_tte_outofrange; // RA out of range | |
572 | ||
573 | output [6:0] mmu_index; // Index and valid from idata_access | |
574 | ||
575 | output mmu_asi_cecc; // Correctable ECC error on ASI read | |
576 | output mmu_asi_uecc; // Uncorrectable ECC error on ASI read | |
577 | output [2:0] mmu_asi_tid; // Thread for reported error | |
578 | output [10:0] mmu_asi_index; // Syndrome and index of the failure | |
579 | output mmu_asi_mra_not_sca; // 1: MRA error 0: Scratchpad error | |
580 | output [7:0] mmu_i_l2cerr; // HW TW had L2 correctable error on I rld | |
581 | output [7:0] mmu_d_l2cerr; // HW TW had L2 correctable error on D rld | |
582 | output [7:0] mmu_i_eccerr; // HW TW had MRA or L2 error on I rld | |
583 | output [7:0] mmu_d_eccerr; // HW TW had MRA or L2 error on D rld | |
584 | output [2:0] mmu_thr0_err_type; // [2]: 1-MRA 0-L2 [1:0] ND U C - (3-0) | |
585 | output [2:0] mmu_thr1_err_type; // [2]: 1-MRA 0-L2 [1:0] ND U C - (3-0) | |
586 | output [2:0] mmu_thr2_err_type; // [2]: 1-MRA 0-L2 [1:0] ND U C - (3-0) | |
587 | output [2:0] mmu_thr3_err_type; // [2]: 1-MRA 0-L2 [1:0] ND U C - (3-0) | |
588 | output [2:0] mmu_thr4_err_type; // [2]: 1-MRA 0-L2 [1:0] ND U C - (3-0) | |
589 | output [2:0] mmu_thr5_err_type; // [2]: 1-MRA 0-L2 [1:0] ND U C - (3-0) | |
590 | output [2:0] mmu_thr6_err_type; // [2]: 1-MRA 0-L2 [1:0] ND U C - (3-0) | |
591 | output [2:0] mmu_thr7_err_type; // [2]: 1-MRA 0-L2 [1:0] ND U C - (3-0) | |
592 | output [2:0] mmu_thr0_err_index; | |
593 | output [2:0] mmu_thr1_err_index; | |
594 | output [2:0] mmu_thr2_err_index; | |
595 | output [2:0] mmu_thr3_err_index; | |
596 | output [2:0] mmu_thr4_err_index; | |
597 | output [2:0] mmu_thr5_err_index; | |
598 | output [2:0] mmu_thr6_err_index; | |
599 | output [2:0] mmu_thr7_err_index; | |
600 | ||
601 | output mmu_pmu_l2ret; | |
602 | output mmu_pmu_l2miss; | |
603 | output mmu_pmu_dtlb; | |
604 | output [2:0] mmu_pmu_tid; | |
605 | ||
606 | ||
607 | ||
608 | ////////////////////////////////////////////////////////////////////////////// | |
609 | ////////////////////////////////////////////////////////////////////////////// | |
610 | // assertions | |
611 | // Cannot send out a request to gkt, if in null state | |
612 | /* 0in assert -var (~(tmc.tsm0.null_state & mmu_l15_valid & (mmu_l15_cpkt[2:0] == 3'b000))) | |
613 | -message "mmu.mmu_tsm_ctl: Valid request sent to gkt in null state, thread 0" */ | |
614 | ||
615 | /* 0in assert -var (~(tmc.tsm1.null_state & mmu_l15_valid & (mmu_l15_cpkt[2:0] == 3'b001))) | |
616 | -message "mmu.mmu_tsm_ctl: Valid request sent to gkt in null state, thread 1" */ | |
617 | ||
618 | /* 0in assert -var (~(tmc.tsm2.null_state & mmu_l15_valid & (mmu_l15_cpkt[2:0] == 3'b010))) | |
619 | -message "mmu.mmu_tsm_ctl: Valid request sent to gkt in null state, thread 2" */ | |
620 | ||
621 | /* 0in assert -var (~(tmc.tsm3.null_state & mmu_l15_valid & (mmu_l15_cpkt[2:0] == 3'b011))) | |
622 | -message "mmu.mmu_tsm_ctl: Valid request sent to gkt in null state, thread 3" */ | |
623 | ||
624 | /* 0in assert -var (~(tmc.tsm4.null_state & mmu_l15_valid & (mmu_l15_cpkt[2:0] == 3'b100))) | |
625 | -message "mmu.mmu_tsm_ctl: Valid request sent to gkt in null state, thread 4" */ | |
626 | ||
627 | /* 0in assert -var (~(tmc.tsm5.null_state & mmu_l15_valid & (mmu_l15_cpkt[2:0] == 3'b101))) | |
628 | -message "mmu.mmu_tsm_ctl: Valid request sent to gkt in null state, thread 5" */ | |
629 | ||
630 | /* 0in assert -var (~(tmc.tsm6.null_state & mmu_l15_valid & (mmu_l15_cpkt[2:0] == 3'b110))) | |
631 | -message "mmu.mmu_tsm_ctl: Valid request sent to gkt in null state, thread 6" */ | |
632 | ||
633 | /* 0in assert -var (~(tmc.tsm7.null_state & mmu_l15_valid & (mmu_l15_cpkt[2:0] == 3'b111))) | |
634 | -message "mmu.mmu_tsm_ctl: Valid request sent to gkt in null state, thread 7" */ | |
635 | ||
636 | // Cannot receive pkt from gkt, if in null state | |
637 | /* 0in assert -var (~(tmc.tsm0.null_state & htc.load_ret_hw0 & htc.ret_tid_hw0[0])) | |
638 | -message "mmu.mmu_htc_ctl: Pkt received from gkt in null state, thread 0" */ | |
639 | ||
640 | /* 0in assert -var (~(tmc.tsm1.null_state & htc.load_ret_hw0 & htc.ret_tid_hw0[1])) | |
641 | -message "mmu.mmu_htc_ctl: Pkt received from gkt in null state, thread 1" */ | |
642 | ||
643 | /* 0in assert -var (~(tmc.tsm2.null_state & htc.load_ret_hw0 & htc.ret_tid_hw0[2])) | |
644 | -message "mmu.mmu_htc_ctl: Pkt received from gkt in null state, thread 2" */ | |
645 | ||
646 | /* 0in assert -var (~(tmc.tsm3.null_state & htc.load_ret_hw0 & htc.ret_tid_hw0[3])) | |
647 | -message "mmu.mmu_htc_ctl: Pkt received from gkt in null state, thread 3" */ | |
648 | ||
649 | /* 0in assert -var (~(tmc.tsm4.null_state & htc.load_ret_hw0 & htc.ret_tid_hw0[4])) | |
650 | -message "mmu.mmu_htc_ctl: Pkt received from gkt in null state, thread 4" */ | |
651 | ||
652 | /* 0in assert -var (~(tmc.tsm5.null_state & htc.load_ret_hw0 & htc.ret_tid_hw0[5])) | |
653 | -message "mmu.mmu_htc_ctl: Pkt received from gkt in null state, thread 5" */ | |
654 | ||
655 | /* 0in assert -var (~(tmc.tsm6.null_state & htc.load_ret_hw0 & htc.ret_tid_hw0[6])) | |
656 | -message "mmu.mmu_htc_ctl: Pkt received from gkt in null state, thread 6" */ | |
657 | ||
658 | /* 0in assert -var (~(tmc.tsm7.null_state & htc.load_ret_hw0 & htc.ret_tid_hw0[7])) | |
659 | -message "mmu.mmu_htc_ctl: Pkt received from gkt in null state, thread 7" */ | |
660 | ||
661 | ////////////////////////////////////////////////////////////////////////////// | |
662 | assign rd_pce = 1'b1; | |
663 | assign wr_pce = 1'b1; | |
664 | assign bist_clk_mux_sel = 1'b0; | |
665 | assign tcu_scan_en_wmr = lb_scan_en_wmr; | |
666 | ||
667 | ||
668 | ||
669 | assign error_inject_unused[30:24] = | |
670 | lsu_asi_error_inject[30:24]; | |
671 | assign error_inject_unused[22:21] = | |
672 | lsu_asi_error_inject[22:21]; | |
673 | assign error_inject_unused[19:8] = | |
674 | lsu_asi_error_inject[19:8]; | |
675 | ||
676 | ||
677 | ||
678 | ////////////////////////////////////////////////////////////////////////////// | |
679 | ||
680 | ||
681 | ||
682 | mmu_asi_ctl asi ( // FS:wmr_protect | |
683 | .wmr_scan_in(asi_wmr_scanin), | |
684 | .wmr_scan_out(asi_wmr_scanout), | |
685 | .scan_in(asi_scanin), | |
686 | .scan_out(asi_scanout), | |
687 | .l2clk (l2clk ), | |
688 | .error_inject_enable (lsu_asi_error_inject [31 ] ), | |
689 | .error_inject_scau (lsu_asi_error_inject [23 ] ), | |
690 | .error_inject_mrau (lsu_asi_error_inject [20 ] ), | |
691 | .error_inject_mask (lsu_asi_error_inject [7:0] ), | |
692 | .tcu_pce_ov(tcu_pce_ov), | |
693 | .spc_aclk(spc_aclk), | |
694 | .spc_bclk(spc_bclk), | |
695 | .tcu_scan_en(tcu_scan_en), | |
696 | .spc_aclk_wmr(spc_aclk_wmr), | |
697 | .htc_itlb_clken(htc_itlb_clken[7:0]), | |
698 | .htc_dtlb_clken(htc_dtlb_clken[7:0]), | |
699 | .lsu_asi_clken(lsu_asi_clken), | |
700 | .lsu_mmu_pmen(lsu_mmu_pmen), | |
701 | .tlu_tag_access_tid_0_b(tlu_tag_access_tid_0_b[1:0]), | |
702 | .tlu_i_tag_access_0_b(tlu_i_tag_access_0_b), | |
703 | .tlu_d_tag_access_0_b(tlu_d_tag_access_0_b), | |
704 | .tlu_tag_access_tid_1_b(tlu_tag_access_tid_1_b[1:0]), | |
705 | .tlu_i_tag_access_1_b(tlu_i_tag_access_1_b), | |
706 | .tlu_d_tag_access_1_b(tlu_d_tag_access_1_b), | |
707 | .mbi_mra0_write_en(mbi_mra0_write_en), | |
708 | .mbi_mra1_write_en(mbi_mra1_write_en), | |
709 | .mbi_scp0_write_en(mbi_scp0_write_en), | |
710 | .mbi_scp1_write_en(mbi_scp1_write_en), | |
711 | .mbi_addr(mbi_addr[4:0]), | |
712 | .mbi_run(mbi_run), | |
713 | .mbi_wdata(mbi_wdata[7:0]), | |
714 | .mbi_mra0_read_en(mbi_mra0_read_en), | |
715 | .mbi_mra1_read_en(mbi_mra1_read_en), | |
716 | .mbi_scp0_read_en(mbi_scp0_read_en), | |
717 | .mbi_scp1_read_en(mbi_scp1_read_en), | |
718 | .mbi_mmu_cmpsel(mbi_mmu_cmpsel[1:0]), | |
719 | .mbd_compare(mbd_compare), | |
720 | .lsu_rngf_cdbus(lsu_rngf_cdbus[64:0]), | |
721 | .tlu_iht_request(tlu_iht_request[7:0]), | |
722 | .tlu_dht_request(tlu_dht_request[7:0]), | |
723 | .tlu_release_tte(tlu_release_tte[7:0]), | |
724 | .tlu_ceter_pscce(tlu_ceter_pscce[7:0]), | |
725 | .scp0_data(scp0_data[63:0]), | |
726 | .scp1_data(scp1_data[63:0]), | |
727 | .scp0_ecc(scp0_ecc[7:0]), | |
728 | .scp1_ecc(scp1_ecc[7:0]), | |
729 | .sel_scac(sel_scac), | |
730 | .sel_scau(sel_scau), | |
731 | .ase_mra_rd_data(ase_mra_rd_data[63:0]), | |
732 | .mel0_parity(mel0_parity[1:0]), | |
733 | .mel1_parity(mel1_parity[1:0]), | |
734 | .mel0_parity_err(mel0_parity_err), | |
735 | .mel1_parity_err(mel1_parity_err), | |
736 | .asd0_asi_rd_data(asd0_asi_rd_data[63:0]), | |
737 | .asd1_asi_rd_data(asd1_asi_rd_data[63:0]), | |
738 | .asd0_dtte_tag(asd0_dtte_tag[47:0]), | |
739 | .asd1_dtte_tag(asd1_dtte_tag[47:0]), | |
740 | .asd0_dtte_data(asd0_dtte_data[54:0]), | |
741 | .asd1_dtte_data(asd1_dtte_data[54:0]), | |
742 | .asd0_itte_index(asd0_itte_index[6:0]), | |
743 | .asd1_itte_index(asd1_itte_index[6:0]), | |
744 | .asd0_asi_zero_context(asd0_asi_zero_context), | |
745 | .asd1_asi_zero_context(asd1_asi_zero_context), | |
746 | .htd_tsbptr(htd_tsbptr[39:4]), | |
747 | .htc_mra_addr_in(htc_mra_addr_in[4:0]), | |
748 | .htc_mra_rd_en(htc_mra_rd_en[1:0]), | |
749 | .htc_wr_itlb_data_in(htc_wr_itlb_data_in[7:0]), | |
750 | .htc_wr_dtlb_data_in(htc_wr_dtlb_data_in[7:0]), | |
751 | .mmu_i_unauth_access(mmu_i_unauth_access[7:0]), | |
752 | .mmu_i_tsb_miss(mmu_i_tsb_miss[7:0]), | |
753 | .mmu_d_tsb_miss(mmu_d_tsb_miss[7:0]), | |
754 | .mmu_i_tte_outofrange(mmu_i_tte_outofrange[7:0]), | |
755 | .mmu_d_tte_outofrange(mmu_d_tte_outofrange[7:0]), | |
756 | .mmu_i_eccerr(mmu_i_eccerr[7:0]), | |
757 | .mmu_d_eccerr(mmu_d_eccerr[7:0]), | |
758 | .asi_error_scau(asi_error_scau), | |
759 | .asi_error_mrau(asi_error_mrau), | |
760 | .asi_error_mask(asi_error_mask[7:0]), | |
761 | .asi_scp_addr(asi_scp_addr[4:0]), | |
762 | .asi_scp_wr_en(asi_scp_wr_en[1:0]), | |
763 | .asi_scp_rd_en(asi_scp_rd_en[1:0]), | |
764 | .asi_rd_scp0(asi_rd_scp0), | |
765 | .asi_mra_rd_addr_0(asi_mra_rd_addr_0[4:0]), | |
766 | .asi_mra_rd_addr_1(asi_mra_rd_addr_1[4:0]), | |
767 | .asi_mra_rd_en(asi_mra_rd_en[1:0]), | |
768 | .asi_mra_wr_addr(asi_mra_wr_addr[4:0]), | |
769 | .asi_mra_wr_en(asi_mra_wr_en[1:0]), | |
770 | .asi_mra_rd_en_last(asi_mra_rd_en_last[1:0]), | |
771 | .asi_rd_tsb_cfg_0_2(asi_rd_tsb_cfg_0_2), | |
772 | .asi_rd_tsb_cfg_1_3(asi_rd_tsb_cfg_1_3), | |
773 | .asi_rd_tsb_ptr_(asi_rd_tsb_ptr_), | |
774 | .asi_rd_real_range(asi_rd_real_range), | |
775 | .asi_rd_physical_offset(asi_rd_physical_offset), | |
776 | .asi_sel_mra_0_in(asi_sel_mra_0_in), | |
777 | .asi_mra_wr_en_next(asi_mra_wr_en_next), | |
778 | .asi_rd_immu_tag_target(asi_rd_immu_tag_target[7:0]), | |
779 | .asi_rd_immu_tag_access(asi_rd_immu_tag_access[7:0]), | |
780 | .asi_rd_dmmu_tag_target(asi_rd_dmmu_tag_target[7:0]), | |
781 | .asi_rd_dmmu_tag_access(asi_rd_dmmu_tag_access[7:0]), | |
782 | .asi_rd_i_access_target(asi_rd_i_access_target[1:0]), | |
783 | .asi_rd_d_access_target(asi_rd_d_access_target[1:0]), | |
784 | .asi_rd_access_target(asi_rd_access_target[1:0]), | |
785 | .asi_rd_itte_tag(asi_rd_itte_tag[7:0]), | |
786 | .asi_rd_itte_data(asi_rd_itte_data[7:0]), | |
787 | .asi_rd_dtte(asi_rd_dtte[6:0]), | |
788 | .asi_wr_immu_tag_access(asi_wr_immu_tag_access[7:0]), | |
789 | .asi_wr_itlb_data_in(asi_wr_itlb_data_in[7:0]), | |
790 | .asi_wr_itlb_data_access(asi_wr_itlb_data_access[7:0]), | |
791 | .asi_wr_immu_demap(asi_wr_immu_demap[7:0]), | |
792 | .asi_wr_immu_demap_p(asi_wr_immu_demap_p[7:0]), | |
793 | .asi_wr_immu_demap_n(asi_wr_immu_demap_n[7:0]), | |
794 | .asi_wr_dmmu_tag_access(asi_wr_dmmu_tag_access[7:0]), | |
795 | .asi_wr_dtlb_data_in(asi_wr_dtlb_data_in[7:0]), | |
796 | .asi_wr_dtlb_data_access(asi_wr_dtlb_data_access[7:0]), | |
797 | .asi_wr_partition_id(asi_wr_partition_id[7:0]), | |
798 | .asi_wr_dmmu_demap(asi_wr_dmmu_demap[7:0]), | |
799 | .asi_wr_dmmu_demap_p(asi_wr_dmmu_demap_p[7:0]), | |
800 | .asi_wr_dmmu_demap_s_n(asi_wr_dmmu_demap_s_n[7:0]), | |
801 | .asi_dmmu_demap_s(asi_dmmu_demap_s), | |
802 | .asi_wr_p_context_0(asi_wr_p_context_0[7:0]), | |
803 | .asi_p_context_0_en(asi_p_context_0_en[1:0]), | |
804 | .asi_tag_access_sel(asi_tag_access_sel[2:0]), | |
805 | .asi_tsb_ptr_req_valid(asi_tsb_ptr_req_valid), | |
806 | .asi_tsb_ptr_req(asi_tsb_ptr_req[2:0]), | |
807 | .asi_tsb_ptr_number(asi_tsb_ptr_number[1:0]), | |
808 | .asi_tsb_hwtw_enable_0(asi_tsb_hwtw_enable_0[1:0]), | |
809 | .asi_tsb_hwtw_enable_1(asi_tsb_hwtw_enable_1[1:0]), | |
810 | .asi_data_in_real(asi_data_in_real), | |
811 | .asi_seg_wr_data(asi_seg_wr_data[63:0]), | |
812 | .asi_wr_data(asi_wr_data[63:0]), | |
813 | .asi_mra_wr_data(asi_mra_wr_data[63:0]), | |
814 | .asi_mra_req_grant(asi_mra_req_grant), | |
815 | .asi_demap_r_bit(asi_demap_r_bit), | |
816 | .asi_rd_data(asi_rd_data[63:0]), | |
817 | .asi_hwtw_config_0(asi_hwtw_config_0[1:0]), | |
818 | .asi_hwtw_config_1(asi_hwtw_config_1[1:0]), | |
819 | .asi_hwtw_config_2(asi_hwtw_config_2[1:0]), | |
820 | .asi_hwtw_config_3(asi_hwtw_config_3[1:0]), | |
821 | .asi_hwtw_config_4(asi_hwtw_config_4[1:0]), | |
822 | .asi_hwtw_config_5(asi_hwtw_config_5[1:0]), | |
823 | .asi_hwtw_config_6(asi_hwtw_config_6[1:0]), | |
824 | .asi_hwtw_config_7(asi_hwtw_config_7[1:0]), | |
825 | .asi_sel_en(asi_sel_en), | |
826 | .asi_i_tag_access_en(asi_i_tag_access_en[7:0]), | |
827 | .asi_d_tag_access_en(asi_d_tag_access_en[7:0]), | |
828 | .asi_i_data_in_en(asi_i_data_in_en[7:0]), | |
829 | .asi_d_data_in_en(asi_d_data_in_en[7:0]), | |
830 | .asi_mbist_wdata(asi_mbist_wdata[7:0]), | |
831 | .asi_ase_compare_data(asi_ase_compare_data[7:0]), | |
832 | .asi_compare_data(asi_compare_data[7:0]), | |
833 | .asi_mbd_scp_data(asi_mbd_scp_data[31:0]), | |
834 | .asi_mbd_sel_scp(asi_mbd_sel_scp), | |
835 | .asi_mbist_ecc_in(asi_mbist_ecc_in[7:0]), | |
836 | .asi_mbist_ecc(asi_mbist_ecc[3:2]), | |
837 | .asi_mbist_run(asi_mbist_run), | |
838 | .asi_ecc_cmpsel_in(asi_ecc_cmpsel_in), | |
839 | .asi_ase_cmpsel_in(asi_ase_cmpsel_in[1:0]), | |
840 | .mmu_asi_data(mmu_asi_data[64:0]), | |
841 | .mmu_asi_read(mmu_asi_read), | |
842 | .mmu_write_itlb(mmu_write_itlb[7:0]), | |
843 | .mmu_dtlb_reload_stall(mmu_dtlb_reload_stall), | |
844 | .mmu_dtlb_reload(mmu_dtlb_reload), | |
845 | .mmu_hw_tw_enable(mmu_hw_tw_enable[7:0]), | |
846 | .mmu_asi_cecc(mmu_asi_cecc), | |
847 | .mmu_asi_uecc(mmu_asi_uecc), | |
848 | .mmu_asi_tid(mmu_asi_tid[2:0]), | |
849 | .mmu_asi_index(mmu_asi_index[2:0]), | |
850 | .mmu_asi_mra_not_sca(mmu_asi_mra_not_sca), | |
851 | .mmu_dae_req(mmu_dae_req), | |
852 | .mmu_dae_tid(mmu_dae_tid[2:0]), | |
853 | .mmu_reload_done(mmu_reload_done[7:0]), | |
854 | .mmu_index(mmu_index[6:0]), | |
855 | .mmu_mbi_mra0_fail(mmu_mbi_mra0_fail), | |
856 | .mmu_mbi_mra1_fail(mmu_mbi_mra1_fail), | |
857 | .mmu_mbi_scp0_fail(mmu_mbi_scp0_fail), | |
858 | .mmu_mbi_scp1_fail(mmu_mbi_scp1_fail) | |
859 | ); | |
860 | ||
861 | assign asi_rd_dtte_unused[3] = | |
862 | asi_rd_dtte[3]; | |
863 | ||
864 | mmu_asd_dp asd0 ( // FS:wmr_protect | |
865 | .wmr_scan_in(asd0_wmr_scanin), | |
866 | .wmr_scan_out(asd0_wmr_scanout), | |
867 | .scan_in(asd0_scanin), | |
868 | .scan_out(asd0_scanout), | |
869 | .l2clk (l2clk ), | |
870 | .thread_group (1'b0 ), | |
871 | .asd_pc_w (asd_pc_0_w [47:13] ), | |
872 | .asi_mra_rd_en_last (asi_mra_rd_en_last [0 ] ), | |
873 | .asi_rd_immu_tag_target (asi_rd_immu_tag_target [3:0] ), | |
874 | .asi_rd_immu_tag_access (asi_rd_immu_tag_access [3:0] ), | |
875 | .asi_rd_dmmu_tag_target (asi_rd_dmmu_tag_target [3:0] ), | |
876 | .asi_rd_dmmu_tag_access (asi_rd_dmmu_tag_access [3:0] ), | |
877 | .asi_rd_i_access_target (asi_rd_i_access_target [0 ] ), | |
878 | .asi_rd_d_access_target (asi_rd_d_access_target [0 ] ), | |
879 | .asi_rd_access_target (asi_rd_access_target [0 ] ), | |
880 | .asi_rd_itte_tag (asi_rd_itte_tag [3:0] ), | |
881 | .asi_rd_itte_data (asi_rd_itte_data [3:0] ), | |
882 | .asi_rd_dtte (asi_rd_dtte [2:0] ), | |
883 | .asi_wr_immu_tag_access (asi_wr_immu_tag_access [3:0] ), | |
884 | .asi_i_tag_access_en (asi_i_tag_access_en [3:0] ), | |
885 | .asi_wr_itlb_data_in (asi_wr_itlb_data_in [3:0] ), | |
886 | .asi_wr_itlb_data_access(asi_wr_itlb_data_access[3:0] ), | |
887 | .asi_wr_immu_demap (asi_wr_immu_demap [3:0] ), | |
888 | .asi_wr_immu_demap_p (asi_wr_immu_demap_p [3:0] ), | |
889 | .asi_wr_immu_demap_n (asi_wr_immu_demap_n [3:0] ), | |
890 | .asi_i_data_in_en (asi_i_data_in_en [3:0] ), | |
891 | .asi_wr_dmmu_tag_access (asi_wr_dmmu_tag_access [3:0] ), | |
892 | .asi_d_tag_access_en (asi_d_tag_access_en [3:0] ), | |
893 | .asi_wr_dtlb_data_in (asi_wr_dtlb_data_in [3:0] ), | |
894 | .asi_wr_dtlb_data_access(asi_wr_dtlb_data_access[3:0] ), | |
895 | .asi_wr_dmmu_demap (asi_wr_dmmu_demap [3:0] ), | |
896 | .asi_wr_dmmu_demap_p (asi_wr_dmmu_demap_p [3:0] ), | |
897 | .asi_wr_dmmu_demap_s_n (asi_wr_dmmu_demap_s_n [3:0] ), | |
898 | .asi_d_data_in_en (asi_d_data_in_en [3:0] ), | |
899 | .asi_wr_p_context_0 (asi_wr_p_context_0 [3:0] ), | |
900 | .asi_p_context_0_en (asi_p_context_0_en [0 ] ), | |
901 | .tlu_load_i_tag_access_p(tlu_load_i_tag_access_p[3:0] ), | |
902 | .tlu_load_i_tag_access_n(tlu_load_i_tag_access_n[3:0] ), | |
903 | .asi_mra_rd_addr_bit_1 (asi_mra_rd_addr_0 [1 ] ), | |
904 | .mra_data (mra0_data [81:0] ), | |
905 | .tlu_pc_w (tlu_pc_0_w [47:13] ), | |
906 | .tlu_load_d_tag_access (tlu_load_d_tag_access [3:0] ), | |
907 | .tlu_load_d_tag_access_r(tlu_load_d_tag_access_r[3:0] ), | |
908 | .htc_wr_itlb_data_in (htc_wr_itlb_data_in [3:0] ), | |
909 | .htc_wr_dtlb_data_in (htc_wr_dtlb_data_in [3:0] ), | |
910 | .asd_rd_data (asd0_rd_data [81:0] ), | |
911 | .asd_asi_rd_data (asd0_asi_rd_data [63:0] ), | |
912 | .asd_dtte_tag (asd0_dtte_tag [47:0] ), | |
913 | .asd_dtte_data (asd0_dtte_data [54:0] ), | |
914 | .asd_itte_tag_data_ (asd0_itte_tag_data_ [47:0] ), | |
915 | .asd_itte_index (asd0_itte_index [6:0] ), | |
916 | .asd_iht_p_ctx_0_0 (asd_i_p_ctx_0_0 [12:0] ), | |
917 | .asd_iht_p_ctx_0_1 (asd_i_p_ctx_0_1 [12:0] ), | |
918 | .asd_iht_p_ctx_0_2 (asd_i_p_ctx_0_2 [12:0] ), | |
919 | .asd_iht_p_ctx_0_3 (asd_i_p_ctx_0_3 [12:0] ), | |
920 | .asd_tag_access (asd0_tag_access [47:0] ), | |
921 | .asd_zero_context (asd0_zero_context ), | |
922 | .asd_asi_zero_context (asd0_asi_zero_context ), | |
923 | .asd_mra_rd_addr_bit_1 (asd0_mra_rd_addr_bit_1 ), | |
924 | .tcu_pce_ov(tcu_pce_ov), | |
925 | .spc_aclk(spc_aclk), | |
926 | .spc_bclk(spc_bclk), | |
927 | .tcu_scan_en(tcu_scan_en), | |
928 | .tcu_scan_en_wmr(tcu_scan_en_wmr), | |
929 | .spc_aclk_wmr(spc_aclk_wmr), | |
930 | .ase_lsu_va_w(ase_lsu_va_w[47:13]), | |
931 | .ase_lsu_context_w(ase_lsu_context_w[12:0]), | |
932 | .asi_wr_data(asi_wr_data[63:0]), | |
933 | .asi_dmmu_demap_s(asi_dmmu_demap_s), | |
934 | .asi_data_in_real(asi_data_in_real), | |
935 | .asi_tag_access_sel(asi_tag_access_sel[2:0]), | |
936 | .asi_mra_wr_data(asi_mra_wr_data[39:0]), | |
937 | .asi_demap_r_bit(asi_demap_r_bit), | |
938 | .asi_rd_tsb_ptr_(asi_rd_tsb_ptr_), | |
939 | .htd_tagaccess_din(htd_tagaccess_din[47:0]), | |
940 | .htd_tlbdatain_din(htd_tlbdatain_din[38:0]), | |
941 | .mmu_use_context_0(mmu_use_context_0), | |
942 | .mmu_use_context_1(mmu_use_context_1), | |
943 | .mmu_sec_context(mmu_sec_context) | |
944 | ||
945 | ); | |
946 | ||
947 | mmu_asd_dp asd1 ( // FS:wmr_protect | |
948 | .wmr_scan_in(asd1_wmr_scanin), | |
949 | .wmr_scan_out(asd1_wmr_scanout), | |
950 | .scan_in(asd1_scanin), | |
951 | .scan_out(asd1_scanout), | |
952 | .l2clk (l2clk ), | |
953 | .thread_group (1'b1 ), | |
954 | .asd_pc_w (asd_pc_1_w [47:13] ), | |
955 | .asi_mra_rd_en_last (asi_mra_rd_en_last [1 ] ), | |
956 | .asi_rd_immu_tag_target (asi_rd_immu_tag_target [7:4] ), | |
957 | .asi_rd_immu_tag_access (asi_rd_immu_tag_access [7:4] ), | |
958 | .asi_rd_dmmu_tag_target (asi_rd_dmmu_tag_target [7:4] ), | |
959 | .asi_rd_dmmu_tag_access (asi_rd_dmmu_tag_access [7:4] ), | |
960 | .asi_rd_i_access_target (asi_rd_i_access_target [1 ] ), | |
961 | .asi_rd_d_access_target (asi_rd_d_access_target [1 ] ), | |
962 | .asi_rd_access_target (asi_rd_access_target [1 ] ), | |
963 | .asi_rd_itte_tag (asi_rd_itte_tag [7:4] ), | |
964 | .asi_rd_itte_data (asi_rd_itte_data [7:4] ), | |
965 | .asi_rd_dtte (asi_rd_dtte [6:4] ), | |
966 | .asi_wr_immu_tag_access (asi_wr_immu_tag_access [7:4] ), | |
967 | .asi_i_tag_access_en (asi_i_tag_access_en [7:4] ), | |
968 | .asi_wr_itlb_data_in (asi_wr_itlb_data_in [7:4] ), | |
969 | .asi_wr_itlb_data_access(asi_wr_itlb_data_access[7:4] ), | |
970 | .asi_wr_immu_demap (asi_wr_immu_demap [7:4] ), | |
971 | .asi_wr_immu_demap_p (asi_wr_immu_demap_p [7:4] ), | |
972 | .asi_wr_immu_demap_n (asi_wr_immu_demap_n [7:4] ), | |
973 | .asi_i_data_in_en (asi_i_data_in_en [7:4] ), | |
974 | .asi_wr_dmmu_tag_access (asi_wr_dmmu_tag_access [7:4] ), | |
975 | .asi_d_tag_access_en (asi_d_tag_access_en [7:4] ), | |
976 | .asi_wr_dtlb_data_in (asi_wr_dtlb_data_in [7:4] ), | |
977 | .asi_wr_dtlb_data_access(asi_wr_dtlb_data_access[7:4] ), | |
978 | .asi_wr_dmmu_demap (asi_wr_dmmu_demap [7:4] ), | |
979 | .asi_wr_dmmu_demap_p (asi_wr_dmmu_demap_p [7:4] ), | |
980 | .asi_wr_dmmu_demap_s_n (asi_wr_dmmu_demap_s_n [7:4] ), | |
981 | .asi_d_data_in_en (asi_d_data_in_en [7:4] ), | |
982 | .asi_wr_p_context_0 (asi_wr_p_context_0 [7:4] ), | |
983 | .asi_p_context_0_en (asi_p_context_0_en [1 ] ), | |
984 | .tlu_load_i_tag_access_p(tlu_load_i_tag_access_p[7:4] ), | |
985 | .tlu_load_i_tag_access_n(tlu_load_i_tag_access_n[7:4] ), | |
986 | .asi_mra_rd_addr_bit_1 (asi_mra_rd_addr_1 [1 ] ), | |
987 | .mra_data (mra1_data [81:0] ), | |
988 | .tlu_pc_w (tlu_pc_1_w [47:13] ), | |
989 | .tlu_load_d_tag_access (tlu_load_d_tag_access [7:4] ), | |
990 | .tlu_load_d_tag_access_r(tlu_load_d_tag_access_r[7:4] ), | |
991 | .htc_wr_itlb_data_in (htc_wr_itlb_data_in [7:4] ), | |
992 | .htc_wr_dtlb_data_in (htc_wr_dtlb_data_in [7:4] ), | |
993 | .asd_rd_data (asd1_rd_data [81:0] ), | |
994 | .asd_asi_rd_data (asd1_asi_rd_data [63:0] ), | |
995 | .asd_dtte_tag (asd1_dtte_tag [47:0] ), | |
996 | .asd_dtte_data (asd1_dtte_data [54:0] ), | |
997 | .asd_itte_tag_data_ (asd1_itte_tag_data_ [47:0] ), | |
998 | .asd_itte_index (asd1_itte_index [6:0] ), | |
999 | .asd_iht_p_ctx_0_0 (asd_i_p_ctx_0_4 [12:0] ), | |
1000 | .asd_iht_p_ctx_0_1 (asd_i_p_ctx_0_5 [12:0] ), | |
1001 | .asd_iht_p_ctx_0_2 (asd_i_p_ctx_0_6 [12:0] ), | |
1002 | .asd_iht_p_ctx_0_3 (asd_i_p_ctx_0_7 [12:0] ), | |
1003 | .asd_tag_access (asd1_tag_access [47:0] ), | |
1004 | .asd_zero_context (asd1_zero_context ), | |
1005 | .asd_asi_zero_context (asd1_asi_zero_context ), | |
1006 | .asd_mra_rd_addr_bit_1 (asd1_mra_rd_addr_bit_1 ), | |
1007 | .tcu_pce_ov(tcu_pce_ov), | |
1008 | .spc_aclk(spc_aclk), | |
1009 | .spc_bclk(spc_bclk), | |
1010 | .tcu_scan_en(tcu_scan_en), | |
1011 | .tcu_scan_en_wmr(tcu_scan_en_wmr), | |
1012 | .spc_aclk_wmr(spc_aclk_wmr), | |
1013 | .ase_lsu_va_w(ase_lsu_va_w[47:13]), | |
1014 | .ase_lsu_context_w(ase_lsu_context_w[12:0]), | |
1015 | .asi_wr_data(asi_wr_data[63:0]), | |
1016 | .asi_dmmu_demap_s(asi_dmmu_demap_s), | |
1017 | .asi_data_in_real(asi_data_in_real), | |
1018 | .asi_tag_access_sel(asi_tag_access_sel[2:0]), | |
1019 | .asi_mra_wr_data(asi_mra_wr_data[39:0]), | |
1020 | .asi_demap_r_bit(asi_demap_r_bit), | |
1021 | .asi_rd_tsb_ptr_(asi_rd_tsb_ptr_), | |
1022 | .htd_tagaccess_din(htd_tagaccess_din[47:0]), | |
1023 | .htd_tlbdatain_din(htd_tlbdatain_din[38:0]), | |
1024 | .mmu_use_context_0(mmu_use_context_0), | |
1025 | .mmu_use_context_1(mmu_use_context_1), | |
1026 | .mmu_sec_context(mmu_sec_context) | |
1027 | ); | |
1028 | ||
1029 | mmu_ase_dp ase ( | |
1030 | .scan_in(ase_scanin), | |
1031 | .scan_out(ase_scanout), | |
1032 | .l2clk (l2clk ), | |
1033 | .tcu_pce_ov(tcu_pce_ov), | |
1034 | .spc_aclk(spc_aclk), | |
1035 | .spc_bclk(spc_bclk), | |
1036 | .tcu_scan_en(tcu_scan_en), | |
1037 | .tcu_dectest(tcu_dectest), | |
1038 | .tcu_muxtest(tcu_muxtest), | |
1039 | .lsu_va_b(lsu_va_b[47:0]), | |
1040 | .lsu_context_b(lsu_context_b[12:0]), | |
1041 | .asi_rd_tsb_cfg_0_2(asi_rd_tsb_cfg_0_2), | |
1042 | .asi_rd_tsb_cfg_1_3(asi_rd_tsb_cfg_1_3), | |
1043 | .asi_rd_real_range(asi_rd_real_range), | |
1044 | .asi_rd_physical_offset(asi_rd_physical_offset), | |
1045 | .asi_sel_mra_0_in(asi_sel_mra_0_in), | |
1046 | .asi_mra_wr_en_next(asi_mra_wr_en_next), | |
1047 | .asi_mra_wr_data(asi_mra_wr_data[63:0]), | |
1048 | .asd0_rd_data(asd0_rd_data[81:0]), | |
1049 | .asd1_rd_data(asd1_rd_data[81:0]), | |
1050 | .asd0_itte_tag_data_(asd0_itte_tag_data_[47:0]), | |
1051 | .asd1_itte_tag_data_(asd1_itte_tag_data_[47:0]), | |
1052 | .asi_mbist_run(asi_mbist_run), | |
1053 | .asi_ecc_cmpsel_in(asi_ecc_cmpsel_in), | |
1054 | .asi_ase_cmpsel_in(asi_ase_cmpsel_in[1:0]), | |
1055 | .asi_mbist_wdata(asi_mbist_wdata[7:0]), | |
1056 | .asi_ase_compare_data(asi_ase_compare_data[7:0]), | |
1057 | .mel0_parity(mel0_parity[1:0]), | |
1058 | .mel1_parity(mel1_parity[1:0]), | |
1059 | .ase_mra_wr_data(ase_mra_wr_data[81:0]), | |
1060 | .ase_mra_wr_data_minbuf(ase_mra_wr_data_minbuf[81:0]), | |
1061 | .ase_mra_rd_data(ase_mra_rd_data[63:0]), | |
1062 | .ase_lsu_va_w(ase_lsu_va_w[47:13]), | |
1063 | .ase_lsu_context_w(ase_lsu_context_w[12:0]), | |
1064 | .ase_mbd_mbist_data(ase_mbd_mbist_data[31:0]), | |
1065 | .mmu_itte_tag_data(mmu_itte_tag_data[47:0]) | |
1066 | ); | |
1067 | ||
1068 | ||
1069 | // Parity generation for both MRAs (only one write source: ASI bus) | |
1070 | mmu_mec_dp meg1 ( | |
1071 | .data_in (ase_mra_wr_data [81:41] ), | |
1072 | .parity_in ({1 {1'b0}} ), | |
1073 | .parity_out (meg_parity [1 ] ), | |
1074 | .parity_err (meg1_parity_err_unused ) | |
1075 | ); | |
1076 | ||
1077 | mmu_mec_dp meg0 ( | |
1078 | .data_in (ase_mra_wr_data [40:0] ), | |
1079 | .parity_in ({1 {1'b0}} ), | |
1080 | .parity_out (meg_parity [0 ] ), | |
1081 | .parity_err (meg0_parity_err_unused ) | |
1082 | ); | |
1083 | ||
1084 | mmu_mem_dp mem1 ( | |
1085 | .asi_error_inject (asi_error_mrau ), | |
1086 | .asi_error_mask (1'b1 ), | |
1087 | .asi_mbist_ecc (asi_mbist_ecc [3 ] ), | |
1088 | .parity_in (meg_parity [1 ] ), | |
1089 | .parity_out (mem_parity [1 ] ), | |
1090 | .asi_mbist_run(asi_mbist_run) | |
1091 | ); | |
1092 | ||
1093 | mmu_mem_dp mem0 ( | |
1094 | .asi_error_inject (asi_error_mrau ), | |
1095 | .asi_error_mask (1'b1 ), | |
1096 | .asi_mbist_ecc (asi_mbist_ecc [2 ] ), | |
1097 | .parity_in (meg_parity [0 ] ), | |
1098 | .parity_out (mem_parity [0 ] ), | |
1099 | .asi_mbist_run(asi_mbist_run) | |
1100 | ); | |
1101 | ||
1102 | // Parity error detection for MRA | |
1103 | mmu_mel_dp mel0 ( | |
1104 | .scan_in(mel0_scanin), | |
1105 | .scan_out(mel0_scanout), | |
1106 | .l2clk (l2clk ), | |
1107 | .mra_parity (mra0_parity [1:0] ), | |
1108 | .med0_parity_err (med00_parity_err ), | |
1109 | .med1_parity_err (med01_parity_err ), | |
1110 | .mel_crit_parity (mel0_crit_parity [1:0] ), | |
1111 | .mel_parity (mel0_parity [1:0] ), | |
1112 | .mel_parity_err (mel0_parity_err ), | |
1113 | .mel_htc_parity_err (mel0_htc_parity_err ), | |
1114 | .tcu_pce_ov(tcu_pce_ov), | |
1115 | .spc_aclk(spc_aclk), | |
1116 | .spc_bclk(spc_bclk), | |
1117 | .tcu_scan_en(tcu_scan_en), | |
1118 | .tlu_cerer_mrau(tlu_cerer_mrau), | |
1119 | .tlu_cerer_hwtwmu(tlu_cerer_hwtwmu) | |
1120 | ); | |
1121 | ||
1122 | mmu_mec_dp med01 ( | |
1123 | .data_in (asd0_rd_data [81:41] ), | |
1124 | .parity_in (mel0_crit_parity [1 ] ), | |
1125 | .parity_out (med01_parity_out_unused ), | |
1126 | .parity_err (med01_parity_err ) | |
1127 | ); | |
1128 | ||
1129 | mmu_mec_dp med00 ( | |
1130 | .data_in (asd0_rd_data [40:0] ), | |
1131 | .parity_in (mel0_crit_parity [0 ] ), | |
1132 | .parity_out (med00_parity_out_unused ), | |
1133 | .parity_err (med00_parity_err ) | |
1134 | ); | |
1135 | ||
1136 | n2_com_dp_32x84_cust mra0 ( | |
1137 | .tcu_aclk (spc_aclk ), | |
1138 | .tcu_bclk (spc_bclk ), | |
1139 | .scan_in(mra0_scanin), | |
1140 | .scan_out(mra0_scanout), | |
1141 | .rdclk (l2clk ), | |
1142 | .wrclk (l2clk ), | |
1143 | .rd_adr ({asi_mra_rd_addr_0 [4:2], | |
1144 | asd0_mra_rd_addr_bit_1 , | |
1145 | asi_mra_rd_addr_0 [0 ]}), | |
1146 | .rd_en (asi_mra_rd_en [0 ] ), | |
1147 | .wr_adr (asi_mra_wr_addr [4:0] ), | |
1148 | .wr_en (asi_mra_wr_en [0 ] ), | |
1149 | .din ({mem_parity [1:0], | |
1150 | ase_mra_wr_data_minbuf [81:0]}), | |
1151 | .dout ({mra0_parity [1:0], | |
1152 | mra0_data [81:0]}), | |
1153 | .tcu_pce_ov(tcu_pce_ov), | |
1154 | .tcu_array_wr_inhibit(tcu_array_wr_inhibit), | |
1155 | .tcu_se_scancollar_in(tcu_se_scancollar_in), | |
1156 | .bist_clk_mux_sel(bist_clk_mux_sel), | |
1157 | .rd_pce(rd_pce), | |
1158 | .wr_pce(wr_pce) | |
1159 | ); | |
1160 | ||
1161 | // ECC error detection for MRA | |
1162 | mmu_mel_dp mel1 ( | |
1163 | .scan_in(mel1_scanin), | |
1164 | .scan_out(mel1_scanout), | |
1165 | .l2clk (l2clk ), | |
1166 | .mra_parity (mra1_parity [1:0] ), | |
1167 | .med0_parity_err (med10_parity_err ), | |
1168 | .med1_parity_err (med11_parity_err ), | |
1169 | .mel_crit_parity (mel1_crit_parity [1:0] ), | |
1170 | .mel_parity (mel1_parity [1:0] ), | |
1171 | .mel_parity_err (mel1_parity_err ), | |
1172 | .mel_htc_parity_err (mel1_htc_parity_err ), | |
1173 | .tcu_pce_ov(tcu_pce_ov), | |
1174 | .spc_aclk(spc_aclk), | |
1175 | .spc_bclk(spc_bclk), | |
1176 | .tcu_scan_en(tcu_scan_en), | |
1177 | .tlu_cerer_mrau(tlu_cerer_mrau), | |
1178 | .tlu_cerer_hwtwmu(tlu_cerer_hwtwmu) | |
1179 | ); | |
1180 | ||
1181 | mmu_mec_dp med11 ( | |
1182 | .data_in (asd1_rd_data [81:41] ), | |
1183 | .parity_in (mel1_crit_parity [1 ] ), | |
1184 | .parity_out (med11_parity_out_unused ), | |
1185 | .parity_err (med11_parity_err ) | |
1186 | ); | |
1187 | ||
1188 | mmu_mec_dp med10 ( | |
1189 | .data_in (asd1_rd_data [40:0] ), | |
1190 | .parity_in (mel1_crit_parity [0 ] ), | |
1191 | .parity_out (med10_parity_out_unused ), | |
1192 | .parity_err (med10_parity_err ) | |
1193 | ); | |
1194 | ||
1195 | n2_com_dp_32x84_cust mra1 ( | |
1196 | .tcu_aclk (spc_aclk ), | |
1197 | .tcu_bclk (spc_bclk ), | |
1198 | .scan_in(mra1_scanin), | |
1199 | .scan_out(mra1_scanout), | |
1200 | .rdclk (l2clk ), | |
1201 | .wrclk (l2clk ), | |
1202 | .rd_adr ({asi_mra_rd_addr_1 [4:2], | |
1203 | asd1_mra_rd_addr_bit_1 , | |
1204 | asi_mra_rd_addr_1 [0 ]}), | |
1205 | .rd_en (asi_mra_rd_en [1 ] ), | |
1206 | .wr_adr (asi_mra_wr_addr [4:0] ), | |
1207 | .wr_en (asi_mra_wr_en [1 ] ), | |
1208 | .din ({mem_parity [1:0], | |
1209 | ase_mra_wr_data_minbuf [81:0]}), | |
1210 | .dout ({mra1_parity [1:0], | |
1211 | mra1_data [81:0]}), | |
1212 | .tcu_pce_ov(tcu_pce_ov), | |
1213 | .tcu_array_wr_inhibit(tcu_array_wr_inhibit), | |
1214 | .tcu_se_scancollar_in(tcu_se_scancollar_in), | |
1215 | .bist_clk_mux_sel(bist_clk_mux_sel), | |
1216 | .rd_pce(rd_pce), | |
1217 | .wr_pce(wr_pce) | |
1218 | ); | |
1219 | ||
1220 | ||
1221 | // ECC generation for scratchpad arrays | |
1222 | mmu_seg_dp seg ( | |
1223 | .data_in ({{3 {1'b0}} , | |
1224 | asi_seg_wr_data [63:0]}), | |
1225 | .ecc_out (seg_ecc [7:0] ) | |
1226 | ); | |
1227 | ||
1228 | mmu_eem_dp sem ( | |
1229 | .asi_error_inject (asi_error_scau ), | |
1230 | .ecc_in (seg_ecc [7:0] ), | |
1231 | .ecc_out (sem_ecc [7:0] ), | |
1232 | .asi_error_mask(asi_error_mask[7:0]), | |
1233 | .asi_mbist_ecc_in(asi_mbist_ecc_in[7:0]), | |
1234 | .asi_mbist_run(asi_mbist_run) | |
1235 | ); | |
1236 | ||
1237 | // ECC error detection for scratchpad arrays | |
1238 | mmu_sel_dp sel ( | |
1239 | .scan_in(sel_scanin), | |
1240 | .scan_out(sel_scanout), | |
1241 | .l2clk (l2clk ), | |
1242 | .sel_syndrome (mmu_asi_index [10:3] ), | |
1243 | .tcu_pce_ov(tcu_pce_ov), | |
1244 | .spc_aclk(spc_aclk), | |
1245 | .spc_bclk(spc_bclk), | |
1246 | .tcu_scan_en(tcu_scan_en), | |
1247 | .tlu_cerer_scac(tlu_cerer_scac), | |
1248 | .tlu_cerer_scau(tlu_cerer_scau), | |
1249 | .asi_sel_en(asi_sel_en), | |
1250 | .asi_rd_scp0(asi_rd_scp0), | |
1251 | .sed_syndrome(sed_syndrome[7:0]), | |
1252 | .scp0_ecc(scp0_ecc[7:0]), | |
1253 | .scp1_ecc(scp1_ecc[7:0]), | |
1254 | .sed_cecc_err(sed_cecc_err), | |
1255 | .sed_uecc_err(sed_uecc_err), | |
1256 | .sel_crit_ecc(sel_crit_ecc[7:0]), | |
1257 | .sel_scac(sel_scac), | |
1258 | .sel_scau(sel_scau) | |
1259 | ); | |
1260 | ||
1261 | mmu_sed_dp sed ( | |
1262 | .data_in ({{3 {1'b0}} , | |
1263 | asi_rd_data [63:0]}), | |
1264 | .ecc_in (sel_crit_ecc [7:0] ), | |
1265 | .syndrome (sed_syndrome [7:0] ), | |
1266 | .cecc_err (sed_cecc_err ), | |
1267 | .uecc_err (sed_uecc_err ) | |
1268 | ); | |
1269 | ||
1270 | n2_com_dp_32x72_cust scp0 ( | |
1271 | .tcu_aclk (spc_aclk ), | |
1272 | .tcu_bclk (spc_bclk ), | |
1273 | .scan_in(scp0_scanin), | |
1274 | .scan_out(scp0_scanout), | |
1275 | .rdclk (l2clk ), | |
1276 | .wrclk (l2clk ), | |
1277 | .rd_adr (asi_scp_addr [4:0] ), | |
1278 | .rd_en (asi_scp_rd_en [0 ] ), | |
1279 | .wr_adr (asi_scp_addr [4:0] ), | |
1280 | .wr_en (asi_scp_wr_en [0 ] ), | |
1281 | .din ({sem_ecc [7:0], | |
1282 | asi_wr_data [63:0]}), | |
1283 | .dout ({scp0_ecc [7:0], | |
1284 | scp0_data [63:0]}), | |
1285 | .tcu_pce_ov(tcu_pce_ov), | |
1286 | .tcu_array_wr_inhibit(tcu_array_wr_inhibit), | |
1287 | .tcu_se_scancollar_in(tcu_se_scancollar_in), | |
1288 | .bist_clk_mux_sel(bist_clk_mux_sel), | |
1289 | .rd_pce(rd_pce), | |
1290 | .wr_pce(wr_pce) | |
1291 | ); | |
1292 | ||
1293 | n2_com_dp_32x72_cust scp1 ( | |
1294 | .tcu_aclk (spc_aclk ), | |
1295 | .tcu_bclk (spc_bclk ), | |
1296 | .scan_in(scp1_scanin), | |
1297 | .scan_out(scp1_scanout), | |
1298 | .rdclk (l2clk ), | |
1299 | .wrclk (l2clk ), | |
1300 | .rd_adr (asi_scp_addr [4:0] ), | |
1301 | .rd_en (asi_scp_rd_en [1 ] ), | |
1302 | .wr_adr (asi_scp_addr [4:0] ), | |
1303 | .wr_en (asi_scp_wr_en [1 ] ), | |
1304 | .din ({sem_ecc [7:0], | |
1305 | asi_wr_data [63:0]}), | |
1306 | .dout ({scp1_ecc [7:0], | |
1307 | scp1_data [63:0]}), | |
1308 | .tcu_pce_ov(tcu_pce_ov), | |
1309 | .tcu_array_wr_inhibit(tcu_array_wr_inhibit), | |
1310 | .tcu_se_scancollar_in(tcu_se_scancollar_in), | |
1311 | .bist_clk_mux_sel(bist_clk_mux_sel), | |
1312 | .rd_pce(rd_pce), | |
1313 | .wr_pce(wr_pce) | |
1314 | ); | |
1315 | ||
1316 | mmu_htc_ctl htc ( // FS:wmr_protect | |
1317 | .wmr_scan_in(htc_wmr_scanin), | |
1318 | .wmr_scan_out(htc_wmr_scanout), | |
1319 | .scan_in(htc_scanin), | |
1320 | .scan_out(htc_scanout), | |
1321 | .l2clk(l2clk), | |
1322 | .mel0_parity_err (mel0_htc_parity_err), | |
1323 | .mel1_parity_err (mel1_htc_parity_err), | |
1324 | .mmu_reload_done (mmu_reload_done_unused [7:0] ), | |
1325 | .htc_thr0_err_type (mmu_thr0_err_type [2:0] ), | |
1326 | .htc_thr1_err_type (mmu_thr1_err_type [2:0] ), | |
1327 | .htc_thr2_err_type (mmu_thr2_err_type [2:0] ), | |
1328 | .htc_thr3_err_type (mmu_thr3_err_type [2:0] ), | |
1329 | .htc_thr4_err_type (mmu_thr4_err_type [2:0] ), | |
1330 | .htc_thr5_err_type (mmu_thr5_err_type [2:0] ), | |
1331 | .htc_thr6_err_type (mmu_thr6_err_type [2:0] ), | |
1332 | .htc_thr7_err_type (mmu_thr7_err_type [2:0] ), | |
1333 | .htc_thr0_err_index (mmu_thr0_err_index [2:0] ), | |
1334 | .htc_thr1_err_index (mmu_thr1_err_index [2:0] ), | |
1335 | .htc_thr2_err_index (mmu_thr2_err_index [2:0] ), | |
1336 | .htc_thr3_err_index (mmu_thr3_err_index [2:0] ), | |
1337 | .htc_thr4_err_index (mmu_thr4_err_index [2:0] ), | |
1338 | .htc_thr5_err_index (mmu_thr5_err_index [2:0] ), | |
1339 | .htc_thr6_err_index (mmu_thr6_err_index [2:0] ), | |
1340 | .htc_thr7_err_index (mmu_thr7_err_index [2:0] ), | |
1341 | .tcu_pce_ov(tcu_pce_ov), | |
1342 | .spc_aclk(spc_aclk), | |
1343 | .spc_bclk(spc_bclk), | |
1344 | .tcu_scan_en(tcu_scan_en), | |
1345 | .lsu_mmu_pmen(lsu_mmu_pmen), | |
1346 | .spc_core_running_status(spc_core_running_status[7:0]), | |
1347 | .l15_mmu_cpkt(l15_mmu_cpkt[17:0]), | |
1348 | .l15_mmu_valid(l15_mmu_valid), | |
1349 | .asi_tsb_ptr_req_valid(asi_tsb_ptr_req_valid), | |
1350 | .asi_tsb_ptr_req(asi_tsb_ptr_req[2:0]), | |
1351 | .asi_tsb_ptr_number(asi_tsb_ptr_number[1:0]), | |
1352 | .asd0_zero_context(asd0_zero_context), | |
1353 | .asd1_zero_context(asd1_zero_context), | |
1354 | .asi_wr_partition_id(asi_wr_partition_id[7:0]), | |
1355 | .asi_wr_data(asi_wr_data[2:0]), | |
1356 | .asi_hwtw_config_0(asi_hwtw_config_0[1:0]), | |
1357 | .asi_hwtw_config_1(asi_hwtw_config_1[1:0]), | |
1358 | .asi_hwtw_config_2(asi_hwtw_config_2[1:0]), | |
1359 | .asi_hwtw_config_3(asi_hwtw_config_3[1:0]), | |
1360 | .asi_hwtw_config_4(asi_hwtw_config_4[1:0]), | |
1361 | .asi_hwtw_config_5(asi_hwtw_config_5[1:0]), | |
1362 | .asi_hwtw_config_6(asi_hwtw_config_6[1:0]), | |
1363 | .asi_hwtw_config_7(asi_hwtw_config_7[1:0]), | |
1364 | .asi_tsb_hwtw_enable_0(asi_tsb_hwtw_enable_0[1:0]), | |
1365 | .asi_tsb_hwtw_enable_1(asi_tsb_hwtw_enable_1[1:0]), | |
1366 | .htd_ra2pa_lower_hit_hw4(htd_ra2pa_lower_hit_hw4), | |
1367 | .htd_ra2pa_upper_hit_hw4(htd_ra2pa_upper_hit_hw4), | |
1368 | .htd_razero_hw4(htd_razero_hw4), | |
1369 | .htd_range_en_hw4(htd_range_en_hw4), | |
1370 | .htd_zeroctx_m0(htd_zeroctx_m0[7:0]), | |
1371 | .htd_zeroctx_hw1(htd_zeroctx_hw1), | |
1372 | .htd_usectx0_hw1(htd_usectx0_hw1), | |
1373 | .htd_usectx1_hw1(htd_usectx1_hw1), | |
1374 | .htd_ranotpa_hw1(htd_ranotpa_hw1), | |
1375 | .htd_ptr_hit0_hw1(htd_ptr_hit0_hw1), | |
1376 | .htd_ptr_hit1_hw1(htd_ptr_hit1_hw1), | |
1377 | .htd_ptr_hit2_hw1(htd_ptr_hit2_hw1), | |
1378 | .htd_ctx_hit_hw1(htd_ctx_hit_hw1), | |
1379 | .htd_tte_ep_hw1(htd_tte_ep_hw1), | |
1380 | .htd_dmiss_hw1(htd_dmiss_hw1), | |
1381 | .htd_pred0_idx_m0(htd_pred0_idx_m0[5:0]), | |
1382 | .htd_pred1_idx_m0(htd_pred1_idx_m0[5:0]), | |
1383 | .htd_pred0_m0(htd_pred0_m0[15:0]), | |
1384 | .htd_pred1_m0(htd_pred1_m0[15:0]), | |
1385 | .htd_dmiss(htd_dmiss[7:0]), | |
1386 | .htd_sec_ctx(htd_sec_ctx[7:0]), | |
1387 | .tlu_iht_request(tlu_iht_request[7:0]), | |
1388 | .tlu_dht_request(tlu_dht_request[7:0]), | |
1389 | .l15_mmu_grant(l15_mmu_grant), | |
1390 | .asi_mra_req_grant(asi_mra_req_grant), | |
1391 | .tsm_rqv(tsm_rqv[7:0]), | |
1392 | .tsm_tsb_miss_hw2(tsm_tsb_miss_hw2[7:0]), | |
1393 | .trs_rqv(trs_rqv[7:0]), | |
1394 | .trs_null_st(trs_null_st[7:0]), | |
1395 | .trs_waitrr3_st(trs_waitrr3_st[7:0]), | |
1396 | .trs_ecc_err(trs_ecc_err[7:0]), | |
1397 | .trs_ep_err(trs_ep_err[7:0]), | |
1398 | .trs0_err_type(trs0_err_type[2:0]), | |
1399 | .trs1_err_type(trs1_err_type[2:0]), | |
1400 | .trs2_err_type(trs2_err_type[2:0]), | |
1401 | .trs3_err_type(trs3_err_type[2:0]), | |
1402 | .trs4_err_type(trs4_err_type[2:0]), | |
1403 | .trs5_err_type(trs5_err_type[2:0]), | |
1404 | .trs6_err_type(trs6_err_type[2:0]), | |
1405 | .trs7_err_type(trs7_err_type[2:0]), | |
1406 | .trs0_err_index(trs0_err_index[2:0]), | |
1407 | .trs1_err_index(trs1_err_index[2:0]), | |
1408 | .trs2_err_index(trs2_err_index[2:0]), | |
1409 | .trs3_err_index(trs3_err_index[2:0]), | |
1410 | .trs4_err_index(trs4_err_index[2:0]), | |
1411 | .trs5_err_index(trs5_err_index[2:0]), | |
1412 | .trs6_err_index(trs6_err_index[2:0]), | |
1413 | .trs7_err_index(trs7_err_index[2:0]), | |
1414 | .tlu_cerer_hwtwl2(tlu_cerer_hwtwl2), | |
1415 | .tlu_cerer_hwtwmu(tlu_cerer_hwtwmu), | |
1416 | .htc_core_running(htc_core_running[7:0]), | |
1417 | .htc_m1_clken(htc_m1_clken), | |
1418 | .htc_hw3_clken(htc_hw3_clken), | |
1419 | .htc_hw4_clken(htc_hw4_clken), | |
1420 | .mmu_i_unauth_access(mmu_i_unauth_access[7:0]), | |
1421 | .mmu_i_tsb_miss(mmu_i_tsb_miss[7:0]), | |
1422 | .mmu_d_tsb_miss(mmu_d_tsb_miss[7:0]), | |
1423 | .mmu_use_context_0(mmu_use_context_0), | |
1424 | .mmu_use_context_1(mmu_use_context_1), | |
1425 | .mmu_sec_context(mmu_sec_context), | |
1426 | .htc_mra_addr_in(htc_mra_addr_in[4:0]), | |
1427 | .htc_mra_rd_en(htc_mra_rd_en[1:0]), | |
1428 | .htc_wr_itlb_data_in(htc_wr_itlb_data_in[7:0]), | |
1429 | .htc_wr_dtlb_data_in(htc_wr_dtlb_data_in[7:0]), | |
1430 | .htc_dtlb_clken(htc_dtlb_clken[7:0]), | |
1431 | .htc_itlb_clken(htc_itlb_clken[7:0]), | |
1432 | .htc_zero_ctx_m2(htc_zero_ctx_m2), | |
1433 | .htc_upd_pred_idx_hw2(htc_upd_pred_idx_hw2[5:3]), | |
1434 | .htc_upd_grp(htc_upd_grp[7:0]), | |
1435 | .htc_upd_grp_x(htc_upd_grp_x[7:0]), | |
1436 | .htc_new_pred_bit(htc_new_pred_bit[1:0]), | |
1437 | .htc_wrpred0_hw2(htc_wrpred0_hw2), | |
1438 | .htc_wrpred1_hw2(htc_wrpred1_hw2), | |
1439 | .htc_wrpred2_hw2(htc_wrpred2_hw2), | |
1440 | .htc_wrpred3_hw2(htc_wrpred3_hw2), | |
1441 | .htc_tlb_miss_m(htc_tlb_miss_m[7:0]), | |
1442 | .mmu_l15_cpkt(mmu_l15_cpkt[4:0]), | |
1443 | .htc_l15_en(htc_l15_en), | |
1444 | .mmu_l15_valid(mmu_l15_valid), | |
1445 | .htc_wr_q0new_nogrant(htc_wr_q0new_nogrant), | |
1446 | .htc_wr_q0new_grant(htc_wr_q0new_grant), | |
1447 | .htc_wr_q1new(htc_wr_q1new), | |
1448 | .htc_shift_q1_grant(htc_shift_q1_grant), | |
1449 | .htc_wr_m3new(htc_wr_m3new), | |
1450 | .htc_wr_m3q0(htc_wr_m3q0), | |
1451 | .htc_mra_sel_0(htc_mra_sel_0), | |
1452 | .htc_sel_mra_lo(htc_sel_mra_lo), | |
1453 | .htc_conf_index_m2(htc_conf_index_m2[1:0]), | |
1454 | .htc_vld_tsbptr_m2(htc_vld_tsbptr_m2[7:0]), | |
1455 | .htc_rd_tteq(htc_rd_tteq[7:0]), | |
1456 | .htc_ra2pahit_hw5(htc_ra2pahit_hw5[7:0]), | |
1457 | .htc_ranotpax_hw5(htc_ranotpax_hw5[7:0]), | |
1458 | .htc_cindex_bit0(htc_cindex_bit0[7:0]), | |
1459 | .htc_cindex_bit1(htc_cindex_bit1[7:0]), | |
1460 | .htc_rrindex_bit0(htc_rrindex_bit0[7:0]), | |
1461 | .htc_rrindex_bit1(htc_rrindex_bit1[7:0]), | |
1462 | .htc_pid0_m0(htc_pid0_m0[2:0]), | |
1463 | .htc_pid1_m0(htc_pid1_m0[2:0]), | |
1464 | .htc_tsbrd_valid_m0(htc_tsbrd_valid_m0[7:0]), | |
1465 | .htc_thr_valid_hw3(htc_thr_valid_hw3[7:0]), | |
1466 | .htc_thr_prevalid_hw3(htc_thr_prevalid_hw3[7:0]), | |
1467 | .htc_va_rd_m2_in(htc_va_rd_m2_in[7:0]), | |
1468 | .htc_ranotpa_hw4(htc_ranotpa_hw4), | |
1469 | .htc_data_rcvd_hw1(htc_data_rcvd_hw1[7:0]), | |
1470 | .htc_tsb_hit_hw1(htc_tsb_hit_hw1[7:0]), | |
1471 | .htc_tsb_done_hw2(htc_tsb_done_hw2[7:0]), | |
1472 | .htc_thr_valid_m1(htc_thr_valid_m1[7:0]), | |
1473 | .htc_thr_valid_m0(htc_thr_valid_m0[7:0]), | |
1474 | .htc_hwtw_burst(htc_hwtw_burst[7:0]), | |
1475 | .mmu_i_tte_outofrange(mmu_i_tte_outofrange[7:0]), | |
1476 | .mmu_d_tte_outofrange(mmu_d_tte_outofrange[7:0]), | |
1477 | .rr_ecc_err_type(rr_ecc_err_type[1:0]), | |
1478 | .cfg_ecc_err_type(cfg_ecc_err_type[1:0]), | |
1479 | .l2_ecc_err_type(l2_ecc_err_type[1:0]), | |
1480 | .rr_ecc_err_hw5(rr_ecc_err_hw5[7:0]), | |
1481 | .cfg_ecc_err_m3(cfg_ecc_err_m3[7:0]), | |
1482 | .l2_ecc_err_hw1(l2_ecc_err_hw1[7:0]), | |
1483 | .htc_ep_miss_hw1(htc_ep_miss_hw1[7:0]), | |
1484 | .cfg_ecc_err_index(cfg_ecc_err_index[2:0]), | |
1485 | .rr_ecc_err_index(rr_ecc_err_index[2:0]), | |
1486 | .mmu_i_eccerr(mmu_i_eccerr[7:0]), | |
1487 | .mmu_d_eccerr(mmu_d_eccerr[7:0]), | |
1488 | .mmu_i_l2cerr(mmu_i_l2cerr[7:0]), | |
1489 | .mmu_d_l2cerr(mmu_d_l2cerr[7:0]), | |
1490 | .mmu_pmu_l2ret(mmu_pmu_l2ret), | |
1491 | .mmu_pmu_l2miss(mmu_pmu_l2miss), | |
1492 | .mmu_pmu_dtlb(mmu_pmu_dtlb), | |
1493 | .mmu_pmu_tid(mmu_pmu_tid[2:0]), | |
1494 | .spc_aclk_wmr(spc_aclk_wmr) | |
1495 | ); | |
1496 | ||
1497 | mmu_htd_dp htd ( | |
1498 | .scan_in(htd_scanin), | |
1499 | .scan_out(htd_scanout), | |
1500 | .l2clk(l2clk), | |
1501 | .asi_data_in_real(1'b0), | |
1502 | .tlu_pc_0_w(asd_pc_0_w[47:13]), | |
1503 | .tlu_pc_1_w(asd_pc_1_w[47:13]), | |
1504 | .tcu_pce_ov(tcu_pce_ov), | |
1505 | .spc_aclk(spc_aclk), | |
1506 | .spc_bclk(spc_bclk), | |
1507 | .tcu_scan_en(tcu_scan_en), | |
1508 | .tcu_muxtest(tcu_muxtest), | |
1509 | .tcu_dectest(tcu_dectest), | |
1510 | .htc_core_running(htc_core_running[7:0]), | |
1511 | .htc_m1_clken(htc_m1_clken), | |
1512 | .htc_hw3_clken(htc_hw3_clken), | |
1513 | .htc_hw4_clken(htc_hw4_clken), | |
1514 | .asd0_tag_access(asd0_tag_access[47:0]), | |
1515 | .asd1_tag_access(asd1_tag_access[47:0]), | |
1516 | .htc_tsbrd_valid_m0(htc_tsbrd_valid_m0[7:0]), | |
1517 | .ase_lsu_va_w(ase_lsu_va_w[47:13]), | |
1518 | .lsu_context_b(lsu_context_b[12:0]), | |
1519 | .lsu_tlu_dsfsr_ct_b(lsu_tlu_dsfsr_ct_b[1:0]), | |
1520 | .l15_spc_data1(l15_spc_data1[127:0]), | |
1521 | .l15_mmu_cpkt(l15_mmu_cpkt[8:3]), | |
1522 | .l15_mmu_grant(l15_mmu_grant), | |
1523 | .htc_zero_ctx_m2(htc_zero_ctx_m2), | |
1524 | .htc_ranotpa_hw4(htc_ranotpa_hw4), | |
1525 | .htc_pid0_m0(htc_pid0_m0[2:0]), | |
1526 | .htc_pid1_m0(htc_pid1_m0[2:0]), | |
1527 | .htc_thr_prevalid_hw3(htc_thr_prevalid_hw3[7:0]), | |
1528 | .htc_va_rd_m2_in(htc_va_rd_m2_in[7:0]), | |
1529 | .htc_l15_en(htc_l15_en), | |
1530 | .htc_vld_tsbptr_m2(htc_vld_tsbptr_m2[7:0]), | |
1531 | .trs_null_st(trs_null_st[7:0]), | |
1532 | .htc_mra_sel_0(htc_mra_sel_0), | |
1533 | .htc_sel_mra_lo(htc_sel_mra_lo), | |
1534 | .mra0_data(mra0_data[81:0]), | |
1535 | .mra1_data(mra1_data[81:0]), | |
1536 | .htc_conf_index_m2(htc_conf_index_m2[1:0]), | |
1537 | .htc_upd_pred_idx_hw2(htc_upd_pred_idx_hw2[5:3]), | |
1538 | .htc_upd_grp(htc_upd_grp[7:0]), | |
1539 | .htc_upd_grp_x(htc_upd_grp_x[7:0]), | |
1540 | .htc_new_pred_bit(htc_new_pred_bit[1:0]), | |
1541 | .htc_wrpred0_hw2(htc_wrpred0_hw2), | |
1542 | .htc_wrpred1_hw2(htc_wrpred1_hw2), | |
1543 | .htc_wrpred2_hw2(htc_wrpred2_hw2), | |
1544 | .htc_wrpred3_hw2(htc_wrpred3_hw2), | |
1545 | .htc_wr_q0new_nogrant(htc_wr_q0new_nogrant), | |
1546 | .htc_wr_q0new_grant(htc_wr_q0new_grant), | |
1547 | .htc_wr_q1new(htc_wr_q1new), | |
1548 | .htc_shift_q1_grant(htc_shift_q1_grant), | |
1549 | .htc_wr_m3new(htc_wr_m3new), | |
1550 | .htc_wr_m3q0(htc_wr_m3q0), | |
1551 | .htc_rd_tteq(htc_rd_tteq[7:0]), | |
1552 | .tlu_iht_request(tlu_iht_request[7:0]), | |
1553 | .tlu_dht_request(tlu_dht_request[7:0]), | |
1554 | .tlu_mmu_tl_gt_0(tlu_mmu_tl_gt_0[7:0]), | |
1555 | .asd_i_p_ctx_0_0(asd_i_p_ctx_0_0[12:0]), | |
1556 | .asd_i_p_ctx_0_1(asd_i_p_ctx_0_1[12:0]), | |
1557 | .asd_i_p_ctx_0_2(asd_i_p_ctx_0_2[12:0]), | |
1558 | .asd_i_p_ctx_0_3(asd_i_p_ctx_0_3[12:0]), | |
1559 | .asd_i_p_ctx_0_4(asd_i_p_ctx_0_4[12:0]), | |
1560 | .asd_i_p_ctx_0_5(asd_i_p_ctx_0_5[12:0]), | |
1561 | .asd_i_p_ctx_0_6(asd_i_p_ctx_0_6[12:0]), | |
1562 | .asd_i_p_ctx_0_7(asd_i_p_ctx_0_7[12:0]), | |
1563 | .htd_range_en_hw4(htd_range_en_hw4), | |
1564 | .htd_zeroctx_hw1(htd_zeroctx_hw1), | |
1565 | .htd_usectx0_hw1(htd_usectx0_hw1), | |
1566 | .htd_usectx1_hw1(htd_usectx1_hw1), | |
1567 | .htd_ranotpa_hw1(htd_ranotpa_hw1), | |
1568 | .htd_ptr_hit0_hw1(htd_ptr_hit0_hw1), | |
1569 | .htd_ptr_hit1_hw1(htd_ptr_hit1_hw1), | |
1570 | .htd_ptr_hit2_hw1(htd_ptr_hit2_hw1), | |
1571 | .htd_ctx_hit_hw1(htd_ctx_hit_hw1), | |
1572 | .htd_tte_ep_hw1(htd_tte_ep_hw1), | |
1573 | .htd_dmiss_hw1(htd_dmiss_hw1), | |
1574 | .htd_ra2pa_lower_hit_hw4(htd_ra2pa_lower_hit_hw4), | |
1575 | .htd_ra2pa_upper_hit_hw4(htd_ra2pa_upper_hit_hw4), | |
1576 | .htd_razero_hw4(htd_razero_hw4), | |
1577 | .htd_tagaccess_din(htd_tagaccess_din[47:0]), | |
1578 | .htd_tlbdatain_din(htd_tlbdatain_din[38:0]), | |
1579 | .mmu_l15_addr(mmu_l15_addr[39:4]), | |
1580 | .htd_dmiss(htd_dmiss[7:0]), | |
1581 | .htd_sec_ctx(htd_sec_ctx[7:0]), | |
1582 | .htd_pred0_idx_m0(htd_pred0_idx_m0[5:0]), | |
1583 | .htd_pred1_idx_m0(htd_pred1_idx_m0[5:0]), | |
1584 | .htd_pred0_m0(htd_pred0_m0[15:0]), | |
1585 | .htd_pred1_m0(htd_pred1_m0[15:0]), | |
1586 | .htd_tsbptr(htd_tsbptr[39:4]), | |
1587 | .htd_zeroctx_m0(htd_zeroctx_m0[7:0]) | |
1588 | ); | |
1589 | ||
1590 | mmu_tmc_ctl tmc ( | |
1591 | .scan_in(tmc_scanin), | |
1592 | .scan_out(tmc_scanout), | |
1593 | .l2clk(l2clk), | |
1594 | .tcu_pce_ov(tcu_pce_ov), | |
1595 | .spc_aclk(spc_aclk), | |
1596 | .spc_bclk(spc_bclk), | |
1597 | .tcu_scan_en(tcu_scan_en), | |
1598 | .htc_data_rcvd_hw1(htc_data_rcvd_hw1[7:0]), | |
1599 | .htc_tlb_miss_m(htc_tlb_miss_m[7:0]), | |
1600 | .htc_tsb_done_hw2(htc_tsb_done_hw2[7:0]), | |
1601 | .htc_vld_tsbptr_m2(htc_vld_tsbptr_m2[7:0]), | |
1602 | .htc_thr_valid_m1(htc_thr_valid_m1[7:0]), | |
1603 | .htc_thr_valid_m0(htc_thr_valid_m0[7:0]), | |
1604 | .htc_hwtw_burst(htc_hwtw_burst[7:0]), | |
1605 | .htc_cindex_bit0(htc_cindex_bit0[7:0]), | |
1606 | .htc_cindex_bit1(htc_cindex_bit1[7:0]), | |
1607 | .trs_eperr_st(trs_eperr_st[7:0]), | |
1608 | .trs_eccerr_st(trs_eccerr_st[7:0]), | |
1609 | .tsm_tsb_miss_hw2(tsm_tsb_miss_hw2[7:0]), | |
1610 | .tsm_rqv(tsm_rqv[7:0]), | |
1611 | .tsm_waitfortte(tsm_waitfortte[7:0]) | |
1612 | ); | |
1613 | ||
1614 | mmu_trc_ctl trc ( | |
1615 | .scan_in(trc_scanin), | |
1616 | .scan_out(trc_scanout), | |
1617 | .l2clk(l2clk), | |
1618 | .tcu_pce_ov(tcu_pce_ov), | |
1619 | .spc_aclk(spc_aclk), | |
1620 | .spc_bclk(spc_bclk), | |
1621 | .tcu_scan_en(tcu_scan_en), | |
1622 | .htc_tsb_hit_hw1(htc_tsb_hit_hw1[7:0]), | |
1623 | .htc_thr_valid_hw3(htc_thr_valid_hw3[7:0]), | |
1624 | .htc_ra2pahit_hw5(htc_ra2pahit_hw5[7:0]), | |
1625 | .htc_ranotpax_hw5(htc_ranotpax_hw5[7:0]), | |
1626 | .tsm_waitfortte(tsm_waitfortte[7:0]), | |
1627 | .htc_ep_miss_hw1(htc_ep_miss_hw1[7:0]), | |
1628 | .htc_rrindex_bit0(htc_rrindex_bit0[7:0]), | |
1629 | .htc_rrindex_bit1(htc_rrindex_bit1[7:0]), | |
1630 | .l2_ecc_err_hw1(l2_ecc_err_hw1[7:0]), | |
1631 | .cfg_ecc_err_m3(cfg_ecc_err_m3[7:0]), | |
1632 | .rr_ecc_err_hw5(rr_ecc_err_hw5[7:0]), | |
1633 | .l2_ecc_err_type(l2_ecc_err_type[1:0]), | |
1634 | .cfg_ecc_err_type(cfg_ecc_err_type[1:0]), | |
1635 | .rr_ecc_err_type(rr_ecc_err_type[1:0]), | |
1636 | .cfg_ecc_err_index(cfg_ecc_err_index[2:0]), | |
1637 | .rr_ecc_err_index(rr_ecc_err_index[2:0]), | |
1638 | .trs_rqv(trs_rqv[7:0]), | |
1639 | .trs_null_st(trs_null_st[7:0]), | |
1640 | .trs_waitrr3_st(trs_waitrr3_st[7:0]), | |
1641 | .trs_ep_err(trs_ep_err[7:0]), | |
1642 | .trs_ecc_err(trs_ecc_err[7:0]), | |
1643 | .trs0_err_type(trs0_err_type[2:0]), | |
1644 | .trs1_err_type(trs1_err_type[2:0]), | |
1645 | .trs2_err_type(trs2_err_type[2:0]), | |
1646 | .trs3_err_type(trs3_err_type[2:0]), | |
1647 | .trs4_err_type(trs4_err_type[2:0]), | |
1648 | .trs5_err_type(trs5_err_type[2:0]), | |
1649 | .trs6_err_type(trs6_err_type[2:0]), | |
1650 | .trs7_err_type(trs7_err_type[2:0]), | |
1651 | .trs0_err_index(trs0_err_index[2:0]), | |
1652 | .trs1_err_index(trs1_err_index[2:0]), | |
1653 | .trs2_err_index(trs2_err_index[2:0]), | |
1654 | .trs3_err_index(trs3_err_index[2:0]), | |
1655 | .trs4_err_index(trs4_err_index[2:0]), | |
1656 | .trs5_err_index(trs5_err_index[2:0]), | |
1657 | .trs6_err_index(trs6_err_index[2:0]), | |
1658 | .trs7_err_index(trs7_err_index[2:0]), | |
1659 | .trs_eccerr_st(trs_eccerr_st[7:0]), | |
1660 | .trs_eperr_st(trs_eperr_st[7:0]) | |
1661 | ); | |
1662 | ||
1663 | ||
1664 | ||
1665 | ////////////////////////////////////////////////////////////////////////////// | |
1666 | // MBIST datapath | |
1667 | mmu_mbd_dp mbd( | |
1668 | .asi_mbd_scp_data(asi_mbd_scp_data[31:0]), | |
1669 | .asi_compare_data(asi_compare_data[7:0]), | |
1670 | .asi_mbd_sel_scp(asi_mbd_sel_scp), | |
1671 | .ase_mbd_mbist_data(ase_mbd_mbist_data[31:0]), | |
1672 | .mbd_compare(mbd_compare)); | |
1673 | ||
1674 | ||
1675 | //////////////////////////////////////////////////////////////////////////////// | |
1676 | // Scan patch panel | |
1677 | // fixscan start: | |
1678 | assign asi_scanin = scan_in ; | |
1679 | assign asd0_scanin = asi_scanout ; | |
1680 | assign asd1_scanin = asd0_scanout ; | |
1681 | assign ase_scanin = asd1_scanout ; | |
1682 | assign mel0_scanin = ase_scanout ; | |
1683 | assign mra0_scanin = mel0_scanout ; | |
1684 | assign mel1_scanin = mra0_scanout ; | |
1685 | assign mra1_scanin = mel1_scanout ; | |
1686 | assign sel_scanin = mra1_scanout ; | |
1687 | assign scp0_scanin = sel_scanout ; | |
1688 | assign scp1_scanin = scp0_scanout ; | |
1689 | assign htc_scanin = scp1_scanout ; | |
1690 | assign htd_scanin = htc_scanout ; | |
1691 | assign tmc_scanin = htd_scanout ; | |
1692 | assign trc_scanin = tmc_scanout ; | |
1693 | assign scan_out = trc_scanout ; | |
1694 | ||
1695 | assign asi_wmr_scanin = wmr_scan_in ; | |
1696 | assign asd0_wmr_scanin = asi_wmr_scanout ; | |
1697 | assign asd1_wmr_scanin = asd0_wmr_scanout ; | |
1698 | assign htc_wmr_scanin = asd1_wmr_scanout ; | |
1699 | assign wmr_scan_out = htc_wmr_scanout ; | |
1700 | // fixscan end: | |
1701 | endmodule | |
1702 |