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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: n2_clk_clkchp_4sel_32x_cust.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module n2_clk_clkchp_4sel_32x_cust (tck, aclk, bclk, s500, s1000, s1500, s2000); | |
36 | input tck, s500, s1000, s1500, s2000; | |
37 | output aclk, bclk; | |
38 | ||
39 | // synopsys translate_off | |
40 | ||
41 | reg aclk, bclk; | |
42 | ||
43 | initial | |
44 | begin | |
45 | aclk=1'b0; | |
46 | bclk=1'b0; | |
47 | end | |
48 | always@(posedge tck) | |
49 | begin | |
50 | bclk=1'b0; | |
51 | #1 if(tck==1) aclk=1'b1; | |
52 | #1 if(s500==1) aclk=1'b0; | |
53 | #1 if(s1000==1) aclk=1'b0; | |
54 | #1 if(s1500==1) aclk=1'b0; | |
55 | #1 if(s2000==1) aclk=1'b0; | |
56 | end | |
57 | always@(negedge tck) | |
58 | begin | |
59 | #1 if(tck==0 && aclk==0) bclk=1'b1; | |
60 | #1 if(s500==1) bclk=1'b0; | |
61 | #1 if(s1000==1) bclk=1'b0; | |
62 | #1 if(s1500==1) bclk=1'b0; | |
63 | #1 if(s2000==1) bclk=1'b0; | |
64 | end | |
65 | ||
66 | // synopsys translate_on | |
67 | ||
68 | endmodule |