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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / libs / n2sram / dp / n2_l2t_dp_16x160_cust_l / n2_l2t_dp_16x160_cust / rtl / n2_l2t_dp_16x160_cust.v
CommitLineData
86530b38
AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: n2_l2t_dp_16x160_cust.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35module n2_l2t_dp_16x160_cust (
36 din,
37 rd_adr,
38 wr_adr,
39 read_en,
40 wr_en,
41 word_wen,
42 byte_wen,
43 l2clk,
44 tcu_pce_ov,
45 pce,
46 tcu_aclk,
47 tcu_bclk,
48 tcu_scan_en,
49 scan_in,
50 tcu_se_scancollar_in,
51 tcu_array_wr_inhibit,
52 mbist_wdata,
53 mbist_run,
54 dout,
55 scan_out);
56wire siclk;
57wire soclk;
58wire stop;
59wire pce_ov;
60wire l1clk;
61wire l1clk_mem;
62wire ff_wdata_79_scanin;
63wire ff_wdata_79_scanout;
64wire [159:0] wrdata_d1;
65wire ff_wdata_78_scanin;
66wire ff_wdata_78_scanout;
67wire ff_wdata_77_scanin;
68wire ff_wdata_77_scanout;
69wire ff_wdata_76_scanin;
70wire ff_wdata_76_scanout;
71wire ff_wdata_75_scanin;
72wire ff_wdata_75_scanout;
73wire ff_wdata_74_scanin;
74wire ff_wdata_74_scanout;
75wire ff_wdata_73_scanin;
76wire ff_wdata_73_scanout;
77wire ff_wdata_72_scanin;
78wire ff_wdata_72_scanout;
79wire ff_wdata_71_scanin;
80wire ff_wdata_71_scanout;
81wire ff_wdata_70_scanin;
82wire ff_wdata_70_scanout;
83wire ff_wdata_69_scanin;
84wire ff_wdata_69_scanout;
85wire ff_wdata_68_scanin;
86wire ff_wdata_68_scanout;
87wire ff_wdata_67_scanin;
88wire ff_wdata_67_scanout;
89wire ff_wdata_66_scanin;
90wire ff_wdata_66_scanout;
91wire ff_wdata_65_scanin;
92wire ff_wdata_65_scanout;
93wire ff_wdata_64_scanin;
94wire ff_wdata_64_scanout;
95wire ff_wdata_63_scanin;
96wire ff_wdata_63_scanout;
97wire ff_wdata_62_scanin;
98wire ff_wdata_62_scanout;
99wire ff_wdata_61_scanin;
100wire ff_wdata_61_scanout;
101wire ff_wdata_60_scanin;
102wire ff_wdata_60_scanout;
103wire ff_wdata_59_scanin;
104wire ff_wdata_59_scanout;
105wire ff_wdata_58_scanin;
106wire ff_wdata_58_scanout;
107wire ff_wdata_57_scanin;
108wire ff_wdata_57_scanout;
109wire ff_wdata_56_scanin;
110wire ff_wdata_56_scanout;
111wire ff_wdata_55_scanin;
112wire ff_wdata_55_scanout;
113wire ff_wdata_54_scanin;
114wire ff_wdata_54_scanout;
115wire ff_wdata_53_scanin;
116wire ff_wdata_53_scanout;
117wire ff_wdata_52_scanin;
118wire ff_wdata_52_scanout;
119wire ff_wdata_51_scanin;
120wire ff_wdata_51_scanout;
121wire ff_wdata_50_scanin;
122wire ff_wdata_50_scanout;
123wire ff_wdata_49_scanin;
124wire ff_wdata_49_scanout;
125wire ff_wdata_48_scanin;
126wire ff_wdata_48_scanout;
127wire ff_wdata_47_scanin;
128wire ff_wdata_47_scanout;
129wire ff_wdata_46_scanin;
130wire ff_wdata_46_scanout;
131wire ff_wdata_45_scanin;
132wire ff_wdata_45_scanout;
133wire ff_wdata_44_scanin;
134wire ff_wdata_44_scanout;
135wire ff_wdata_43_scanin;
136wire ff_wdata_43_scanout;
137wire ff_wdata_42_scanin;
138wire ff_wdata_42_scanout;
139wire ff_wdata_41_scanin;
140wire ff_wdata_41_scanout;
141wire ff_wdata_40_scanin;
142wire ff_wdata_40_scanout;
143wire ff_wdata_39_scanin;
144wire ff_wdata_39_scanout;
145wire ff_wdata_38_scanin;
146wire ff_wdata_38_scanout;
147wire ff_wdata_37_scanin;
148wire ff_wdata_37_scanout;
149wire ff_wdata_36_scanin;
150wire ff_wdata_36_scanout;
151wire ff_wdata_35_scanin;
152wire ff_wdata_35_scanout;
153wire ff_wdata_34_scanin;
154wire ff_wdata_34_scanout;
155wire ff_wdata_33_scanin;
156wire ff_wdata_33_scanout;
157wire ff_wdata_32_scanin;
158wire ff_wdata_32_scanout;
159wire ff_wdata_31_scanin;
160wire ff_wdata_31_scanout;
161wire ff_wdata_30_scanin;
162wire ff_wdata_30_scanout;
163wire ff_wdata_29_scanin;
164wire ff_wdata_29_scanout;
165wire ff_wdata_28_scanin;
166wire ff_wdata_28_scanout;
167wire ff_wdata_27_scanin;
168wire ff_wdata_27_scanout;
169wire ff_wdata_26_scanin;
170wire ff_wdata_26_scanout;
171wire ff_wdata_25_scanin;
172wire ff_wdata_25_scanout;
173wire ff_wdata_24_scanin;
174wire ff_wdata_24_scanout;
175wire ff_wdata_23_scanin;
176wire ff_wdata_23_scanout;
177wire ff_wdata_22_scanin;
178wire ff_wdata_22_scanout;
179wire ff_wdata_21_scanin;
180wire ff_wdata_21_scanout;
181wire ff_wdata_20_scanin;
182wire ff_wdata_20_scanout;
183wire ff_wdata_19_scanin;
184wire ff_wdata_19_scanout;
185wire ff_wdata_18_scanin;
186wire ff_wdata_18_scanout;
187wire ff_wdata_17_scanin;
188wire ff_wdata_17_scanout;
189wire ff_wdata_16_scanin;
190wire ff_wdata_16_scanout;
191wire ff_wdata_15_scanin;
192wire ff_wdata_15_scanout;
193wire ff_wdata_14_scanin;
194wire ff_wdata_14_scanout;
195wire ff_wdata_13_scanin;
196wire ff_wdata_13_scanout;
197wire ff_wdata_12_scanin;
198wire ff_wdata_12_scanout;
199wire ff_wdata_11_scanin;
200wire ff_wdata_11_scanout;
201wire ff_wdata_10_scanin;
202wire ff_wdata_10_scanout;
203wire ff_wdata_9_scanin;
204wire ff_wdata_9_scanout;
205wire ff_wdata_8_scanin;
206wire ff_wdata_8_scanout;
207wire ff_wdata_7_scanin;
208wire ff_wdata_7_scanout;
209wire ff_wdata_6_scanin;
210wire ff_wdata_6_scanout;
211wire ff_wdata_5_scanin;
212wire ff_wdata_5_scanout;
213wire ff_wdata_4_scanin;
214wire ff_wdata_4_scanout;
215wire ff_wdata_3_scanin;
216wire ff_wdata_3_scanout;
217wire ff_wdata_2_scanin;
218wire ff_wdata_2_scanout;
219wire ff_wdata_1_scanin;
220wire ff_wdata_1_scanout;
221wire ff_wdata_0_scanin;
222wire ff_wdata_0_scanout;
223wire ff_word_wen_scanin;
224wire ff_word_wen_scanout;
225wire [3:0] word_wen_d1;
226wire ff_byte_wen_scanin;
227wire ff_byte_wen_scanout;
228wire [19:0] byte_wen_d1;
229wire ff_mbist_wdata_scanin;
230wire ff_mbist_wdata_scanout;
231wire [7:0] mbist_wdata_d1;
232wire ff_mbist_run_scanin;
233wire ff_mbist_run_scanout;
234wire mbist_run_d1;
235wire ff_wr_adr_scanin;
236wire ff_wr_adr_scanout;
237wire [3:0] wrptr_d1;
238wire ff_wr_en_scanin;
239wire ff_wr_en_scanout;
240wire wr_en_d1;
241wire collusion_n;
242wire collusion;
243wire read_en_qualed;
244wire ff_read_enable_scanin;
245wire ff_read_enable_scanout;
246wire ff_read_enable0_unused;
247wire ff_read_enable1_unused;
248wire ff_read_enable2_unused;
249wire ren_d1;
250wire ff_read_addr_scanin;
251wire ff_read_addr_scanout;
252wire [3:0] ff_read_addr0_unused;
253wire [3:0] ff_read_addr1_unused;
254wire [3:0] rd_ptr_d1;
255wire [3:0] ff_read_addr2_unused;
256wire mbist_run_d1_n;
257wire [159:0] data_input;
258
259
260input [159:0] din; // data input
261input [3:0] rd_adr; // read addr
262input [3:0] wr_adr; // write addr
263input read_en; // read enable
264input wr_en; // used in conjunction with
265 // word_wen and byte_wen
266input [3:0] word_wen; // word enables ( if you don't use these
267 // tie them to Vdd )
268input [19:0] byte_wen; // byte enables ( if you don't use these
269 // tie them to Vdd )
270input l2clk;
271input tcu_pce_ov;
272input pce;
273input tcu_aclk;
274input tcu_bclk;
275input tcu_scan_en;
276input scan_in;
277input tcu_se_scancollar_in; // hold scan in data.
278input tcu_array_wr_inhibit; // wr_inhibit
279
280input [7:0] mbist_wdata;
281input mbist_run;
282
283output [159:0] dout;
284output scan_out;
285
286
287// synopsys translate_off
288
289wire [159:0] dout_array;
290
291// scan chain connections ////
292assign siclk = tcu_aclk;
293assign soclk = tcu_bclk;
294assign stop = 1'b0;
295assign pce_ov = tcu_pce_ov;
296//// Input Flops /////
297
298n2_l2t_dp_16x160_cust_l1clkhdr_ctl_macro clkgen_clk_en
299 (
300 .l2clk (l2clk ),
301 .l1en (pce ),
302 .pce_ov (pce_ov ),
303 .stop (stop ),
304 .se (tcu_se_scancollar_in),
305 .l1clk (l1clk )
306 );
307
308n2_l2t_dp_16x160_cust_l1clkhdr_ctl_macro clkgen_clk_en0
309 (
310 .l2clk (l2clk ),
311 .l1en (pce ),
312 .pce_ov (pce_ov ),
313 .stop (stop ),
314 .se (tcu_scan_en),
315 .l1clk (l1clk_mem )
316 );
317
318
319// msff_ctl_macro ff_wdata_2 (width = 32)
320// (
321// .scan_in(ff_wdata_2_scanin),
322// .scan_out(ff_wdata_2_scanout),
323// .l1clk (l1clk),
324// .din (din[159:128]),
325// .dout (wrdata_d1[159:128])
326// );
327// msff_ctl_macro ff_wdata_1 (width = 64)
328// (
329// .scan_in(ff_wdata_1_scanin),
330// .scan_out(ff_wdata_1_scanout),
331// .l1clk (l1clk),
332// .din (din[127:64]),
333// .dout (wrdata_d1[127:64])
334// );
335//
336// msff_ctl_macro ff_wdata_0 (width = 64)
337// (
338// .scan_in(ff_wdata_0_scanin),
339// .scan_out(ff_wdata_0_scanout),
340// .l1clk (l1clk),
341// .din (din[63:0]),
342// .dout (wrdata_d1[63:0])
343// );
344
345
346n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_79
347(
348.scan_in(ff_wdata_79_scanin),
349.scan_out(ff_wdata_79_scanout),
350.l1clk (l1clk),
351.din (din[159:158]),
352.dout (wrdata_d1[159:158]),
353 .siclk(siclk),
354 .soclk(soclk)
355 );
356n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_78
357(
358.scan_in(ff_wdata_78_scanin),
359.scan_out(ff_wdata_78_scanout),
360.l1clk (l1clk),
361.din (din[157:156]),
362.dout (wrdata_d1[157:156]),
363 .siclk(siclk),
364 .soclk(soclk)
365 );
366n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_77
367(
368.scan_in(ff_wdata_77_scanin),
369.scan_out(ff_wdata_77_scanout),
370.l1clk (l1clk),
371.din (din[155:154]),
372.dout (wrdata_d1[155:154]),
373 .siclk(siclk),
374 .soclk(soclk)
375 );
376n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_76
377(
378.scan_in(ff_wdata_76_scanin),
379.scan_out(ff_wdata_76_scanout),
380.l1clk (l1clk),
381.din (din[153:152]),
382.dout (wrdata_d1[153:152]),
383 .siclk(siclk),
384 .soclk(soclk)
385 );
386n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_75
387(
388.scan_in(ff_wdata_75_scanin),
389.scan_out(ff_wdata_75_scanout),
390.l1clk (l1clk),
391.din (din[151:150]),
392.dout (wrdata_d1[151:150]),
393 .siclk(siclk),
394 .soclk(soclk)
395 );
396n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_74
397(
398.scan_in(ff_wdata_74_scanin),
399.scan_out(ff_wdata_74_scanout),
400.l1clk (l1clk),
401.din (din[149:148]),
402.dout (wrdata_d1[149:148]),
403 .siclk(siclk),
404 .soclk(soclk)
405 );
406n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_73
407(
408.scan_in(ff_wdata_73_scanin),
409.scan_out(ff_wdata_73_scanout),
410.l1clk (l1clk),
411.din (din[147:146]),
412.dout (wrdata_d1[147:146]),
413 .siclk(siclk),
414 .soclk(soclk)
415 );
416n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_72
417(
418.scan_in(ff_wdata_72_scanin),
419.scan_out(ff_wdata_72_scanout),
420.l1clk (l1clk),
421.din (din[145:144]),
422.dout (wrdata_d1[145:144]),
423 .siclk(siclk),
424 .soclk(soclk)
425 );
426n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_71
427(
428.scan_in(ff_wdata_71_scanin),
429.scan_out(ff_wdata_71_scanout),
430.l1clk (l1clk),
431.din (din[143:142]),
432.dout (wrdata_d1[143:142]),
433 .siclk(siclk),
434 .soclk(soclk)
435 );
436n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_70
437(
438.scan_in(ff_wdata_70_scanin),
439.scan_out(ff_wdata_70_scanout),
440.l1clk (l1clk),
441.din (din[141:140]),
442.dout (wrdata_d1[141:140]),
443 .siclk(siclk),
444 .soclk(soclk)
445 );
446n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_69
447(
448.scan_in(ff_wdata_69_scanin),
449.scan_out(ff_wdata_69_scanout),
450.l1clk (l1clk),
451.din (din[139:138]),
452.dout (wrdata_d1[139:138]),
453 .siclk(siclk),
454 .soclk(soclk)
455 );
456n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_68
457(
458.scan_in(ff_wdata_68_scanin),
459.scan_out(ff_wdata_68_scanout),
460.l1clk (l1clk),
461.din (din[137:136]),
462.dout (wrdata_d1[137:136]),
463 .siclk(siclk),
464 .soclk(soclk)
465 );
466n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_67
467(
468.scan_in(ff_wdata_67_scanin),
469.scan_out(ff_wdata_67_scanout),
470.l1clk (l1clk),
471.din (din[135:134]),
472.dout (wrdata_d1[135:134]),
473 .siclk(siclk),
474 .soclk(soclk)
475 );
476n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_66
477(
478.scan_in(ff_wdata_66_scanin),
479.scan_out(ff_wdata_66_scanout),
480.l1clk (l1clk),
481.din (din[133:132]),
482.dout (wrdata_d1[133:132]),
483 .siclk(siclk),
484 .soclk(soclk)
485 );
486n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_65
487(
488.scan_in(ff_wdata_65_scanin),
489.scan_out(ff_wdata_65_scanout),
490.l1clk (l1clk),
491.din (din[131:130]),
492.dout (wrdata_d1[131:130]),
493 .siclk(siclk),
494 .soclk(soclk)
495 );
496n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_64
497(
498.scan_in(ff_wdata_64_scanin),
499.scan_out(ff_wdata_64_scanout),
500.l1clk (l1clk),
501.din (din[129:128]),
502.dout (wrdata_d1[129:128]),
503 .siclk(siclk),
504 .soclk(soclk)
505 );
506n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_63
507(
508.scan_in(ff_wdata_63_scanin),
509.scan_out(ff_wdata_63_scanout),
510.l1clk (l1clk),
511.din (din[127:126]),
512.dout (wrdata_d1[127:126]),
513 .siclk(siclk),
514 .soclk(soclk)
515 );
516n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_62
517(
518.scan_in(ff_wdata_62_scanin),
519.scan_out(ff_wdata_62_scanout),
520.l1clk (l1clk),
521.din (din[125:124]),
522.dout (wrdata_d1[125:124]),
523 .siclk(siclk),
524 .soclk(soclk)
525 );
526n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_61
527(
528.scan_in(ff_wdata_61_scanin),
529.scan_out(ff_wdata_61_scanout),
530.l1clk (l1clk),
531.din (din[123:122]),
532.dout (wrdata_d1[123:122]),
533 .siclk(siclk),
534 .soclk(soclk)
535 );
536n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_60
537(
538.scan_in(ff_wdata_60_scanin),
539.scan_out(ff_wdata_60_scanout),
540.l1clk (l1clk),
541.din (din[121:120]),
542.dout (wrdata_d1[121:120]),
543 .siclk(siclk),
544 .soclk(soclk)
545 );
546n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_59
547(
548.scan_in(ff_wdata_59_scanin),
549.scan_out(ff_wdata_59_scanout),
550.l1clk (l1clk),
551.din (din[119:118]),
552.dout (wrdata_d1[119:118]),
553 .siclk(siclk),
554 .soclk(soclk)
555 );
556n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_58
557(
558.scan_in(ff_wdata_58_scanin),
559.scan_out(ff_wdata_58_scanout),
560.l1clk (l1clk),
561.din (din[117:116]),
562.dout (wrdata_d1[117:116]),
563 .siclk(siclk),
564 .soclk(soclk)
565 );
566n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_57
567(
568.scan_in(ff_wdata_57_scanin),
569.scan_out(ff_wdata_57_scanout),
570.l1clk (l1clk),
571.din (din[115:114]),
572.dout (wrdata_d1[115:114]),
573 .siclk(siclk),
574 .soclk(soclk)
575 );
576n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_56
577(
578.scan_in(ff_wdata_56_scanin),
579.scan_out(ff_wdata_56_scanout),
580.l1clk (l1clk),
581.din (din[113:112]),
582.dout (wrdata_d1[113:112]),
583 .siclk(siclk),
584 .soclk(soclk)
585 );
586n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_55
587(
588.scan_in(ff_wdata_55_scanin),
589.scan_out(ff_wdata_55_scanout),
590.l1clk (l1clk),
591.din (din[111:110]),
592.dout (wrdata_d1[111:110]),
593 .siclk(siclk),
594 .soclk(soclk)
595 );
596n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_54
597(
598.scan_in(ff_wdata_54_scanin),
599.scan_out(ff_wdata_54_scanout),
600.l1clk (l1clk),
601.din (din[109:108]),
602.dout (wrdata_d1[109:108]),
603 .siclk(siclk),
604 .soclk(soclk)
605 );
606n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_53
607(
608.scan_in(ff_wdata_53_scanin),
609.scan_out(ff_wdata_53_scanout),
610.l1clk (l1clk),
611.din (din[107:106]),
612.dout (wrdata_d1[107:106]),
613 .siclk(siclk),
614 .soclk(soclk)
615 );
616n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_52
617(
618.scan_in(ff_wdata_52_scanin),
619.scan_out(ff_wdata_52_scanout),
620.l1clk (l1clk),
621.din (din[105:104]),
622.dout (wrdata_d1[105:104]),
623 .siclk(siclk),
624 .soclk(soclk)
625 );
626n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_51
627(
628.scan_in(ff_wdata_51_scanin),
629.scan_out(ff_wdata_51_scanout),
630.l1clk (l1clk),
631.din (din[103:102]),
632.dout (wrdata_d1[103:102]),
633 .siclk(siclk),
634 .soclk(soclk)
635 );
636n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_50
637(
638.scan_in(ff_wdata_50_scanin),
639.scan_out(ff_wdata_50_scanout),
640.l1clk (l1clk),
641.din (din[101:100]),
642.dout (wrdata_d1[101:100]),
643 .siclk(siclk),
644 .soclk(soclk)
645 );
646n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_49
647(
648.scan_in(ff_wdata_49_scanin),
649.scan_out(ff_wdata_49_scanout),
650.l1clk (l1clk),
651.din (din[99:98]),
652.dout (wrdata_d1[99:98]),
653 .siclk(siclk),
654 .soclk(soclk)
655 );
656n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_48
657(
658.scan_in(ff_wdata_48_scanin),
659.scan_out(ff_wdata_48_scanout),
660.l1clk (l1clk),
661.din (din[97:96]),
662.dout (wrdata_d1[97:96]),
663 .siclk(siclk),
664 .soclk(soclk)
665 );
666n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_47
667(
668.scan_in(ff_wdata_47_scanin),
669.scan_out(ff_wdata_47_scanout),
670.l1clk (l1clk),
671.din (din[95:94]),
672.dout (wrdata_d1[95:94]),
673 .siclk(siclk),
674 .soclk(soclk)
675 );
676n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_46
677(
678.scan_in(ff_wdata_46_scanin),
679.scan_out(ff_wdata_46_scanout),
680.l1clk (l1clk),
681.din (din[93:92]),
682.dout (wrdata_d1[93:92]),
683 .siclk(siclk),
684 .soclk(soclk)
685 );
686n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_45
687(
688.scan_in(ff_wdata_45_scanin),
689.scan_out(ff_wdata_45_scanout),
690.l1clk (l1clk),
691.din (din[91:90]),
692.dout (wrdata_d1[91:90]),
693 .siclk(siclk),
694 .soclk(soclk)
695 );
696n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_44
697(
698.scan_in(ff_wdata_44_scanin),
699.scan_out(ff_wdata_44_scanout),
700.l1clk (l1clk),
701.din (din[89:88]),
702.dout (wrdata_d1[89:88]),
703 .siclk(siclk),
704 .soclk(soclk)
705 );
706n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_43
707(
708.scan_in(ff_wdata_43_scanin),
709.scan_out(ff_wdata_43_scanout),
710.l1clk (l1clk),
711.din (din[87:86]),
712.dout (wrdata_d1[87:86]),
713 .siclk(siclk),
714 .soclk(soclk)
715 );
716n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_42
717(
718.scan_in(ff_wdata_42_scanin),
719.scan_out(ff_wdata_42_scanout),
720.l1clk (l1clk),
721.din (din[85:84]),
722.dout (wrdata_d1[85:84]),
723 .siclk(siclk),
724 .soclk(soclk)
725 );
726n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_41
727(
728.scan_in(ff_wdata_41_scanin),
729.scan_out(ff_wdata_41_scanout),
730.l1clk (l1clk),
731.din (din[83:82]),
732.dout (wrdata_d1[83:82]),
733 .siclk(siclk),
734 .soclk(soclk)
735 );
736n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_40
737(
738.scan_in(ff_wdata_40_scanin),
739.scan_out(ff_wdata_40_scanout),
740.l1clk (l1clk),
741.din (din[81:80]),
742.dout (wrdata_d1[81:80]),
743 .siclk(siclk),
744 .soclk(soclk)
745 );
746n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_39
747(
748.scan_in(ff_wdata_39_scanin),
749.scan_out(ff_wdata_39_scanout),
750.l1clk (l1clk),
751.din (din[79:78]),
752.dout (wrdata_d1[79:78]),
753 .siclk(siclk),
754 .soclk(soclk)
755 );
756n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_38
757(
758.scan_in(ff_wdata_38_scanin),
759.scan_out(ff_wdata_38_scanout),
760.l1clk (l1clk),
761.din (din[77:76]),
762.dout (wrdata_d1[77:76]),
763 .siclk(siclk),
764 .soclk(soclk)
765 );
766n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_37
767(
768.scan_in(ff_wdata_37_scanin),
769.scan_out(ff_wdata_37_scanout),
770.l1clk (l1clk),
771.din (din[75:74]),
772.dout (wrdata_d1[75:74]),
773 .siclk(siclk),
774 .soclk(soclk)
775 );
776n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_36
777(
778.scan_in(ff_wdata_36_scanin),
779.scan_out(ff_wdata_36_scanout),
780.l1clk (l1clk),
781.din (din[73:72]),
782.dout (wrdata_d1[73:72]),
783 .siclk(siclk),
784 .soclk(soclk)
785 );
786n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_35
787(
788.scan_in(ff_wdata_35_scanin),
789.scan_out(ff_wdata_35_scanout),
790.l1clk (l1clk),
791.din (din[71:70]),
792.dout (wrdata_d1[71:70]),
793 .siclk(siclk),
794 .soclk(soclk)
795 );
796n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_34
797(
798.scan_in(ff_wdata_34_scanin),
799.scan_out(ff_wdata_34_scanout),
800.l1clk (l1clk),
801.din (din[69:68]),
802.dout (wrdata_d1[69:68]),
803 .siclk(siclk),
804 .soclk(soclk)
805 );
806n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_33
807(
808.scan_in(ff_wdata_33_scanin),
809.scan_out(ff_wdata_33_scanout),
810.l1clk (l1clk),
811.din (din[67:66]),
812.dout (wrdata_d1[67:66]),
813 .siclk(siclk),
814 .soclk(soclk)
815 );
816n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_32
817(
818.scan_in(ff_wdata_32_scanin),
819.scan_out(ff_wdata_32_scanout),
820.l1clk (l1clk),
821.din (din[65:64]),
822.dout (wrdata_d1[65:64]),
823 .siclk(siclk),
824 .soclk(soclk)
825 );
826n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_31
827(
828.scan_in(ff_wdata_31_scanin),
829.scan_out(ff_wdata_31_scanout),
830.l1clk (l1clk),
831.din (din[63:62]),
832.dout (wrdata_d1[63:62]),
833 .siclk(siclk),
834 .soclk(soclk)
835 );
836n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_30
837(
838.scan_in(ff_wdata_30_scanin),
839.scan_out(ff_wdata_30_scanout),
840.l1clk (l1clk),
841.din (din[61:60]),
842.dout (wrdata_d1[61:60]),
843 .siclk(siclk),
844 .soclk(soclk)
845 );
846n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_29
847(
848.scan_in(ff_wdata_29_scanin),
849.scan_out(ff_wdata_29_scanout),
850.l1clk (l1clk),
851.din (din[59:58]),
852.dout (wrdata_d1[59:58]),
853 .siclk(siclk),
854 .soclk(soclk)
855 );
856n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_28
857(
858.scan_in(ff_wdata_28_scanin),
859.scan_out(ff_wdata_28_scanout),
860.l1clk (l1clk),
861.din (din[57:56]),
862.dout (wrdata_d1[57:56]),
863 .siclk(siclk),
864 .soclk(soclk)
865 );
866n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_27
867(
868.scan_in(ff_wdata_27_scanin),
869.scan_out(ff_wdata_27_scanout),
870.l1clk (l1clk),
871.din (din[55:54]),
872.dout (wrdata_d1[55:54]),
873 .siclk(siclk),
874 .soclk(soclk)
875 );
876n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_26
877(
878.scan_in(ff_wdata_26_scanin),
879.scan_out(ff_wdata_26_scanout),
880.l1clk (l1clk),
881.din (din[53:52]),
882.dout (wrdata_d1[53:52]),
883 .siclk(siclk),
884 .soclk(soclk)
885 );
886n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_25
887(
888.scan_in(ff_wdata_25_scanin),
889.scan_out(ff_wdata_25_scanout),
890.l1clk (l1clk),
891.din (din[51:50]),
892.dout (wrdata_d1[51:50]),
893 .siclk(siclk),
894 .soclk(soclk)
895 );
896n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_24
897(
898.scan_in(ff_wdata_24_scanin),
899.scan_out(ff_wdata_24_scanout),
900.l1clk (l1clk),
901.din (din[49:48]),
902.dout (wrdata_d1[49:48]),
903 .siclk(siclk),
904 .soclk(soclk)
905 );
906n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_23
907(
908.scan_in(ff_wdata_23_scanin),
909.scan_out(ff_wdata_23_scanout),
910.l1clk (l1clk),
911.din (din[47:46]),
912.dout (wrdata_d1[47:46]),
913 .siclk(siclk),
914 .soclk(soclk)
915 );
916n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_22
917(
918.scan_in(ff_wdata_22_scanin),
919.scan_out(ff_wdata_22_scanout),
920.l1clk (l1clk),
921.din (din[45:44]),
922.dout (wrdata_d1[45:44]),
923 .siclk(siclk),
924 .soclk(soclk)
925 );
926n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_21
927(
928.scan_in(ff_wdata_21_scanin),
929.scan_out(ff_wdata_21_scanout),
930.l1clk (l1clk),
931.din (din[43:42]),
932.dout (wrdata_d1[43:42]),
933 .siclk(siclk),
934 .soclk(soclk)
935 );
936n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_20
937(
938.scan_in(ff_wdata_20_scanin),
939.scan_out(ff_wdata_20_scanout),
940.l1clk (l1clk),
941.din (din[41:40]),
942.dout (wrdata_d1[41:40]),
943 .siclk(siclk),
944 .soclk(soclk)
945 );
946n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_19
947(
948.scan_in(ff_wdata_19_scanin),
949.scan_out(ff_wdata_19_scanout),
950.l1clk (l1clk),
951.din (din[39:38]),
952.dout (wrdata_d1[39:38]),
953 .siclk(siclk),
954 .soclk(soclk)
955 );
956n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_18
957(
958.scan_in(ff_wdata_18_scanin),
959.scan_out(ff_wdata_18_scanout),
960.l1clk (l1clk),
961.din (din[37:36]),
962.dout (wrdata_d1[37:36]),
963 .siclk(siclk),
964 .soclk(soclk)
965 );
966n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_17
967(
968.scan_in(ff_wdata_17_scanin),
969.scan_out(ff_wdata_17_scanout),
970.l1clk (l1clk),
971.din (din[35:34]),
972.dout (wrdata_d1[35:34]),
973 .siclk(siclk),
974 .soclk(soclk)
975 );
976n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_16
977(
978.scan_in(ff_wdata_16_scanin),
979.scan_out(ff_wdata_16_scanout),
980.l1clk (l1clk),
981.din (din[33:32]),
982.dout (wrdata_d1[33:32]),
983 .siclk(siclk),
984 .soclk(soclk)
985 );
986n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_15
987(
988.scan_in(ff_wdata_15_scanin),
989.scan_out(ff_wdata_15_scanout),
990.l1clk (l1clk),
991.din (din[31:30]),
992.dout (wrdata_d1[31:30]),
993 .siclk(siclk),
994 .soclk(soclk)
995 );
996n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_14
997(
998.scan_in(ff_wdata_14_scanin),
999.scan_out(ff_wdata_14_scanout),
1000.l1clk (l1clk),
1001.din (din[29:28]),
1002.dout (wrdata_d1[29:28]),
1003 .siclk(siclk),
1004 .soclk(soclk)
1005 );
1006n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_13
1007(
1008.scan_in(ff_wdata_13_scanin),
1009.scan_out(ff_wdata_13_scanout),
1010.l1clk (l1clk),
1011.din (din[27:26]),
1012.dout (wrdata_d1[27:26]),
1013 .siclk(siclk),
1014 .soclk(soclk)
1015 );
1016n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_12
1017(
1018.scan_in(ff_wdata_12_scanin),
1019.scan_out(ff_wdata_12_scanout),
1020.l1clk (l1clk),
1021.din (din[25:24]),
1022.dout (wrdata_d1[25:24]),
1023 .siclk(siclk),
1024 .soclk(soclk)
1025 );
1026n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_11
1027(
1028.scan_in(ff_wdata_11_scanin),
1029.scan_out(ff_wdata_11_scanout),
1030.l1clk (l1clk),
1031.din (din[23:22]),
1032.dout (wrdata_d1[23:22]),
1033 .siclk(siclk),
1034 .soclk(soclk)
1035 );
1036n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_10
1037(
1038.scan_in(ff_wdata_10_scanin),
1039.scan_out(ff_wdata_10_scanout),
1040.l1clk (l1clk),
1041.din (din[21:20]),
1042.dout (wrdata_d1[21:20]),
1043 .siclk(siclk),
1044 .soclk(soclk)
1045 );
1046n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_9
1047(
1048.scan_in(ff_wdata_9_scanin),
1049.scan_out(ff_wdata_9_scanout),
1050.l1clk (l1clk),
1051.din (din[19:18]),
1052.dout (wrdata_d1[19:18]),
1053 .siclk(siclk),
1054 .soclk(soclk)
1055 );
1056n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_8
1057(
1058.scan_in(ff_wdata_8_scanin),
1059.scan_out(ff_wdata_8_scanout),
1060.l1clk (l1clk),
1061.din (din[17:16]),
1062.dout (wrdata_d1[17:16]),
1063 .siclk(siclk),
1064 .soclk(soclk)
1065 );
1066n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_7
1067(
1068.scan_in(ff_wdata_7_scanin),
1069.scan_out(ff_wdata_7_scanout),
1070.l1clk (l1clk),
1071.din (din[15:14]),
1072.dout (wrdata_d1[15:14]),
1073 .siclk(siclk),
1074 .soclk(soclk)
1075 );
1076n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_6
1077(
1078.scan_in(ff_wdata_6_scanin),
1079.scan_out(ff_wdata_6_scanout),
1080.l1clk (l1clk),
1081.din (din[13:12]),
1082.dout (wrdata_d1[13:12]),
1083 .siclk(siclk),
1084 .soclk(soclk)
1085 );
1086n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_5
1087(
1088.scan_in(ff_wdata_5_scanin),
1089.scan_out(ff_wdata_5_scanout),
1090.l1clk (l1clk),
1091.din (din[11:10]),
1092.dout (wrdata_d1[11:10]),
1093 .siclk(siclk),
1094 .soclk(soclk)
1095 );
1096n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_4
1097(
1098.scan_in(ff_wdata_4_scanin),
1099.scan_out(ff_wdata_4_scanout),
1100.l1clk (l1clk),
1101.din (din[9:8]),
1102.dout (wrdata_d1[9:8]),
1103 .siclk(siclk),
1104 .soclk(soclk)
1105 );
1106n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_3
1107(
1108.scan_in(ff_wdata_3_scanin),
1109.scan_out(ff_wdata_3_scanout),
1110.l1clk (l1clk),
1111.din (din[7:6]),
1112.dout (wrdata_d1[7:6]),
1113 .siclk(siclk),
1114 .soclk(soclk)
1115 );
1116n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_2
1117(
1118.scan_in(ff_wdata_2_scanin),
1119.scan_out(ff_wdata_2_scanout),
1120.l1clk (l1clk),
1121.din (din[5:4]),
1122.dout (wrdata_d1[5:4]),
1123 .siclk(siclk),
1124 .soclk(soclk)
1125 );
1126n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_1
1127(
1128.scan_in(ff_wdata_1_scanin),
1129.scan_out(ff_wdata_1_scanout),
1130.l1clk (l1clk),
1131.din (din[3:2]),
1132.dout (wrdata_d1[3:2]),
1133 .siclk(siclk),
1134 .soclk(soclk)
1135 );
1136n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 ff_wdata_0
1137(
1138.scan_in(ff_wdata_0_scanin),
1139.scan_out(ff_wdata_0_scanout),
1140.l1clk (l1clk),
1141.din (din[1:0]),
1142.dout (wrdata_d1[1:0]),
1143 .siclk(siclk),
1144 .soclk(soclk)
1145 );
1146
1147n2_l2t_dp_16x160_cust_msff_ctl_macro__width_4 ff_word_wen
1148 (
1149 .scan_in(ff_word_wen_scanin),
1150 .scan_out(ff_word_wen_scanout),
1151 .l1clk(l1clk),
1152 .din(word_wen[3:0]),
1153 .dout(word_wen_d1[3:0]),
1154 .siclk(siclk),
1155 .soclk(soclk)
1156 );
1157
1158n2_l2t_dp_16x160_cust_msff_ctl_macro__width_20 ff_byte_wen
1159 (
1160 .scan_in(ff_byte_wen_scanin),
1161 .scan_out(ff_byte_wen_scanout),
1162 .l1clk(l1clk),
1163 .din(byte_wen[19:0]),
1164 .dout(byte_wen_d1[19:0]),
1165 .siclk(siclk),
1166 .soclk(soclk)
1167 );
1168
1169n2_l2t_dp_16x160_cust_msff_ctl_macro__width_8 ff_mbist_wdata // not a real flop. ONly used as a trigger
1170 (
1171 .scan_in(ff_mbist_wdata_scanin),
1172 .scan_out(ff_mbist_wdata_scanout),
1173 .l1clk(l1clk),
1174 .din(mbist_wdata[7:0]),
1175 .dout(mbist_wdata_d1[7:0]),
1176 .siclk(siclk),
1177 .soclk(soclk)
1178 );
1179
1180n2_l2t_dp_16x160_cust_msff_ctl_macro__width_1 ff_mbist_run // not a real flop. ONly used as a trigger
1181 (
1182 .scan_in(ff_mbist_run_scanin),
1183 .scan_out(ff_mbist_run_scanout),
1184 .l1clk(l1clk),
1185 .din(mbist_run),
1186 .dout(mbist_run_d1),
1187 .siclk(siclk),
1188 .soclk(soclk)
1189 );
1190
1191
1192n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_4 ff_wr_adr
1193 (
1194 .scan_in(ff_wr_adr_scanin),
1195 .scan_out(ff_wr_adr_scanout),
1196 .l1clk(l1clk),
1197 .din(wr_adr[3:0]),
1198 .dout(wrptr_d1[3:0]),
1199 .siclk(siclk),
1200 .soclk(soclk)
1201 );
1202
1203n2_l2t_dp_16x160_cust_msff_ctl_macro__width_1 ff_wr_en
1204 (
1205 .scan_in(ff_wr_en_scanin),
1206 .scan_out(ff_wr_en_scanout),
1207 .l1clk(l1clk),
1208 .din(wr_en),
1209 .dout(wr_en_d1),
1210 .siclk(siclk),
1211 .soclk(soclk)
1212 );
1213
1214n2_l2t_dp_16x160_cust_inv_macro__width_1 inv_read_en
1215 (
1216 .dout (collusion_n),
1217 .din (collusion)
1218 );
1219
1220n2_l2t_dp_16x160_cust_and_macro__width_1 and_read_en_qual
1221 (
1222 .dout (read_en_qualed),
1223 .din0 (collusion_n),
1224 .din1 (read_en)
1225 );
1226
1227n2_l2t_dp_16x160_cust_sram_msff_mo_macro__width_1 ff_read_enable
1228 (
1229 .scan_in(ff_read_enable_scanin),
1230 .scan_out(ff_read_enable_scanout),
1231 .l1clk(l1clk),
1232 .and_clk(l1clk_mem),
1233 .d(read_en_qualed),
1234 .mq_l(ff_read_enable0_unused),
1235 .q(ff_read_enable1_unused),
1236 .q_l(ff_read_enable2_unused),
1237 .mq(ren_d1),
1238 .siclk(siclk),
1239 .soclk(soclk)
1240 );
1241
1242n2_l2t_dp_16x160_cust_sram_msff_mo_macro__scanreverse_1__width_4 ff_read_addr
1243 (
1244 .scan_in(ff_read_addr_scanin),
1245 .scan_out(ff_read_addr_scanout),
1246 .l1clk(l1clk),
1247 .and_clk(l1clk_mem),
1248 .d(rd_adr[3:0]),
1249 .q(ff_read_addr0_unused[3:0]),
1250 .q_l(ff_read_addr1_unused[3:0]),
1251 .mq(rd_ptr_d1[3:0]),
1252 .mq_l(ff_read_addr2_unused[3:0]),
1253 .siclk(siclk),
1254 .soclk(soclk)
1255 );
1256
1257//////// Muxed for timing reasons //////////////////
1258n2_l2t_dp_16x160_cust_inv_macro__width_1 inv_mbist_run
1259 (
1260 .dout (mbist_run_d1_n),
1261 .din (mbist_run_d1)
1262 );
1263
1264n2_l2t_dp_16x160_cust_mux_macro__mux_aonpe__ports_2__width_64 mux_din_0
1265 (
1266 .dout (data_input[63:0]),
1267 .din0 (wrdata_d1[63:0]),
1268 .din1 ({8{mbist_wdata_d1[7:0]}}),
1269 .sel0 (mbist_run_d1_n),
1270 .sel1 (mbist_run_d1)
1271 ) ;
1272
1273n2_l2t_dp_16x160_cust_mux_macro__mux_aonpe__ports_2__width_64 mux_din_1
1274 (
1275 .dout (data_input[127:64]),
1276 .din0 (wrdata_d1[127:64]),
1277 .din1 ({8{mbist_wdata_d1[7:0]}}),
1278 .sel0 (mbist_run_d1_n),
1279 .sel1 (mbist_run_d1)
1280 ) ;
1281
1282n2_l2t_dp_16x160_cust_mux_macro__mux_aonpe__ports_2__width_32 mux_din_2
1283 (
1284 .dout (data_input[159:128]),
1285 .din0 (wrdata_d1[159:128]),
1286 .din1 ({4{mbist_wdata_d1[7:0]}}),
1287 .sel0 (mbist_run_d1_n),
1288 .sel1 (mbist_run_d1)
1289 ) ;
1290
1291
1292n2_l2t_dp_16x160_cust_cmp_macro__width_8 cmp_input_address
1293 (
1294 .dout (collusion),
1295 .din0 ({3'b0,wr_adr[3:0],wr_en}),
1296 .din1 ({3'b0,rd_adr[3:0],read_en})
1297 );
1298
1299
1300/// Memory array ////
1301n2_l2t_dp_16x160_cust_array array
1302 (
1303 .l1clk (l1clk_mem),
1304 .wr_en (wr_en_d1),
1305 .rd_en (ren_d1),
1306 .wr_addr (wrptr_d1[3:0]),
1307 .rd_addr (rd_ptr_d1[3:0]),
1308 .din (data_input[159:0]),
1309 .dout (dout[159:0]),
1310 .tcu_array_wr_inhibit (tcu_array_wr_inhibit),
1311 .word_wen (word_wen_d1[3:0]),
1312 .byte_wen (byte_wen_d1[19:0])
1313 );
1314
1315
1316// fixscan start:
1317assign ff_wdata_79_scanin = scan_in ;
1318assign ff_wdata_78_scanin = ff_wdata_79_scanout ;
1319assign ff_wdata_77_scanin = ff_wdata_78_scanout ;
1320assign ff_wdata_76_scanin = ff_wdata_77_scanout ;
1321assign ff_wdata_75_scanin = ff_wdata_76_scanout ;
1322assign ff_wdata_74_scanin = ff_wdata_75_scanout ;
1323assign ff_wdata_73_scanin = ff_wdata_74_scanout ;
1324assign ff_wdata_72_scanin = ff_wdata_73_scanout ;
1325assign ff_wdata_71_scanin = ff_wdata_72_scanout ;
1326assign ff_wdata_70_scanin = ff_wdata_71_scanout ;
1327assign ff_wdata_69_scanin = ff_wdata_70_scanout ;
1328assign ff_wdata_68_scanin = ff_wdata_69_scanout ;
1329assign ff_wdata_67_scanin = ff_wdata_68_scanout ;
1330assign ff_wdata_66_scanin = ff_wdata_67_scanout ;
1331assign ff_wdata_65_scanin = ff_wdata_66_scanout ;
1332assign ff_wdata_64_scanin = ff_wdata_65_scanout ;
1333assign ff_wdata_63_scanin = ff_wdata_64_scanout ;
1334assign ff_wdata_62_scanin = ff_wdata_63_scanout ;
1335assign ff_wdata_61_scanin = ff_wdata_62_scanout ;
1336assign ff_wdata_60_scanin = ff_wdata_61_scanout ;
1337assign ff_wdata_59_scanin = ff_wdata_60_scanout ;
1338assign ff_wdata_58_scanin = ff_wdata_59_scanout ;
1339assign ff_wdata_57_scanin = ff_wdata_58_scanout ;
1340assign ff_wdata_56_scanin = ff_wdata_57_scanout ;
1341assign ff_wdata_55_scanin = ff_wdata_56_scanout ;
1342assign ff_wdata_54_scanin = ff_wdata_55_scanout ;
1343assign ff_wdata_53_scanin = ff_wdata_54_scanout ;
1344assign ff_wdata_52_scanin = ff_wdata_53_scanout ;
1345assign ff_wdata_51_scanin = ff_wdata_52_scanout ;
1346assign ff_wdata_50_scanin = ff_wdata_51_scanout ;
1347assign ff_wdata_49_scanin = ff_wdata_50_scanout ;
1348assign ff_wdata_48_scanin = ff_wdata_49_scanout ;
1349assign ff_wdata_47_scanin = ff_wdata_48_scanout ;
1350assign ff_wdata_46_scanin = ff_wdata_47_scanout ;
1351assign ff_wdata_45_scanin = ff_wdata_46_scanout ;
1352assign ff_wdata_44_scanin = ff_wdata_45_scanout ;
1353assign ff_wdata_43_scanin = ff_wdata_44_scanout ;
1354assign ff_wdata_42_scanin = ff_wdata_43_scanout ;
1355assign ff_wdata_41_scanin = ff_wdata_42_scanout ;
1356assign ff_wdata_40_scanin = ff_wdata_41_scanout ;
1357assign ff_wdata_39_scanin = ff_wdata_40_scanout ;
1358assign ff_wdata_38_scanin = ff_wdata_39_scanout ;
1359assign ff_wdata_37_scanin = ff_wdata_38_scanout ;
1360assign ff_wdata_36_scanin = ff_wdata_37_scanout ;
1361assign ff_wdata_35_scanin = ff_wdata_36_scanout ;
1362assign ff_wdata_34_scanin = ff_wdata_35_scanout ;
1363assign ff_wdata_33_scanin = ff_wdata_34_scanout ;
1364assign ff_wdata_32_scanin = ff_wdata_33_scanout ;
1365assign ff_wdata_31_scanin = ff_wdata_32_scanout ;
1366assign ff_wdata_30_scanin = ff_wdata_31_scanout ;
1367assign ff_wdata_29_scanin = ff_wdata_30_scanout ;
1368assign ff_wdata_28_scanin = ff_wdata_29_scanout ;
1369assign ff_wdata_27_scanin = ff_wdata_28_scanout ;
1370assign ff_wdata_26_scanin = ff_wdata_27_scanout ;
1371assign ff_wdata_25_scanin = ff_wdata_26_scanout ;
1372assign ff_wdata_24_scanin = ff_wdata_25_scanout ;
1373assign ff_wdata_23_scanin = ff_wdata_24_scanout ;
1374assign ff_wdata_22_scanin = ff_wdata_23_scanout ;
1375assign ff_wdata_21_scanin = ff_wdata_22_scanout ;
1376assign ff_wdata_20_scanin = ff_wdata_21_scanout ;
1377assign ff_wdata_19_scanin = ff_wdata_20_scanout ;
1378assign ff_wdata_18_scanin = ff_wdata_19_scanout ;
1379assign ff_wdata_17_scanin = ff_wdata_18_scanout ;
1380assign ff_wdata_16_scanin = ff_wdata_17_scanout ;
1381assign ff_wdata_15_scanin = ff_wdata_16_scanout ;
1382assign ff_wdata_14_scanin = ff_wdata_15_scanout ;
1383assign ff_wdata_13_scanin = ff_wdata_14_scanout ;
1384assign ff_wdata_12_scanin = ff_wdata_13_scanout ;
1385assign ff_wdata_11_scanin = ff_wdata_12_scanout ;
1386assign ff_wdata_10_scanin = ff_wdata_11_scanout ;
1387assign ff_wdata_9_scanin = ff_wdata_10_scanout ;
1388assign ff_wdata_8_scanin = ff_wdata_9_scanout ;
1389assign ff_wdata_7_scanin = ff_wdata_8_scanout ;
1390assign ff_wdata_6_scanin = ff_wdata_7_scanout ;
1391assign ff_wdata_5_scanin = ff_wdata_6_scanout ;
1392assign ff_wdata_4_scanin = ff_wdata_5_scanout ;
1393assign ff_wdata_3_scanin = ff_wdata_4_scanout ;
1394assign ff_wdata_2_scanin = ff_wdata_3_scanout ;
1395assign ff_wdata_1_scanin = ff_wdata_2_scanout ;
1396assign ff_wdata_0_scanin = ff_wdata_1_scanout ;
1397assign ff_word_wen_scanin = ff_wdata_0_scanout ;
1398assign ff_byte_wen_scanin = ff_word_wen_scanout ;
1399assign ff_mbist_wdata_scanin = ff_byte_wen_scanout ;
1400assign ff_mbist_run_scanin = ff_mbist_wdata_scanout ;
1401assign ff_wr_adr_scanin = ff_mbist_run_scanout ;
1402assign ff_wr_en_scanin = ff_wr_adr_scanout ;
1403assign ff_read_enable_scanin = ff_wr_en_scanout ;
1404assign ff_read_addr_scanin = ff_read_enable_scanout ;
1405assign scan_out = ff_read_addr_scanout ;
1406// fixscan end:
1407
1408// synopsys translate_on
1409
1410endmodule
1411
1412
1413
1414
1415module n2_l2t_dp_16x160_cust_array (
1416 l1clk,
1417 wr_en,
1418 rd_en,
1419 tcu_array_wr_inhibit,
1420 word_wen,
1421 wr_addr,
1422 rd_addr,
1423 din,
1424 byte_wen,
1425 dout);
1426wire write_disable;
1427
1428
1429input l1clk;
1430input wr_en;
1431input rd_en;
1432input tcu_array_wr_inhibit;
1433input [3:0] word_wen;
1434input [3:0] wr_addr;
1435input [3:0] rd_addr;
1436input [159:0] din;
1437input [19:0] byte_wen;
1438
1439output [159:0] dout;
1440
1441
1442assign write_disable = tcu_array_wr_inhibit;
1443
1444
1445wire reset_l;
1446assign reset_l = 1'b1;
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459// memory array
1460reg [159:0] inq_ary [15:0];
1461
1462integer rd_i;
1463integer wr_i;
1464integer rd_j;
1465integer wr_j;
1466
1467reg [159:0] dout;
1468reg [159:0] data_in;
1469reg [159:0] temp;
1470reg [159:0] tmp_dout;
1471
1472`ifndef NOINITMEM
1473// Emulate reset
1474integer i;
1475initial begin
1476 for (i=0; i<16; i=i+1) begin
1477 inq_ary[i] = {160{1'b0}};
1478 end
1479end
1480`endif
1481
1482
1483// Moved into always block for AXIs
1484// assign tmp_dout = inq_ary[rd_addr] ;
1485// assign temp = inq_ary[wr_addr];
1486
1487//////////////////////////////////////////////////////////////////////
1488//
1489// Read Operation
1490//
1491//////////////////////////////////////////////////////////////////////
1492
1493always @( byte_wen or rd_addr or rd_en or reset_l or write_disable
1494 or word_wen or wr_en or wr_addr or l1clk)
1495
1496
1497 #0
1498
1499begin
1500 if ((rd_en==1'b1) & l1clk & ~write_disable)
1501 begin
1502 rd_j = 0;
1503 tmp_dout = inq_ary[rd_addr] ;
1504 for (rd_i=0; rd_i<= 159; rd_i=rd_i+8)
1505 begin
1506 if (rd_addr == wr_addr)
1507 begin
1508 dout[rd_i] = (wr_en & word_wen[0] & byte_wen[rd_j] & ~write_disable) ?
1509 1'bx : tmp_dout[rd_i] ;
1510 dout[rd_i+1] = (wr_en & word_wen[1] & byte_wen[rd_j] & ~write_disable) ?
1511 1'bx : tmp_dout[rd_i+1] ;
1512 dout[rd_i+2] = (wr_en & word_wen[2] & byte_wen[rd_j] & ~write_disable) ?
1513 1'bx : tmp_dout[rd_i+2] ;
1514 dout[rd_i+3] = (wr_en & word_wen[3] & byte_wen[rd_j] & ~write_disable) ?
1515 1'bx : tmp_dout[rd_i+3] ;
1516 dout[rd_i+4] = (wr_en & word_wen[0] & byte_wen[rd_j] & ~write_disable) ?
1517 1'bx : tmp_dout[rd_i+4] ;
1518 dout[rd_i+5] = (wr_en & word_wen[1] & byte_wen[rd_j] & ~write_disable) ?
1519 1'bx : tmp_dout[rd_i+5] ;
1520 dout[rd_i+6] = (wr_en & word_wen[2] & byte_wen[rd_j] & ~write_disable) ?
1521 1'bx : tmp_dout[rd_i+6] ;
1522 dout[rd_i+7] = (wr_en & word_wen[3] & byte_wen[rd_j] & ~write_disable) ?
1523 1'bx : tmp_dout[rd_i+7] ;
1524 rd_j = rd_j+1;
1525 end
1526 else
1527 begin
1528 dout[rd_i] = tmp_dout[rd_i] ;
1529 dout[rd_i+1] = tmp_dout[rd_i+1] ;
1530 dout[rd_i+2] = tmp_dout[rd_i+2] ;
1531 dout[rd_i+3] = tmp_dout[rd_i+3] ;
1532 dout[rd_i+4] = tmp_dout[rd_i+4] ;
1533 dout[rd_i+5] = tmp_dout[rd_i+5] ;
1534 dout[rd_i+6] = tmp_dout[rd_i+6] ;
1535 dout[rd_i+7] = tmp_dout[rd_i+7] ;
1536 end
1537 end
1538 end
1539 else
1540 dout[159:0] = dout[159:0];
1541 end
1542
1543
1544
1545//////////////////////////////////////////////////////////////////////
1546//
1547// Write Operation
1548//
1549//////////////////////////////////////////////////////////////////////
1550
1551always @ (byte_wen or reset_l or write_disable or word_wen
1552 or wr_en or din or wr_addr or l1clk)
1553
1554
1555 #0
1556
1557begin
1558//if (reset_l)
1559// begin
1560 if (wr_en & ~write_disable & ~l1clk)
1561 begin
1562 wr_j = 0;
1563 temp = inq_ary[wr_addr];
1564 for (wr_i=0; wr_i<=159; wr_i=wr_i+8)
1565 begin // for
1566 data_in[wr_i] = (wr_en & word_wen[0] & byte_wen[wr_j] & ~write_disable) ?
1567 din[wr_i] : temp[wr_i] ;
1568 data_in[wr_i+1] = (wr_en & word_wen[1] & byte_wen[wr_j] & ~write_disable) ?
1569 din[wr_i+1] : temp[wr_i+1] ;
1570 data_in[wr_i+2] = (wr_en & word_wen[2] & byte_wen[wr_j] & ~write_disable) ?
1571 din[wr_i+2] : temp[wr_i+2] ;
1572 data_in[wr_i+3] = (wr_en & word_wen[3] & byte_wen[wr_j] & ~write_disable) ?
1573 din[wr_i+3] : temp[wr_i+3] ;
1574 data_in[wr_i+4] = (wr_en & word_wen[0] & byte_wen[wr_j] & ~write_disable) ?
1575 din[wr_i+4] : temp[wr_i+4] ;
1576 data_in[wr_i+5] = (wr_en & word_wen[1] & byte_wen[wr_j] & ~write_disable) ?
1577 din[wr_i+5] : temp[wr_i+5] ;
1578 data_in[wr_i+6] = (wr_en & word_wen[2] & byte_wen[wr_j] & ~write_disable) ?
1579 din[wr_i+6] : temp[wr_i+6] ;
1580 data_in[wr_i+7] = (wr_en & word_wen[3] & byte_wen[wr_j] & ~write_disable) ?
1581 din[wr_i+7] : temp[wr_i+7] ;
1582 wr_j = wr_j+1;
1583 end // for
1584 inq_ary[wr_addr] = data_in ;
1585 end // if(wr_en.....
1586 //end // if reset
1587end // always
1588
1589
1590endmodule
1591
1592
1593
1594
1595
1596
1597
1598// any PARAMS parms go into naming of macro
1599
1600module n2_l2t_dp_16x160_cust_l1clkhdr_ctl_macro (
1601 l2clk,
1602 l1en,
1603 pce_ov,
1604 stop,
1605 se,
1606 l1clk);
1607
1608
1609 input l2clk;
1610 input l1en;
1611 input pce_ov;
1612 input stop;
1613 input se;
1614 output l1clk;
1615
1616
1617
1618
1619
1620cl_sc1_l1hdr_8x c_0 (
1621
1622
1623 .l2clk(l2clk),
1624 .pce(l1en),
1625 .l1clk(l1clk),
1626 .se(se),
1627 .pce_ov(pce_ov),
1628 .stop(stop)
1629);
1630
1631
1632
1633endmodule
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647// any PARAMS parms go into naming of macro
1648
1649module n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_2 (
1650 din,
1651 l1clk,
1652 scan_in,
1653 siclk,
1654 soclk,
1655 dout,
1656 scan_out);
1657wire [1:0] fdin;
1658wire [0:0] so;
1659
1660 input [1:0] din;
1661 input l1clk;
1662 input scan_in;
1663
1664
1665 input siclk;
1666 input soclk;
1667
1668 output [1:0] dout;
1669 output scan_out;
1670assign fdin[1:0] = din[1:0];
1671
1672
1673
1674
1675
1676
1677dff #(2) d0_0 (
1678.l1clk(l1clk),
1679.siclk(siclk),
1680.soclk(soclk),
1681.d(fdin[1:0]),
1682.si({so[0:0],scan_in}),
1683.so({scan_out,so[0:0]}),
1684.q(dout[1:0])
1685);
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698endmodule
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712// any PARAMS parms go into naming of macro
1713
1714module n2_l2t_dp_16x160_cust_msff_ctl_macro__width_4 (
1715 din,
1716 l1clk,
1717 scan_in,
1718 siclk,
1719 soclk,
1720 dout,
1721 scan_out);
1722wire [3:0] fdin;
1723wire [2:0] so;
1724
1725 input [3:0] din;
1726 input l1clk;
1727 input scan_in;
1728
1729
1730 input siclk;
1731 input soclk;
1732
1733 output [3:0] dout;
1734 output scan_out;
1735assign fdin[3:0] = din[3:0];
1736
1737
1738
1739
1740
1741
1742dff #(4) d0_0 (
1743.l1clk(l1clk),
1744.siclk(siclk),
1745.soclk(soclk),
1746.d(fdin[3:0]),
1747.si({scan_in,so[2:0]}),
1748.so({so[2:0],scan_out}),
1749.q(dout[3:0])
1750);
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763endmodule
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777// any PARAMS parms go into naming of macro
1778
1779module n2_l2t_dp_16x160_cust_msff_ctl_macro__width_20 (
1780 din,
1781 l1clk,
1782 scan_in,
1783 siclk,
1784 soclk,
1785 dout,
1786 scan_out);
1787wire [19:0] fdin;
1788wire [18:0] so;
1789
1790 input [19:0] din;
1791 input l1clk;
1792 input scan_in;
1793
1794
1795 input siclk;
1796 input soclk;
1797
1798 output [19:0] dout;
1799 output scan_out;
1800assign fdin[19:0] = din[19:0];
1801
1802
1803
1804
1805
1806
1807dff #(20) d0_0 (
1808.l1clk(l1clk),
1809.siclk(siclk),
1810.soclk(soclk),
1811.d(fdin[19:0]),
1812.si({scan_in,so[18:0]}),
1813.so({so[18:0],scan_out}),
1814.q(dout[19:0])
1815);
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828endmodule
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842// any PARAMS parms go into naming of macro
1843
1844module n2_l2t_dp_16x160_cust_msff_ctl_macro__width_8 (
1845 din,
1846 l1clk,
1847 scan_in,
1848 siclk,
1849 soclk,
1850 dout,
1851 scan_out);
1852wire [7:0] fdin;
1853wire [6:0] so;
1854
1855 input [7:0] din;
1856 input l1clk;
1857 input scan_in;
1858
1859
1860 input siclk;
1861 input soclk;
1862
1863 output [7:0] dout;
1864 output scan_out;
1865assign fdin[7:0] = din[7:0];
1866
1867
1868
1869
1870
1871
1872dff #(8) d0_0 (
1873.l1clk(l1clk),
1874.siclk(siclk),
1875.soclk(soclk),
1876.d(fdin[7:0]),
1877.si({scan_in,so[6:0]}),
1878.so({so[6:0],scan_out}),
1879.q(dout[7:0])
1880);
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893endmodule
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907// any PARAMS parms go into naming of macro
1908
1909module n2_l2t_dp_16x160_cust_msff_ctl_macro__width_1 (
1910 din,
1911 l1clk,
1912 scan_in,
1913 siclk,
1914 soclk,
1915 dout,
1916 scan_out);
1917wire [0:0] fdin;
1918
1919 input [0:0] din;
1920 input l1clk;
1921 input scan_in;
1922
1923
1924 input siclk;
1925 input soclk;
1926
1927 output [0:0] dout;
1928 output scan_out;
1929assign fdin[0:0] = din[0:0];
1930
1931
1932
1933
1934
1935
1936dff #(1) d0_0 (
1937.l1clk(l1clk),
1938.siclk(siclk),
1939.soclk(soclk),
1940.d(fdin[0:0]),
1941.si(scan_in),
1942.so(scan_out),
1943.q(dout[0:0])
1944);
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957endmodule
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971// any PARAMS parms go into naming of macro
1972
1973module n2_l2t_dp_16x160_cust_msff_ctl_macro__scanreverse_1__width_4 (
1974 din,
1975 l1clk,
1976 scan_in,
1977 siclk,
1978 soclk,
1979 dout,
1980 scan_out);
1981wire [3:0] fdin;
1982wire [0:2] so;
1983
1984 input [3:0] din;
1985 input l1clk;
1986 input scan_in;
1987
1988
1989 input siclk;
1990 input soclk;
1991
1992 output [3:0] dout;
1993 output scan_out;
1994assign fdin[3:0] = din[3:0];
1995
1996
1997
1998
1999
2000
2001dff #(4) d0_0 (
2002.l1clk(l1clk),
2003.siclk(siclk),
2004.soclk(soclk),
2005.d(fdin[3:0]),
2006.si({so[0:2],scan_in}),
2007.so({scan_out,so[0:2]}),
2008.q(dout[3:0])
2009);
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022endmodule
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032//
2033// invert macro
2034//
2035//
2036
2037
2038
2039
2040
2041module n2_l2t_dp_16x160_cust_inv_macro__width_1 (
2042 din,
2043 dout);
2044 input [0:0] din;
2045 output [0:0] dout;
2046
2047
2048
2049
2050
2051
2052inv #(1) d0_0 (
2053.in(din[0:0]),
2054.out(dout[0:0])
2055);
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065endmodule
2066
2067
2068
2069
2070
2071//
2072// and macro for ports = 2,3,4
2073//
2074//
2075
2076
2077
2078
2079
2080module n2_l2t_dp_16x160_cust_and_macro__width_1 (
2081 din0,
2082 din1,
2083 dout);
2084 input [0:0] din0;
2085 input [0:0] din1;
2086 output [0:0] dout;
2087
2088
2089
2090
2091
2092
2093and2 #(1) d0_0 (
2094.in0(din0[0:0]),
2095.in1(din1[0:0]),
2096.out(dout[0:0])
2097);
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107endmodule
2108
2109
2110
2111
2112
2113//
2114// macro for cl_mc1_sram_msff_mo_{16,8,4}x flops
2115//
2116//
2117
2118
2119
2120
2121
2122module n2_l2t_dp_16x160_cust_sram_msff_mo_macro__width_1 (
2123 d,
2124 scan_in,
2125 l1clk,
2126 and_clk,
2127 siclk,
2128 soclk,
2129 mq,
2130 mq_l,
2131 scan_out,
2132 q,
2133 q_l);
2134input [0:0] d;
2135 input scan_in;
2136input l1clk;
2137input and_clk;
2138input siclk;
2139input soclk;
2140output [0:0] mq;
2141output [0:0] mq_l;
2142 output scan_out;
2143output [0:0] q;
2144output [0:0] q_l;
2145
2146
2147
2148
2149
2150
2151new_dlata #(1) d0_0 (
2152.d(d[0:0]),
2153.si(scan_in),
2154.so(scan_out),
2155.l1clk(l1clk),
2156.and_clk(and_clk),
2157.siclk(siclk),
2158.soclk(soclk),
2159.q(q[0:0]),
2160.q_l(q_l[0:0]),
2161.mq(mq[0:0]),
2162.mq_l(mq_l[0:0])
2163);
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174//place::generic_place($width,$stack,$left);
2175
2176endmodule
2177
2178
2179
2180
2181
2182//
2183// macro for cl_mc1_sram_msff_mo_{16,8,4}x flops
2184//
2185//
2186
2187
2188
2189
2190
2191module n2_l2t_dp_16x160_cust_sram_msff_mo_macro__scanreverse_1__width_4 (
2192 d,
2193 scan_in,
2194 l1clk,
2195 and_clk,
2196 siclk,
2197 soclk,
2198 mq,
2199 mq_l,
2200 scan_out,
2201 q,
2202 q_l);
2203wire [0:2] so;
2204
2205input [3:0] d;
2206 input scan_in;
2207input l1clk;
2208input and_clk;
2209input siclk;
2210input soclk;
2211output [3:0] mq;
2212output [3:0] mq_l;
2213 output scan_out;
2214output [3:0] q;
2215output [3:0] q_l;
2216
2217
2218
2219
2220
2221
2222new_dlata #(4) d0_0 (
2223.d(d[3:0]),
2224.si({so[0:2],scan_in}),
2225.so({scan_out,so[0:2]}),
2226.l1clk(l1clk),
2227.and_clk(and_clk),
2228.siclk(siclk),
2229.soclk(soclk),
2230.q(q[3:0]),
2231.q_l(q_l[3:0]),
2232.mq(mq[3:0]),
2233.mq_l(mq_l[3:0])
2234);
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245//place::generic_place($width,$stack,$left);
2246
2247endmodule
2248
2249
2250
2251
2252
2253// general mux macro for pass-gate and and-or muxes with/wout priority encoders
2254// also for pass-gate with decoder
2255
2256
2257
2258
2259
2260// any PARAMS parms go into naming of macro
2261
2262module n2_l2t_dp_16x160_cust_mux_macro__mux_aonpe__ports_2__width_64 (
2263 din0,
2264 sel0,
2265 din1,
2266 sel1,
2267 dout);
2268wire buffout0;
2269wire buffout1;
2270
2271 input [63:0] din0;
2272 input sel0;
2273 input [63:0] din1;
2274 input sel1;
2275 output [63:0] dout;
2276
2277
2278
2279
2280
2281cl_dp1_muxbuff2_8x c0_0 (
2282 .in0(sel0),
2283 .in1(sel1),
2284 .out0(buffout0),
2285 .out1(buffout1)
2286);
2287mux2s #(64) d0_0 (
2288 .sel0(buffout0),
2289 .sel1(buffout1),
2290 .in0(din0[63:0]),
2291 .in1(din1[63:0]),
2292.dout(dout[63:0])
2293);
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307endmodule
2308
2309
2310// general mux macro for pass-gate and and-or muxes with/wout priority encoders
2311// also for pass-gate with decoder
2312
2313
2314
2315
2316
2317// any PARAMS parms go into naming of macro
2318
2319module n2_l2t_dp_16x160_cust_mux_macro__mux_aonpe__ports_2__width_32 (
2320 din0,
2321 sel0,
2322 din1,
2323 sel1,
2324 dout);
2325wire buffout0;
2326wire buffout1;
2327
2328 input [31:0] din0;
2329 input sel0;
2330 input [31:0] din1;
2331 input sel1;
2332 output [31:0] dout;
2333
2334
2335
2336
2337
2338cl_dp1_muxbuff2_8x c0_0 (
2339 .in0(sel0),
2340 .in1(sel1),
2341 .out0(buffout0),
2342 .out1(buffout1)
2343);
2344mux2s #(32) d0_0 (
2345 .sel0(buffout0),
2346 .sel1(buffout1),
2347 .in0(din0[31:0]),
2348 .in1(din1[31:0]),
2349.dout(dout[31:0])
2350);
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364endmodule
2365
2366
2367//
2368// comparator macro (output is 1 if both inputs are equal; 0 otherwise)
2369//
2370//
2371
2372
2373
2374
2375
2376module n2_l2t_dp_16x160_cust_cmp_macro__width_8 (
2377 din0,
2378 din1,
2379 dout);
2380 input [7:0] din0;
2381 input [7:0] din1;
2382 output dout;
2383
2384
2385
2386
2387
2388
2389cmp #(8) m0_0 (
2390.in0(din0[7:0]),
2391.in1(din1[7:0]),
2392.out(dout)
2393);
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404endmodule
2405
2406
2407
2408
Full OpenSPARC design & verification tarball including full HDL.