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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / libs / n2sram / dp / n2_peu_dp_256x138s_cust_l / n2_peu_dp_256x138s_cust / rtl / n2_peu_dp_256x138s_cust.v
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86530b38
AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: n2_peu_dp_256x138s_cust.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35module n2_peu_dp_256x138s_cust (
36 // clocks, scan
37 clk,
38 scan_in,
39 tcu_se_scancollar_in,
40 tcu_scan_en,
41 pce,
42 tcu_pce_ov,
43 tcu_aclk,
44 tcu_bclk,
45 tcu_array_wr_inhibit,
46 scan_out,
47
48 // ram control
49 rd_addr,
50 wr_addr,
51 rd_en,
52 wr_en,
53 din,
54 dout
55
56);
57
58// clocks, scan
59input clk; // read clock
60input scan_in; //
61input tcu_se_scancollar_in; // scan enable to l1hdrs
62input tcu_scan_en; // scan enable to andclk l1hdrs
63input pce;
64input tcu_pce_ov; //
65input tcu_aclk; //
66input tcu_bclk; //
67input tcu_array_wr_inhibit; //
68output scan_out; //
69
70
71input [7:0] wr_addr; // wr port address in
72input wr_en; // wr port enable
73input [137:0] din; // data in
74
75input [7:0] rd_addr; // rd port address in
76input rd_en; // rd port enable
77output [137:0] dout; // rd port data out
78
79
80//------------------------------------------------------------------------
81// scan chain connections
82//------------------------------------------------------------------------
83wire [7:0] rd_addr_so ;
84wire [7:0] wr_addr_so ;
85wire rd_en_so ;
86wire wr_en_so ;
87wire [137:1] din_so ;
88
89//------------------------------------------------------------------------
90// clock headers
91//------------------------------------------------------------------------
92wire l1clk ;
93wire siclk ;
94wire soclk ;
95wire and_l1clk ;
96
97assign siclk = tcu_aclk ;
98assign soclk = tcu_bclk ;
99
100cl_a1_l1hdr_8x clk_hdr (
101 .l2clk(clk),
102 .pce (pce),
103 .l1clk(l1clk),
104 .se(tcu_se_scancollar_in),
105 .pce_ov(tcu_pce_ov),
106 .stop(1'b0)
107 );
108
109cl_a1_l1hdr_8x and_clk_hdr (
110 .l2clk(clk),
111 .pce (pce),
112 .l1clk(and_l1clk),
113 .se(tcu_scan_en),
114 .pce_ov(tcu_pce_ov),
115 .stop(1'b0)
116 );
117
118//------------------------------------------------------------------------
119// input flops
120//------------------------------------------------------------------------
121wire [7:0] rd_addr_array ;
122wire [7:0] wr_addr_array ;
123wire rd_en_d1 ;
124wire wr_en_d1 ;
125wire rd_en_array ;
126wire wr_en_array ;
127wire [137:0] din_array ;
128
129// Scan chain order according to layout:
130// scan_in-> din<137:69>, rd_addr<0:7>, rd_en, wr_en, wr_addr<0:7>, din<68:0>
131// -> scan_out
132
133cl_mc1_sram_msff_mo_8x ff_rd ( .si(rd_addr_so[7]), .so(rd_en_so), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
134 .d(rd_en), .mq(rd_en_d1) );
135
136cl_mc1_sram_msff_mo_8x rd_addr_so_7 ( .si(rd_addr_so[6]), .so(rd_addr_so[7]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
137 .d(rd_addr[7]), .mq(rd_addr_array[7]) );
138cl_mc1_sram_msff_mo_8x rd_addr_so_6 ( .si(rd_addr_so[5]), .so(rd_addr_so[6]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
139 .d(rd_addr[6]), .mq(rd_addr_array[6]) );
140cl_mc1_sram_msff_mo_8x rd_addr_so_5 ( .si(rd_addr_so[4]), .so(rd_addr_so[5]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
141 .d(rd_addr[5]), .mq(rd_addr_array[5]) );
142cl_mc1_sram_msff_mo_8x rd_addr_so_4 ( .si(rd_addr_so[3]), .so(rd_addr_so[4]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
143 .d(rd_addr[4]), .mq(rd_addr_array[4]) );
144cl_mc1_sram_msff_mo_8x rd_addr_so_3 ( .si(rd_addr_so[2]), .so(rd_addr_so[3]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
145 .d(rd_addr[3]), .mq(rd_addr_array[3]) );
146cl_mc1_sram_msff_mo_8x rd_addr_so_2 ( .si(rd_addr_so[1]), .so(rd_addr_so[2]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
147 .d(rd_addr[2]), .mq(rd_addr_array[2]) );
148cl_mc1_sram_msff_mo_8x rd_addr_so_1 ( .si(rd_addr_so[0]), .so(rd_addr_so[1]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
149 .d(rd_addr[1]), .mq(rd_addr_array[1]) );
150cl_mc1_sram_msff_mo_8x rd_addr_so_0 ( .si(din_so[69]), .so(rd_addr_so[0]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
151 .d(rd_addr[0]), .mq(rd_addr_array[0]) );
152
153cl_mc1_sram_msff_mo_phaseb_8x ff_wr_en ( .si(rd_en_so), .so(wr_en_so), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
154 .d(wr_en), .phaseb_mq(wr_en_d1) );
155
156cl_mc1_sram_msff_mo_phaseb_8x wr_addr_so_7 ( .si(wr_addr_so[6]), .so(wr_addr_so[7]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
157 .d(wr_addr[7]), .phaseb_mq(wr_addr_array[7]) );
158cl_mc1_sram_msff_mo_phaseb_8x wr_addr_so_6 ( .si(wr_addr_so[5]), .so(wr_addr_so[6]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
159 .d(wr_addr[6]), .phaseb_mq(wr_addr_array[6]) );
160cl_mc1_sram_msff_mo_phaseb_8x wr_addr_so_5 ( .si(wr_addr_so[4]), .so(wr_addr_so[5]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
161 .d(wr_addr[5]), .phaseb_mq(wr_addr_array[5]) );
162cl_mc1_sram_msff_mo_phaseb_8x wr_addr_so_4 ( .si(wr_addr_so[3]), .so(wr_addr_so[4]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
163 .d(wr_addr[4]), .phaseb_mq(wr_addr_array[4]) );
164cl_mc1_sram_msff_mo_phaseb_8x wr_addr_so_3 ( .si(wr_addr_so[2]), .so(wr_addr_so[3]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
165 .d(wr_addr[3]), .phaseb_mq(wr_addr_array[3]) );
166cl_mc1_sram_msff_mo_phaseb_8x wr_addr_so_2 ( .si(wr_addr_so[1]), .so(wr_addr_so[2]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
167 .d(wr_addr[2]), .phaseb_mq(wr_addr_array[2]) );
168cl_mc1_sram_msff_mo_phaseb_8x wr_addr_so_1 ( .si(wr_addr_so[0]), .so(wr_addr_so[1]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
169 .d(wr_addr[1]), .phaseb_mq(wr_addr_array[1]) );
170cl_mc1_sram_msff_mo_phaseb_8x wr_addr_so_0 ( .si(wr_en_so), .so(wr_addr_so[0]), .l1clk(l1clk), .and_clk(and_l1clk), .siclk(siclk), .soclk(soclk),
171 .d(wr_addr[0]), .phaseb_mq(wr_addr_array[0]) );
172
173
174cl_a1_msff_4x din_137 ( .si(scan_in), .so(din_so[137]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[137]), .q(din_array[137]) );
175cl_a1_msff_4x din_136 ( .si(din_so[137]), .so(din_so[136]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[136]), .q(din_array[136]) );
176cl_a1_msff_4x din_135 ( .si(din_so[136]), .so(din_so[135]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[135]), .q(din_array[135]) );
177cl_a1_msff_4x din_134 ( .si(din_so[135]), .so(din_so[134]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[134]), .q(din_array[134]) );
178cl_a1_msff_4x din_133 ( .si(din_so[134]), .so(din_so[133]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[133]), .q(din_array[133]) );
179cl_a1_msff_4x din_132 ( .si(din_so[133]), .so(din_so[132]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[132]), .q(din_array[132]) );
180cl_a1_msff_4x din_131 ( .si(din_so[132]), .so(din_so[131]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[131]), .q(din_array[131]) );
181cl_a1_msff_4x din_130 ( .si(din_so[131]), .so(din_so[130]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[130]), .q(din_array[130]) );
182
183cl_a1_msff_4x din_129 ( .si(din_so[130]), .so(din_so[129]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[129]), .q(din_array[129]) );
184cl_a1_msff_4x din_128 ( .si(din_so[129]), .so(din_so[128]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[128]), .q(din_array[128]) );
185cl_a1_msff_4x din_127 ( .si(din_so[128]), .so(din_so[127]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[127]), .q(din_array[127]) );
186cl_a1_msff_4x din_126 ( .si(din_so[127]), .so(din_so[126]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[126]), .q(din_array[126]) );
187cl_a1_msff_4x din_125 ( .si(din_so[126]), .so(din_so[125]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[125]), .q(din_array[125]) );
188cl_a1_msff_4x din_124 ( .si(din_so[125]), .so(din_so[124]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[124]), .q(din_array[124]) );
189cl_a1_msff_4x din_123 ( .si(din_so[124]), .so(din_so[123]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[123]), .q(din_array[123]) );
190cl_a1_msff_4x din_122 ( .si(din_so[123]), .so(din_so[122]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[122]), .q(din_array[122]) );
191cl_a1_msff_4x din_121 ( .si(din_so[122]), .so(din_so[121]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[121]), .q(din_array[121]) );
192cl_a1_msff_4x din_120 ( .si(din_so[121]), .so(din_so[120]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[120]), .q(din_array[120]) );
193
194cl_a1_msff_4x din_119 ( .si(din_so[120]), .so(din_so[119]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[119]), .q(din_array[119]) );
195cl_a1_msff_4x din_118 ( .si(din_so[119]), .so(din_so[118]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[118]), .q(din_array[118]) );
196cl_a1_msff_4x din_117 ( .si(din_so[118]), .so(din_so[117]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[117]), .q(din_array[117]) );
197cl_a1_msff_4x din_116 ( .si(din_so[117]), .so(din_so[116]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[116]), .q(din_array[116]) );
198cl_a1_msff_4x din_115 ( .si(din_so[116]), .so(din_so[115]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[115]), .q(din_array[115]) );
199cl_a1_msff_4x din_114 ( .si(din_so[115]), .so(din_so[114]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[114]), .q(din_array[114]) );
200cl_a1_msff_4x din_113 ( .si(din_so[114]), .so(din_so[113]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[113]), .q(din_array[113]) );
201cl_a1_msff_4x din_112 ( .si(din_so[113]), .so(din_so[112]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[112]), .q(din_array[112]) );
202cl_a1_msff_4x din_111 ( .si(din_so[112]), .so(din_so[111]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[111]), .q(din_array[111]) );
203cl_a1_msff_4x din_110 ( .si(din_so[111]), .so(din_so[110]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[110]), .q(din_array[110]) );
204
205cl_a1_msff_4x din_109 ( .si(din_so[110]), .so(din_so[109]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[109]), .q(din_array[109]) );
206cl_a1_msff_4x din_108 ( .si(din_so[109]), .so(din_so[108]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[108]), .q(din_array[108]) );
207cl_a1_msff_4x din_107 ( .si(din_so[108]), .so(din_so[107]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[107]), .q(din_array[107]) );
208cl_a1_msff_4x din_106 ( .si(din_so[107]), .so(din_so[106]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[106]), .q(din_array[106]) );
209cl_a1_msff_4x din_105 ( .si(din_so[106]), .so(din_so[105]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[105]), .q(din_array[105]) );
210cl_a1_msff_4x din_104 ( .si(din_so[105]), .so(din_so[104]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[104]), .q(din_array[104]) );
211cl_a1_msff_4x din_103 ( .si(din_so[104]), .so(din_so[103]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[103]), .q(din_array[103]) );
212cl_a1_msff_4x din_102 ( .si(din_so[103]), .so(din_so[102]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[102]), .q(din_array[102]) );
213cl_a1_msff_4x din_101 ( .si(din_so[102]), .so(din_so[101]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[101]), .q(din_array[101]) );
214cl_a1_msff_4x din_100 ( .si(din_so[101]), .so(din_so[100]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[100]), .q(din_array[100]) );
215
216cl_a1_msff_4x din_99 ( .si(din_so[100]), .so(din_so[99]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[99]), .q(din_array[99]) );
217cl_a1_msff_4x din_98 ( .si(din_so[99]), .so(din_so[98]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[98]), .q(din_array[98]) );
218cl_a1_msff_4x din_97 ( .si(din_so[98]), .so(din_so[97]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[97]), .q(din_array[97]) );
219cl_a1_msff_4x din_96 ( .si(din_so[97]), .so(din_so[96]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[96]), .q(din_array[96]) );
220cl_a1_msff_4x din_95 ( .si(din_so[96]), .so(din_so[95]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[95]), .q(din_array[95]) );
221cl_a1_msff_4x din_94 ( .si(din_so[95]), .so(din_so[94]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[94]), .q(din_array[94]) );
222cl_a1_msff_4x din_93 ( .si(din_so[94]), .so(din_so[93]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[93]), .q(din_array[93]) );
223cl_a1_msff_4x din_92 ( .si(din_so[93]), .so(din_so[92]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[92]), .q(din_array[92]) );
224cl_a1_msff_4x din_91 ( .si(din_so[92]), .so(din_so[91]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[91]), .q(din_array[91]) );
225cl_a1_msff_4x din_90 ( .si(din_so[91]), .so(din_so[90]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[90]), .q(din_array[90]) );
226
227cl_a1_msff_4x din_89 ( .si(din_so[90]), .so(din_so[89]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[89]), .q(din_array[89]) );
228cl_a1_msff_4x din_88 ( .si(din_so[89]), .so(din_so[88]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[88]), .q(din_array[88]) );
229cl_a1_msff_4x din_87 ( .si(din_so[88]), .so(din_so[87]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[87]), .q(din_array[87]) );
230cl_a1_msff_4x din_86 ( .si(din_so[87]), .so(din_so[86]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[86]), .q(din_array[86]) );
231cl_a1_msff_4x din_85 ( .si(din_so[86]), .so(din_so[85]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[85]), .q(din_array[85]) );
232cl_a1_msff_4x din_84 ( .si(din_so[85]), .so(din_so[84]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[84]), .q(din_array[84]) );
233cl_a1_msff_4x din_83 ( .si(din_so[84]), .so(din_so[83]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[83]), .q(din_array[83]) );
234cl_a1_msff_4x din_82 ( .si(din_so[83]), .so(din_so[82]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[82]), .q(din_array[82]) );
235cl_a1_msff_4x din_81 ( .si(din_so[82]), .so(din_so[81]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[81]), .q(din_array[81]) );
236cl_a1_msff_4x din_80 ( .si(din_so[81]), .so(din_so[80]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[80]), .q(din_array[80]) );
237
238cl_a1_msff_4x din_79 ( .si(din_so[80]), .so(din_so[79]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[79]), .q(din_array[79]) );
239cl_a1_msff_4x din_78 ( .si(din_so[79]), .so(din_so[78]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[78]), .q(din_array[78]) );
240cl_a1_msff_4x din_77 ( .si(din_so[78]), .so(din_so[77]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[77]), .q(din_array[77]) );
241cl_a1_msff_4x din_76 ( .si(din_so[77]), .so(din_so[76]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[76]), .q(din_array[76]) );
242cl_a1_msff_4x din_75 ( .si(din_so[76]), .so(din_so[75]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[75]), .q(din_array[75]) );
243cl_a1_msff_4x din_74 ( .si(din_so[75]), .so(din_so[74]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[74]), .q(din_array[74]) );
244cl_a1_msff_4x din_73 ( .si(din_so[74]), .so(din_so[73]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[73]), .q(din_array[73]) );
245cl_a1_msff_4x din_72 ( .si(din_so[73]), .so(din_so[72]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[72]), .q(din_array[72]) );
246cl_a1_msff_4x din_71 ( .si(din_so[72]), .so(din_so[71]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[71]), .q(din_array[71]) );
247cl_a1_msff_4x din_70 ( .si(din_so[71]), .so(din_so[70]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[70]), .q(din_array[70]) );
248
249cl_a1_msff_4x din_69 ( .si(din_so[70]), .so(din_so[69]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[69]), .q(din_array[69]) );
250cl_a1_msff_4x din_68 ( .si(wr_addr_so[7]), .so(din_so[68]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[68]), .q(din_array[68]) );
251cl_a1_msff_4x din_67 ( .si(din_so[68]), .so(din_so[67]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[67]), .q(din_array[67]) );
252cl_a1_msff_4x din_66 ( .si(din_so[67]), .so(din_so[66]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[66]), .q(din_array[66]) );
253cl_a1_msff_4x din_65 ( .si(din_so[66]), .so(din_so[65]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[65]), .q(din_array[65]) );
254cl_a1_msff_4x din_64 ( .si(din_so[65]), .so(din_so[64]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[64]), .q(din_array[64]) );
255cl_a1_msff_4x din_63 ( .si(din_so[64]), .so(din_so[63]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[63]), .q(din_array[63]) );
256cl_a1_msff_4x din_62 ( .si(din_so[63]), .so(din_so[62]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[62]), .q(din_array[62]) );
257cl_a1_msff_4x din_61 ( .si(din_so[62]), .so(din_so[61]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[61]), .q(din_array[61]) );
258cl_a1_msff_4x din_60 ( .si(din_so[61]), .so(din_so[60]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[60]), .q(din_array[60]) );
259
260cl_a1_msff_4x din_59 ( .si(din_so[60]), .so(din_so[59]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[59]), .q(din_array[59]) );
261cl_a1_msff_4x din_58 ( .si(din_so[59]), .so(din_so[58]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[58]), .q(din_array[58]) );
262cl_a1_msff_4x din_57 ( .si(din_so[58]), .so(din_so[57]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[57]), .q(din_array[57]) );
263cl_a1_msff_4x din_56 ( .si(din_so[57]), .so(din_so[56]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[56]), .q(din_array[56]) );
264cl_a1_msff_4x din_55 ( .si(din_so[56]), .so(din_so[55]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[55]), .q(din_array[55]) );
265cl_a1_msff_4x din_54 ( .si(din_so[55]), .so(din_so[54]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[54]), .q(din_array[54]) );
266cl_a1_msff_4x din_53 ( .si(din_so[54]), .so(din_so[53]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[53]), .q(din_array[53]) );
267cl_a1_msff_4x din_52 ( .si(din_so[53]), .so(din_so[52]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[52]), .q(din_array[52]) );
268cl_a1_msff_4x din_51 ( .si(din_so[52]), .so(din_so[51]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[51]), .q(din_array[51]) );
269cl_a1_msff_4x din_50 ( .si(din_so[51]), .so(din_so[50]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[50]), .q(din_array[50]) );
270
271cl_a1_msff_4x din_49 ( .si(din_so[50]), .so(din_so[49]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[49]), .q(din_array[49]) );
272cl_a1_msff_4x din_48 ( .si(din_so[49]), .so(din_so[48]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[48]), .q(din_array[48]) );
273cl_a1_msff_4x din_47 ( .si(din_so[48]), .so(din_so[47]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[47]), .q(din_array[47]) );
274cl_a1_msff_4x din_46 ( .si(din_so[47]), .so(din_so[46]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[46]), .q(din_array[46]) );
275cl_a1_msff_4x din_45 ( .si(din_so[46]), .so(din_so[45]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[45]), .q(din_array[45]) );
276cl_a1_msff_4x din_44 ( .si(din_so[45]), .so(din_so[44]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[44]), .q(din_array[44]) );
277cl_a1_msff_4x din_43 ( .si(din_so[44]), .so(din_so[43]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[43]), .q(din_array[43]) );
278cl_a1_msff_4x din_42 ( .si(din_so[43]), .so(din_so[42]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[42]), .q(din_array[42]) );
279cl_a1_msff_4x din_41 ( .si(din_so[42]), .so(din_so[41]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[41]), .q(din_array[41]) );
280cl_a1_msff_4x din_40 ( .si(din_so[41]), .so(din_so[40]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[40]), .q(din_array[40]) );
281
282cl_a1_msff_4x din_39 ( .si(din_so[40]), .so(din_so[39]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[39]), .q(din_array[39]) );
283cl_a1_msff_4x din_38 ( .si(din_so[39]), .so(din_so[38]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[38]), .q(din_array[38]) );
284cl_a1_msff_4x din_37 ( .si(din_so[38]), .so(din_so[37]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[37]), .q(din_array[37]) );
285cl_a1_msff_4x din_36 ( .si(din_so[37]), .so(din_so[36]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[36]), .q(din_array[36]) );
286cl_a1_msff_4x din_35 ( .si(din_so[36]), .so(din_so[35]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[35]), .q(din_array[35]) );
287cl_a1_msff_4x din_34 ( .si(din_so[35]), .so(din_so[34]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[34]), .q(din_array[34]) );
288cl_a1_msff_4x din_33 ( .si(din_so[34]), .so(din_so[33]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[33]), .q(din_array[33]) );
289cl_a1_msff_4x din_32 ( .si(din_so[33]), .so(din_so[32]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[32]), .q(din_array[32]) );
290cl_a1_msff_4x din_31 ( .si(din_so[32]), .so(din_so[31]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[31]), .q(din_array[31]) );
291cl_a1_msff_4x din_30 ( .si(din_so[31]), .so(din_so[30]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[30]), .q(din_array[30]) );
292
293cl_a1_msff_4x din_29 ( .si(din_so[30]), .so(din_so[29]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[29]), .q(din_array[29]) );
294cl_a1_msff_4x din_28 ( .si(din_so[29]), .so(din_so[28]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[28]), .q(din_array[28]) );
295cl_a1_msff_4x din_27 ( .si(din_so[28]), .so(din_so[27]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[27]), .q(din_array[27]) );
296cl_a1_msff_4x din_26 ( .si(din_so[27]), .so(din_so[26]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[26]), .q(din_array[26]) );
297cl_a1_msff_4x din_25 ( .si(din_so[26]), .so(din_so[25]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[25]), .q(din_array[25]) );
298cl_a1_msff_4x din_24 ( .si(din_so[25]), .so(din_so[24]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[24]), .q(din_array[24]) );
299cl_a1_msff_4x din_23 ( .si(din_so[24]), .so(din_so[23]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[23]), .q(din_array[23]) );
300cl_a1_msff_4x din_22 ( .si(din_so[23]), .so(din_so[22]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[22]), .q(din_array[22]) );
301cl_a1_msff_4x din_21 ( .si(din_so[22]), .so(din_so[21]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[21]), .q(din_array[21]) );
302cl_a1_msff_4x din_20 ( .si(din_so[21]), .so(din_so[20]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[20]), .q(din_array[20]) );
303
304cl_a1_msff_4x din_19 ( .si(din_so[20]), .so(din_so[19]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[19]), .q(din_array[19]) );
305cl_a1_msff_4x din_18 ( .si(din_so[19]), .so(din_so[18]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[18]), .q(din_array[18]) );
306cl_a1_msff_4x din_17 ( .si(din_so[18]), .so(din_so[17]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[17]), .q(din_array[17]) );
307cl_a1_msff_4x din_16 ( .si(din_so[17]), .so(din_so[16]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[16]), .q(din_array[16]) );
308cl_a1_msff_4x din_15 ( .si(din_so[16]), .so(din_so[15]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[15]), .q(din_array[15]) );
309cl_a1_msff_4x din_14 ( .si(din_so[15]), .so(din_so[14]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[14]), .q(din_array[14]) );
310cl_a1_msff_4x din_13 ( .si(din_so[14]), .so(din_so[13]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[13]), .q(din_array[13]) );
311cl_a1_msff_4x din_12 ( .si(din_so[13]), .so(din_so[12]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[12]), .q(din_array[12]) );
312cl_a1_msff_4x din_11 ( .si(din_so[12]), .so(din_so[11]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[11]), .q(din_array[11]) );
313cl_a1_msff_4x din_10 ( .si(din_so[11]), .so(din_so[10]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[10]), .q(din_array[10]) );
314
315cl_a1_msff_4x din_9 ( .si(din_so[10]), .so(din_so[9]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[9]), .q(din_array[9]) );
316cl_a1_msff_4x din_8 ( .si(din_so[9]), .so(din_so[8]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[8]), .q(din_array[8]) );
317cl_a1_msff_4x din_7 ( .si(din_so[8]), .so(din_so[7]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[7]), .q(din_array[7]) );
318cl_a1_msff_4x din_6 ( .si(din_so[7]), .so(din_so[6]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[6]), .q(din_array[6]) );
319cl_a1_msff_4x din_5 ( .si(din_so[6]), .so(din_so[5]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[5]), .q(din_array[5]) );
320cl_a1_msff_4x din_4 ( .si(din_so[5]), .so(din_so[4]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[4]), .q(din_array[4]) );
321cl_a1_msff_4x din_3 ( .si(din_so[4]), .so(din_so[3]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[3]), .q(din_array[3]) );
322cl_a1_msff_4x din_2 ( .si(din_so[3]), .so(din_so[2]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[2]), .q(din_array[2]) );
323cl_a1_msff_4x din_1 ( .si(din_so[2]), .so(din_so[1]), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[1]), .q(din_array[1]) );
324cl_a1_msff_4x din_0 ( .si(din_so[1]), .so(scan_out), .l1clk(l1clk), .siclk(siclk), .soclk(soclk), .d(din[0]), .q(din_array[0]) );
325
326
327//------------------------------------------------------------------------
328// instantiate the clock-less ram
329//------------------------------------------------------------------------
330
331n2_peu_dp_256x138s_cust_array plp_rbuf_ram (
332 .wr_addr_array (wr_addr_array[7:0]),
333 .wr_en_array (wr_en_array),
334 .din_array (din_array[137:0]),
335 .clk (and_l1clk),
336 .rd_addr_array (rd_addr_array[7:0]),
337 .rd_en_array (rd_en_array),
338 .dout_array (dout[137:0])
339 );
340
341assign wr_en_array = wr_en_d1 & ! tcu_array_wr_inhibit ;
342assign rd_en_array = rd_en_d1 & ! tcu_array_wr_inhibit ;
343
344
345endmodule //n2_peu_dp_256x138s_cust
346
347
Full OpenSPARC design & verification tarball including full HDL.