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1 | #!/import/bw/tools/local/perl-5.8.0/bin/perl -w |
2 | ||
3 | eval 'exec /import/bw/tools/local/perl-5.8.0/bin/perl -w -S $0 ${1+"$@"}' | |
4 | if 0; # not running under some shell | |
5 | ||
6 | use strict; | |
7 | use warnings; | |
8 | use lib '.'; | |
9 | ||
10 | use ScanTest; | |
11 | ||
12 | &ScanTest::BlockFlow::BlockFlow; | |
13 | ||
14 | __END__ | |
15 | ||
16 | =head1 NAME | |
17 | ||
18 | scantest - Perl script for scan pattern generation. | |
19 | ||
20 | =head1 SYNOPSIS | |
21 | ||
22 | scantest [options] gate_level_netlist | |
23 | ||
24 | =head1 ABSTRACT | |
25 | ||
26 | "scantest" is a front-end interface for use of the ScanTest | |
27 | package for automatic test pattern generation using FastScan. | |
28 | "scantest" controls the creation of the test procedure file, | |
29 | FastScan command file and execution script, as well as the | |
30 | generation and simulation of test patterns. | |
31 | ||
32 | =head1 DESCRIPTION | |
33 | ||
34 | The intention behind "scantest" is to simplify the ATPG flow. | |
35 | If a design file conforms to the built-in defaults the entire | |
36 | flow can be run by specifying only the design file: | |
37 | ||
38 | =over 4 | |
39 | ||
40 | scantest design_file | |
41 | ||
42 | =back | |
43 | ||
44 | The default design settings are as follows: | |
45 | ||
46 | =over | |
47 | ||
48 | =item * one scan chain | |
49 | ||
50 | =item * clock port is named "clk" | |
51 | ||
52 | =item * scanin port is named "si" | |
53 | ||
54 | =item * scanout port is named "so" | |
55 | ||
56 | =item * scanenable port is named "se" | |
57 | ||
58 | =back | |
59 | ||
60 | If the design does not conform to these defaults, switches | |
61 | are available to modify the operation of "scantest". | |
62 | ||
63 | =head2 OPTIONS | |
64 | ||
65 | =over | |
66 | ||
67 | =item -[no]atpg | |
68 | ||
69 | Run atpg only. If the option is negated, only simulation | |
70 | is performed. This is the same as specifying "-sim" | |
71 | ||
72 | =item -bb or -blackbox | |
73 | ||
74 | Enable automatic black box recognition. Typically this option | |
75 | should not be required. The switch can be used to force | |
76 | continuation of the flow in the presence of missing cells. | |
77 | Coverage is likely to be poor. | |
78 | ||
79 | Before setting this switch the user is advised to check that | |
80 | correct version of the library is being referenced and that | |
81 | all verilog files have been specified. | |
82 | ||
83 | In the event that a view is known to be missing (such as a | |
84 | memory block) this switch will need to be specified. | |
85 | ||
86 | =item -clk | |
87 | ||
88 | Introduces a comma separated list of rising edge active clocks. | |
89 | Default settings are overridden. Default names must be given | |
90 | explicitly if needed. | |
91 | ||
92 | =item -comb | |
93 | ||
94 | Specifies that the block has no sequential cells. Normally | |
95 | "scantest" searches for the presence of default or user | |
96 | specified clock ports. Specifying "-comb" suppresses this | |
97 | behavior. | |
98 | ||
99 | =item -design | |
100 | ||
101 | Optional switch that introduces a single design file. | |
102 | ||
103 | =item -dftlib | |
104 | ||
105 | Allows a non-default FastScan library to be specified. | |
106 | ||
107 | The DFT library is normally "$LIBDIR/u1/atpg/u1.mdl". | |
108 | This switch is provided for library debug purposes. Do not | |
109 | use it in the normal flow! | |
110 | ||
111 | =item -[no]dofile | |
112 | ||
113 | If set, this switch causes only the FastScan command file | |
114 | (dofile) to be generated. | |
115 | ||
116 | If negated, the switch allows the flow to proceed without | |
117 | generating a new default command file. The command file | |
118 | should be already present. This switch allows the user | |
119 | to develop a custom command file. | |
120 | ||
121 | =item -dumpdir | |
122 | ||
123 | Allows a non-default dump directory to be specified. | |
124 | ||
125 | By default, "scantest" creates a dump area for simulation | |
126 | files in either "/export/home/bw" (scratch area available | |
127 | when running under dream) or "/tmp". The user is free to | |
128 | choose somewhere else. | |
129 | ||
130 | A subdirectory composed of the user's name and process | |
131 | id is created into which the simulation files are dumped. | |
132 | ||
133 | =over | |
134 | ||
135 | NOTE: The dump directory is never cleaned out. The user | |
136 | is responsible for ensuring that unnecessary files are | |
137 | removed. | |
138 | ||
139 | =back | |
140 | ||
141 | =item -flist | |
142 | ||
143 | Specifies verilog include files. This switch is necessary | |
144 | if the design is spread over multiple files. | |
145 | ||
146 | By default no include files are assumed. | |
147 | ||
148 | =item -fslog | |
149 | ||
150 | Specifies an alternate name for the fastscan log file. | |
151 | ||
152 | =item -help | |
153 | ||
154 | Prints the list of switches with brief descriptions and | |
155 | default settings. | |
156 | ||
157 | =item -hi | |
158 | ||
159 | Introduces a comma separated list of input ports which | |
160 | need to be contrained high. | |
161 | ||
162 | By default none are assumed. | |
163 | ||
164 | =item -lo | |
165 | ||
166 | Introduces a comma separated list of input ports which | |
167 | need to be contrained low. | |
168 | ||
169 | By default none are assumed. | |
170 | ||
171 | =item -ph1 | |
172 | ||
173 | Introduces a comma separated list of rising edge active clocks. | |
174 | This switch is an alias for "clk". | |
175 | ||
176 | =item -ph2 | |
177 | ||
178 | Introduces a comma separated list of falling edge active clocks. | |
179 | ||
180 | By default none are assumed. | |
181 | ||
182 | =item -[no]runfile | |
183 | ||
184 | If set, this switch causes only the FastScan run file to be | |
185 | generated. | |
186 | ||
187 | If negated, the switch allows the flow to proceed without | |
188 | generating a new default run file. The run file needs to | |
189 | be already present. This switch allows the user to invoke | |
190 | FastScan with customized settings. | |
191 | ||
192 | =item -se | |
193 | ||
194 | Introduces a comma separated list of scanenable ports. | |
195 | Typically, only one scan enable port is expected. This | |
196 | switch is provided to specify a non-default port name. | |
197 | ||
198 | In the event that the default name, "se", is also required | |
199 | it needs to be explicitly specified. | |
200 | ||
201 | =item -si | |
202 | ||
203 | Introduces a comma separated list of scanin ports. The | |
204 | default setting is overwritten. If the default name, "si", | |
205 | is also required it needs to be explicitly specified. | |
206 | ||
207 | The order of the scanin ports must match that of the | |
208 | corresponding scanout ports. | |
209 | ||
210 | =item -[no]simulation | |
211 | ||
212 | If set, this switch causes only simulation to be performed. | |
213 | If negated, the switch halts the flow after pattern | |
214 | generation. | |
215 | ||
216 | =item -smalljob | |
217 | ||
218 | Selects a 20 minute FastScan license. This works for small | |
219 | jobs when no licence is available on the default large queue. | |
220 | ||
221 | =item -so | |
222 | ||
223 | Introduces a comma separated list of scanout ports. The | |
224 | default setting is overwritten. If the default name, "so", | |
225 | is also required it needs to be explicitly specified. | |
226 | ||
227 | The order of the scanout ports must match that of the | |
228 | corresponding scanin ports. | |
229 | ||
230 | =item -[no]tpfile | |
231 | ||
232 | If set, this switch causes only the FastScan test procedure | |
233 | file to be generated. | |
234 | ||
235 | If negated, the switch allows the flow to proceed without | |
236 | generating a new default test procedure file. The test | |
237 | procedure file should be already present. This switch allows | |
238 | the user to develop a custom protocol. | |
239 | ||
240 | =item -top | |
241 | ||
242 | This switch specifies the name of the top module. By default | |
243 | the top module name is taken from the root of the design | |
244 | file. The switch is necessary if the top module name does | |
245 | not match the design file name or if there are multiple top | |
246 | modules present. | |
247 | ||
248 | =item -verbose | |
249 | ||
250 | If set, this switch will cause untestable fault information | |
251 | to be added to the ATPG log file. If coverage is low, this | |
252 | additional information could be large. | |
253 | ||
254 | =item -vverbose | |
255 | ||
256 | The "vverbose" flag adds instance coverage information to | |
257 | the ATPG log file. If the design file contains a large number | |
258 | of instances, printing the additional statistics slows down | |
259 | the flow and increases the size of the log file. | |
260 | ||
261 | =item -vlist | |
262 | ||
263 | Allows multiple design files and/or libraries to be listed | |
264 | in a separate file. Internally this switch is used to reference | |
265 | the m1 library ("$LIBDIR/m1/compiled/m1.vL"). If this switch | |
266 | is used and the m1 library also needs to be referenced the | |
267 | library must be explicitly specified. | |
268 | ||
269 | =head1 ENVIRONMENT | |
270 | ||
271 | "scantest" uses two environment variables: | |
272 | ||
273 | =item LIBDIR | |
274 | ||
275 | Specifies the location of the design libraries. | |
276 | ||
277 | =item USER | |
278 | ||
279 | Identifies where the default dump directory will be created. | |
280 | ||
281 | =back | |
282 | ||
283 | =head1 SEE ALSO | |
284 | ||
285 | ScanTest(3), http://www.mentor.com/dft | |
286 | ||
287 | =head1 AUTHOR | |
288 | ||
289 | Roger Mistely, E<lt>roger.mistely@sun.comE<gt> | |
290 | ||
291 | =cut |