Commit | Line | Data |
---|---|---|
86530b38 AT |
1 | # Globals configs |
2 | # | |
3 | $num_threads_per_node = 64; | |
4 | $num_threads_per_core = 8; | |
5 | ||
6 | # Override register lists | |
7 | our @allregs = qw(f0 f2 f4 f6 f8 f10 f12 f14 | |
8 | f16 f18 f20 f22 f24 f26 f28 f30 | |
9 | f32 f34 f36 f38 f40 f42 f44 f46 | |
10 | f48 f50 f52 f54 f56 f58 f60 f62 | |
11 | PC NPC CWP CCR FPRS FSR PSTATE | |
12 | HPSTATE ASI TICK TL PIL | |
13 | CANSAVE CANRESTORE CLEANWIN OTHERWIN | |
14 | VER WSTATE GL TBA HTBA | |
15 | TICK_CMPR STICK_CMPR HSTICK_CMPR | |
16 | HINTP SOFTINT GSR INTR_RECEIVE | |
17 | TPC1 TNPC1 TSTATE1 TT1 | |
18 | TPC2 TNPC2 TSTATE2 TT2 | |
19 | TPC3 TNPC3 TSTATE3 TT3 | |
20 | TPC4 TNPC4 TSTATE4 TT4 | |
21 | TPC5 TNPC5 TSTATE5 TT5 | |
22 | TPC6 TNPC6 TSTATE6 TT6 | |
23 | HTSTATE1 HTSTATE2 HTSTATE3 HTSTATE4 | |
24 | HTSTATE5 HTSTATE6 | |
25 | LSU_CONTROL WATCHPOINT_ADDR | |
26 | CTXT_PRIM_0 CTXT_SEC_0 | |
27 | CTXT_PRIM_1 CTXT_SEC_1 | |
28 | I_TAG_ACC D_TAG_ACC DSFAR | |
29 | CTXT_Z_TSB_CFG0 CTXT_Z_TSB_CFG1 | |
30 | CTXT_Z_TSB_CFG2 CTXT_Z_TSB_CFG3 | |
31 | CTXT_NZ_TSB_CFG0 CTXT_NZ_TSB_CFG1 | |
32 | CTXT_NZ_TSB_CFG2 CTXT_NZ_TSB_CFG3 | |
33 | ) ; | |
34 | ||
35 | # Initial state | |
36 | sub init_state { | |
37 | my $tid = shift; | |
38 | $state{$tid}{0}{"PC"} = "0000fffff0000020"; | |
39 | $state{$tid}{0}{"NPC"} = "0000fffff0000024"; | |
40 | $state{$tid}{0}{"CCR"} = "0000000000000000"; | |
41 | $state{$tid}{0}{"FPRS"} = "0000000000000004"; | |
42 | $state{$tid}{0}{"VER"} = "003e002410030607"; | |
43 | $state{$tid}{0}{"PSTATE"} = "0000000000000014"; | |
44 | $state{$tid}{0}{"HPSTATE"} = "0000000000000024"; | |
45 | $state{$tid}{0}{"TL"} = "0000000000000006"; | |
46 | $state{$tid}{0}{"TT6"} = "0000000000000001"; | |
47 | $state{$tid}{0}{"GL"} = "0000000000000003"; | |
48 | $state{$tid}{0}{"TICK"} = "8000000000000000"; | |
49 | } # }}} | |
50 | ||
51 | ||
52 | ||
53 | # Need this | |
54 | 1; |