projects / OpenSPARC-T2-DV / blame
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| 86530b38 AT |
1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * OpenSPARC T2 Processor File: n2_err_adv_piu_mix_1.s | |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 7 | * | |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License as published by | |
| 12 | * the Free Software Foundation; version 2 of the License. | |
| 13 | * | |
| 14 | * This program is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public License | |
| 20 | * along with this program; if not, write to the Free Software | |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 22 | * | |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license | |
| 24 | * choice is available it will apply instead, Sun elects to use only | |
| 25 | * the General Public License version 2 (GPLv2) at this time for any | |
| 26 | * software where a choice of GPL license versions is made | |
| 27 | * available with the language indicating that GPLv2 or any later version | |
| 28 | * may be used, or where a choice of which version of the GPL is applied is | |
| 29 | * otherwise unspecified. | |
| 30 | * | |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 33 | * have any questions. | |
| 34 | * | |
| 35 | * | |
| 36 | * ========== Copyright Header End ============================================ | |
| 37 | */ | |
| 38 | #define ENABLE_PCIE_LINK_TRAINING | |
| 39 | /* #define MAIN_PAGE_NUCLEUS_ALSO */ /* Access main in priviledge mode */ | |
| 40 | #define MAIN_PAGE_HV_ALSO | |
| 41 | ||
| 42 | #ifdef BANK0 | |
| 43 | #define DRAM_ERR_STAT_REG 0x8400000280 | |
| 44 | #define L2_ERR_STAT_REG 0xAB00000000 | |
| 45 | #endif | |
| 46 | ||
| 47 | #ifdef BANK1 | |
| 48 | #define DRAM_ERR_STAT_REG 0x8400000280 | |
| 49 | #define L2_ERR_STAT_REG 0xAB00000040 | |
| 50 | #endif | |
| 51 | ||
| 52 | #ifdef BANK2 | |
| 53 | #define DRAM_ERR_STAT_REG 0x8400001280 | |
| 54 | #define L2_ERR_STAT_REG 0xAB00000080 | |
| 55 | #endif | |
| 56 | ||
| 57 | #ifdef BANK3 | |
| 58 | #define DRAM_ERR_STAT_REG 0x8400001280 | |
| 59 | #define L2_ERR_STAT_REG 0xAB000000c0 | |
| 60 | #endif | |
| 61 | ||
| 62 | #ifdef BANK4 | |
| 63 | #define DRAM_ERR_STAT_REG 0x8400002280 | |
| 64 | #define L2_ERR_STAT_REG 0xAB00000100 | |
| 65 | #endif | |
| 66 | ||
| 67 | #ifdef BANK5 | |
| 68 | #define DRAM_ERR_STAT_REG 0x8400002280 | |
| 69 | #define L2_ERR_STAT_REG 0xAB00000140 | |
| 70 | #endif | |
| 71 | ||
| 72 | #ifdef BANK6 | |
| 73 | #define DRAM_ERR_STAT_REG 0x8400003280 | |
| 74 | #define L2_ERR_STAT_REG 0xAB00000180 | |
| 75 | #endif | |
| 76 | ||
| 77 | #ifdef BANK7 | |
| 78 | #define DRAM_ERR_STAT_REG 0x8400003280 | |
| 79 | #define L2_ERR_STAT_REG 0xAB000001c0 | |
| 80 | #endif | |
| 81 | ||
| 82 | ||
| 83 | #include "err_defines.h" | |
| 84 | #include "hboot.s" | |
| 85 | #include "peu_defines.h" | |
| 86 | ||
| 87 | #define DMA_DATA_ADDR 0x0000000123456700 | |
| 88 | #define DMA_DATA_BYP_ADDR1 0xfffc000123456700 | |
| 89 | #define DMA_DATA_BYP_ADDR2 0xfffc000123456780 | |
| 90 | #define DMA_DATA_BYP_ADDR3 0xfffc000123456800 | |
| 91 | ||
| 92 | #define DMA_DATA_ADDR 0x0000000123456700 | |
| 93 | #define DMA_DATA_BYP_SADDR 0xfffc000123456700 | |
| 94 | #define DMA_DATA_BYP_EADDR 0xfffc000123456800 | |
| 95 | ||
| 96 | #ifdef BANK0 | |
| 97 | #define DMA_DATA_BYP_ADDR1 0xfffc000123450000 | |
| 98 | #define DMA_DATA_BYP_ADDR2 0xfffc000123450080 | |
| 99 | #define DMA_DATA_BYP_ADDR3 0xfffc000123450100 | |
| 100 | #endif | |
| 101 | ||
| 102 | #ifdef BANK1 | |
| 103 | #define DMA_DATA_BYP_ADDR1 0xfffc000123456040 | |
| 104 | #endif | |
| 105 | ||
| 106 | #ifdef BANK2 | |
| 107 | #define DMA_DATA_BYP_ADDR1 0xfffc000123456080 | |
| 108 | #endif | |
| 109 | ||
| 110 | #ifdef BANK3 | |
| 111 | #define DMA_DATA_BYP_ADDR1 0xfffc0001234560c0 | |
| 112 | #endif | |
| 113 | ||
| 114 | #ifdef BANK4 | |
| 115 | #define DMA_DATA_BYP_ADDR1 0xfffc000123456100 | |
| 116 | #endif | |
| 117 | ||
| 118 | #ifdef BANK5 | |
| 119 | #define DMA_DATA_BYP_ADDR1 0xfffc000123456140 | |
| 120 | #endif | |
| 121 | ||
| 122 | #ifdef BANK6 | |
| 123 | #define DMA_DATA_BYP_ADDR1 0xfffc000123456180 | |
| 124 | #endif | |
| 125 | ||
| 126 | #ifdef BANK7 | |
| 127 | #define DMA_DATA_BYP_ADDR1 0xfffc0001234561c0 | |
| 128 | #endif | |
| 129 | ||
| 130 | ||
| 131 | ||
| 132 | #define ERR_BITS 0x184800408 | |
| 133 | #define ERR_BITS_EXPECT 0x8000000000000408 | |
| 134 | ||
| 135 | ||
| 136 | /************************************************************************ | |
| 137 | Test case code start | |
| 138 | ************************************************************************/ | |
| 139 | .text | |
| 140 | .global main | |
| 141 | .global My_Corrected_ECC_error_trap | |
| 142 | .global My_Recoverable_Sw_error_trap | |
| 143 | ||
| 144 | main: | |
| 145 | ta T_CHANGE_HPRIV | |
| 146 | nop | |
| 147 | ||
| 148 | clr %i7 | |
| 149 | clr %o6 | |
| 150 | clr %o7 | |
| 151 | clr %i0 | |
| 152 | ||
| 153 | ||
| 154 | bypass_iommu: | |
| 155 | ! enable bypass in IOMMU | |
| 156 | setx FIRE_DLC_MMU_CSR_A_CTL_ADDR, %g1, %g2 | |
| 157 | setx FIRE_DLC_MMU_CSR_A_CTL__BYPASS_EN, %g1, %g3 | |
| 158 | stx %g3, [%g2] | |
| 159 | ldx [%g2], %g3 | |
| 160 | ||
| 161 | /******************************************************* | |
| 162 | RDD from DMU | |
| 163 | ********************************************************/ | |
| 164 | set_ejr_rdd: | |
| 165 | setx ERR_BITS, %l7, %g5 | |
| 166 | ||
| 167 | setx SOC_EJR_REG, %l7, %i3 | |
| 168 | stx %g5, [%i3] | |
| 169 | membar 0x40 | |
| 170 | ||
| 171 | dma_rdd: | |
| 172 | nop | |
| 173 | UsrEvnt_rdd: | |
| 174 | nop ! $EV trig_pc_d(1, @VA(.MAIN.UsrEvnt_rdd)) -> EnablePCIeIgCmd ("DMARD", DMA_DATA_BYP_ADDR1, DMA_DATA_BYP_ADDR3, "64'h40", 1, *, * ) | |
| 175 | ||
| 176 | ldx [%g2], %g3 | |
| 177 | ldx [%g2], %g3 | |
| 178 | ldx [%g2], %g3 | |
| 179 | ldx [%g2], %g3 | |
| 180 | ||
| 181 | dma_wri: | |
| 182 | nop | |
| 183 | ||
| 184 | set_ejr_wri: | |
| 185 | set ERR_BITS, %g5 | |
| 186 | ||
| 187 | setx SOC_EJR_REG, %l7, %i3 | |
| 188 | stx %g5, [%i3] | |
| 189 | membar 0x40 | |
| 190 | ||
| 191 | UsrEvnt_wri: | |
| 192 | nop ! $EV trig_pc_d(1, @VA(.MAIN.UsrEvnt_wri)) -> EnablePCIeIgCmd ("DMAWR", DMA_DATA_BYP_ADDR1, DMA_DATA_BYP_ADDR3, "64'h40", 1, *, * ) | |
| 193 | ||
| 194 | ldx [%g2], %g3 | |
| 195 | ldx [%g2], %g3 | |
| 196 | ldx [%g2], %g3 | |
| 197 | ldx [%g2], %g3 | |
| 198 | ||
| 199 | dma_wrm: | |
| 200 | nop | |
| 201 | ||
| 202 | set_ejr_wrm: | |
| 203 | set ERR_BITS, %g5 | |
| 204 | ||
| 205 | setx SOC_EJR_REG, %l7, %i3 | |
| 206 | stx %g5, [%i3] | |
| 207 | membar 0x40 | |
| 208 | ||
| 209 | ||
| 210 | UsrEvnt_wrm: | |
| 211 | nop ! $EV trig_pc_d(1, @VA(.MAIN.UsrEvnt_wrm)) -> EnablePCIeIgCmd ("DMAWR", DMA_DATA_BYP_ADDR1, DMA_DATA_BYP_ADDR3, "64'h10", 1, *, * ) | |
| 212 | ||
| 213 | ldx [%g2], %g3 | |
| 214 | ldx [%g2], %g3 | |
| 215 | ldx [%g2], %g3 | |
| 216 | ldx [%g2], %g3 | |
| 217 | ||
| 218 | test_passed: | |
| 219 | EXIT_GOOD | |
| 220 | ||
| 221 | test_failed: | |
| 222 | EXIT_BAD | |
| 223 | ||
| 224 | ||
| 225 | ||
| 226 | ||
| 227 | /************************************************************************ | |
| 228 | Test case data start | |
| 229 | ************************************************************************/ | |
| 230 | ||
| 231 | SECTION .DATA DATA_VA=DMA_DATA_ADDR | |
| 232 | attr_data { | |
| 233 | Name = .DATA, | |
| 234 | hypervisor, | |
| 235 | compressimage | |
| 236 | } | |
| 237 | ||
| 238 | .data | |
| 239 | .global PCIAddr9 | |
| 240 | .xword 0x0001020304050607 | |
| 241 | .xword 0x08090a0b0c0d0e0f | |
| 242 | .xword 0x1011121314151617 | |
| 243 | .xword 0x18191a1b1c1d1e1f | |
| 244 | .xword 0x2021222324252627 | |
| 245 | .xword 0x28292a2b2c2d2e2f | |
| 246 | .xword 0x3031323334353637 | |
| 247 | .xword 0x38393a3b3c3d3e3f | |
| 248 | ||
| 249 | .xword 0x4041424344454647 | |
| 250 | .xword 0x48494a4b4c4d4e4f | |
| 251 | .xword 0x5051525354555657 | |
| 252 | .xword 0x58595a5b5c5d5e5f | |
| 253 | .xword 0x6061626364656667 | |
| 254 | .xword 0x68696a6b6c6d6e6f | |
| 255 | .xword 0x7071727374757677 | |
| 256 | .xword 0x78797a7b7c7d7e7f | |
| 257 | ||
| 258 | .xword 0x8081828384858687 | |
| 259 | .xword 0x88898a8b8c8d8e8f | |
| 260 | .xword 0x9091929394959697 | |
| 261 | .xword 0x98999a9b9c9d9e9f | |
| 262 | .xword 0xa0a1a2a3a4a5a6a7 | |
| 263 | .xword 0xa8a9aaabacadaeaf | |
| 264 | .xword 0xb0b1b2b3b4b5b6b7 | |
| 265 | .xword 0xb8b9babbbcbdbebf | |
| 266 | ||
| 267 | .xword 0xc0c1c2c3c4c5c6c7 | |
| 268 | .xword 0xc8c9cacbcccdcecf | |
| 269 | .xword 0xd0d1d2d3d4d5d6d7 | |
| 270 | .xword 0xd8d9dadbdcdddedf | |
| 271 | .xword 0xe0e1e2e3e4e5e6e7 | |
| 272 | .xword 0xe8e9eaebecedeeef | |
| 273 | .xword 0xf0f1f2f3f4f5f6f7 | |
| 274 | .xword 0xf8f9fafbfcfdfeff | |
| 275 | ||
| 276 | .xword 0x0001020304050607 | |
| 277 | .xword 0x08090a0b0c0d0e0f | |
| 278 | .xword 0x1011121314151617 | |
| 279 | .xword 0x18191a1b1c1d1e1f | |
| 280 | .xword 0x2021222324252627 | |
| 281 | .xword 0x28292a2b2c2d2e2f | |
| 282 | .xword 0x3031323334353637 | |
| 283 | .xword 0x38393a3b3c3d3e3f | |
| 284 | ||
| 285 | .xword 0x4041424344454647 | |
| 286 | .xword 0x48494a4b4c4d4e4f | |
| 287 | .xword 0x5051525354555657 | |
| 288 | .xword 0x58595a5b5c5d5e5f | |
| 289 | .xword 0x6061626364656667 | |
| 290 | .xword 0x68696a6b6c6d6e6f | |
| 291 | .xword 0x7071727374757677 | |
| 292 | .xword 0x78797a7b7c7d7e7f | |
| 293 | ||
| 294 | .xword 0x8081828384858687 | |
| 295 | .xword 0x88898a8b8c8d8e8f | |
| 296 | .xword 0x9091929394959697 | |
| 297 | .xword 0x98999a9b9c9d9e9f | |
| 298 | .xword 0xa0a1a2a3a4a5a6a7 | |
| 299 | .xword 0xa8a9aaabacadaeaf | |
| 300 | .xword 0xb0b1b2b3b4b5b6b7 | |
| 301 | .xword 0xb8b9babbbcbdbebf | |
| 302 | ||
| 303 | .xword 0xc0c1c2c3c4c5c6c7 | |
| 304 | .xword 0xc8c9cacbcccdcecf | |
| 305 | .xword 0xd0d1d2d3d4d5d6d7 | |
| 306 | .xword 0xd8d9dadbdcdddedf | |
| 307 | .xword 0xe0e1e2e3e4e5e6e7 | |
| 308 | .xword 0xe8e9eaebecedeeef | |
| 309 | .xword 0xf0f1f2f3f4f5f6f7 | |
| 310 | .xword 0xf8f9fafbfcfdfeff | |
| 311 | ||
| 312 | /************************************************************************/ | |
| 313 |