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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: n2_err_l2_LDRU_Rd_uecc_trap.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define H_HT0_Sw_Recoverable_Error_0x40 My_Recoverable_Sw_error_trap | |
39 | ||
40 | ||
41 | #define MAIN_PAGE_HV_ALSO | |
42 | ||
43 | ||
44 | #define L2_ENTRY_PA 0xa000000000 | |
45 | #define TEST_DATA1 0x5555555555555555 | |
46 | #define L2_ENTRY_PA0 0x2020000008 | |
47 | #define L2_ES_W1C_VALUE 0xc03ffff800000000 | |
48 | #define SPARC_ES_W1C_VALUE 0xefffffff | |
49 | #define TT_SW_Error 0x40 | |
50 | ||
51 | #include "hboot.s" | |
52 | #include "asi_s.h" | |
53 | #include "err_defines.h" | |
54 | ||
55 | .text | |
56 | .global main | |
57 | .global My_Recoverable_Sw_error_trap | |
58 | ||
59 | ||
60 | main: | |
61 | ||
62 | ||
63 | ! Boot code does not provide TLB translation for IO address space | |
64 | ta T_CHANGE_HPRIV | |
65 | ||
66 | ||
67 | disable_l1_DCache: | |
68 | ldxa [%g0] ASI_LSU_CONTROL, %l0 | |
69 | ! Remove bit 2 | |
70 | andn %l0, 0x2, %l0 | |
71 | stxa %l0, [%g0] ASI_LSU_CONTROL | |
72 | ||
73 | enable_err_reporting: | |
74 | setx L2EE_PA0, %l0, %l1 | |
75 | ldx [%l1], %l2 | |
76 | mov 0x3, %l0 | |
77 | or %l2, %l0, %l2 | |
78 | stx %l2, [%l1] | |
79 | ||
80 | ||
81 | clear_l2_ESR: | |
82 | setx L2_ES_W1C_VALUE, %l0, %l1 | |
83 | setx L2ES_PA0, %l6, %g1 | |
84 | stx %l1, [%g1] | |
85 | ||
86 | ||
87 | set_L2_Directly_Mapped_Mode: | |
88 | setx L2CS_PA0, %l6, %g1 ! Bit 1 in L2 Control Status Register | |
89 | mov 0x2, %l0 | |
90 | stx %l0, [%g1] | |
91 | ||
92 | store_to_L2: | |
93 | setx TEST_DATA1, %l0, %g5 | |
94 | ||
95 | store_to_L2_way0: | |
96 | setx 0x202000aa00, %l0, %g2 ! bits [21:18] select way | |
97 | stx %g5, [%g2] | |
98 | stx %g5, [%g2+8] | |
99 | membar #Sync | |
100 | ||
101 | L2_diag_load: | |
102 | setx 0x3ffff8, %l0, %l2 ! Mask for extracting [21:3] | |
103 | setx L2_ENTRY_PA, %l0, %g4 | |
104 | and %g2, %l2, %g5 !g2 has L2 PA, | |
105 | or %g5, %g4, %g5 !g5 now has Diagnostic Data Array address | |
106 | ldx [%g5], %g6 | |
107 | membar #Sync | |
108 | ||
109 | ! Flip two bits to inject error | |
110 | xor %g6, 0x300, %g6 | |
111 | stx %g6, [%g5] | |
112 | membar #Sync | |
113 | ||
114 | ldsw: | |
115 | nop; !$EV trig_pc_d(0,@VA(.MAIN.ldsw)) -> siuDmaRd(202000aa00,2,0) | |
116 | ||
117 | reading_back_0: !Load miss to L2 again to get the error trap | |
118 | setx 0x202000ba00, %l0, %g2 | |
119 | ldx [%g2], %l6 | |
120 | membar #Sync | |
121 | ||
122 | ||
123 | ||
124 | ||
125 | enable_l1_DCache: | |
126 | ldxa [%g0] ASI_LSU_CONTROL, %l0 | |
127 | or %l0, 0x2, %l0 | |
128 | stxa %l0, [%g0] ASI_LSU_CONTROL | |
129 | ||
130 | ||
131 | compute_error: | |
132 | mov 0x1, %l1 | |
133 | sllx %l1, L2ES_LDRU, %l7 | |
134 | sllx %l1, L2ES_VEU, %l3 | |
135 | or %l7, %l3, %l7 | |
136 | membar #Sync | |
137 | ||
138 | ||
139 | check_l2_ESR: | |
140 | setx L2ES_PA0, %l6, %g1 | |
141 | ldx [%g1], %l4 | |
142 | membar #Sync | |
143 | ||
144 | verify_ESR: | |
145 | cmp %l7, %l4 ! l7 has expected value, l4 has actual value | |
146 | bne test_fail | |
147 | ||
148 | ||
149 | check_l2_EAR: | |
150 | setx L2EA_PA0, %l6, %l3 | |
151 | ldx [%l3], %l4 | |
152 | membar #Sync | |
153 | ||
154 | verify_EAR: | |
155 | setx 0x202000aa00, %l0, %g2 ! bits [21:18] select way | |
156 | cmp %g2, %l4 ! g2 has expected value, l4 has actual value | |
157 | bne test_fail | |
158 | nop | |
159 | ||
160 | check_sw_err_trap: | |
161 | ! Check if a Software Recoverable Error Trap happened | |
162 | set EXECUTED, %l0 | |
163 | cmp %o0, %l0 | |
164 | bne test_fail | |
165 | nop | |
166 | mov TT_SW_Error, %l0 | |
167 | cmp %o1, %l0 | |
168 | bne test_fail | |
169 | nop | |
170 | ||
171 | load_DESR_L2C: | |
172 | ldxa [%g0] 0x4c, %g2 | |
173 | ||
174 | verify_DESR: | |
175 | setx 0x1f00000000000000, %l0,%l1 | |
176 | and %g2, %l1, %l3 | |
177 | set 16, %l4 | |
178 | sllx %l4, 0x38, %l5 | |
179 | cmp %l5, %l3 | |
180 | bne test_fail | |
181 | nop | |
182 | ||
183 | ||
184 | ba test_pass | |
185 | nop | |
186 | ||
187 | My_Recoverable_Sw_error_trap: | |
188 | ! Signal trap taken | |
189 | setx EXECUTED, %l0, %o0 | |
190 | ! save trap type value | |
191 | rdpr %tt, %o1 | |
192 | retry | |
193 | nop | |
194 | ||
195 | ||
196 | /******************************************************* | |
197 | * Exit code | |
198 | *******************************************************/ | |
199 | ||
200 | test_pass: | |
201 | ta T_GOOD_TRAP | |
202 | ||
203 | test_fail: | |
204 | ta T_BAD_TRAP |