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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: n2_err_ncu_peu_piord_eie.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define ENABLE_PCIE_LINK_TRAINING | |
39 | #define MAIN_PAGE_HV_ALSO | |
40 | ||
41 | #include "err_defines.h" | |
42 | #include "hboot.s" | |
43 | #include "peu_defines.h" | |
44 | ||
45 | ||
46 | #define IO_RD_ADDR mpeval((N2_PCIE_BASE_ADDR + (IOCFG_OFFSET_BASE_REG_DATA & 0x7fffffffffffffff)) | IO_ACCESS_PA) | |
47 | ||
48 | #define H_HT0_Data_access_Error_0x32 My_Data_access_error_trap | |
49 | ||
50 | /************************************************************************ | |
51 | Test case code start | |
52 | ************************************************************************/ | |
53 | .text | |
54 | .global main | |
55 | .global My_Data_access_error_trap | |
56 | ||
57 | main: | |
58 | ta T_CHANGE_HPRIV | |
59 | nop | |
60 | ||
61 | ||
62 | clear_esr_first: | |
63 | setx SOC_ESR_REG, %l7, %i0 | |
64 | stx %g0, [%i0] | |
65 | ||
66 | ||
67 | set_err_field: | |
68 | set 0x1, %i1 | |
69 | sllx %i1, ERR_FIELD, %i2 | |
70 | setx SOC_EIE_REG, %l7, %i3 | |
71 | ||
72 | set_eie: | |
73 | stx %i2, [%i3] | |
74 | membar 0x40 | |
75 | ||
76 | set_ejr: | |
77 | setx SOC_EJR_REG, %l7, %i3 | |
78 | stx %i2, [%i3] | |
79 | membar 0x40 | |
80 | ||
81 | pio: | |
82 | ! select an IO address in PCI address range and transmit the command to NCU | |
83 | setx IO_RD_ADDR, %g1, %g2 | |
84 | ||
85 | ! load byte - all byte offsets within an octlet | |
86 | ldub [%g2 + 1*8 + 0], %l0 | |
87 | ||
88 | setx 0x40, %l1, %g4 | |
89 | delay_loop: | |
90 | nop | |
91 | nop | |
92 | nop | |
93 | dec %g4 | |
94 | brnz %g4, delay_loop | |
95 | nop | |
96 | ||
97 | ||
98 | ||
99 | /****************************** | |
100 | Error Check | |
101 | ******************************/ | |
102 | err_check: | |
103 | nop | |
104 | ||
105 | check_esr: | |
106 | setx SOC_PER_REG, %l7, %i0 | |
107 | ldx [%i0], %i1 | |
108 | nop | |
109 | ||
110 | setx 0x8000000000000000, %l7, %o3 !valid bit | |
111 | set 0x1, %i2 | |
112 | sllx %i2, ERR_FIELD, %i3 | |
113 | or %i3, %o3, %i4 | |
114 | ||
115 | /* It will take trap whether EIE enabled or not as ld return data has the error bit set | |
116 | But if EIE is not set ESR data will not be copied to PER | |
117 | If EIE is set ESR data will be copied to ESR | |
118 | ||
119 | But for EIE set, ESR data might not be zero if followed by transaction | |
120 | again causes the error to be set; though in this case ESR should be zero | |
121 | as we dont have any following DMU PIO transaction, so no more error and esr is zero | |
122 | */ | |
123 | ||
124 | #ifdef EIE | |
125 | sub %i1, %g0, %i5 | |
126 | brnz %i5, test_failed | |
127 | nop | |
128 | #else | |
129 | sub %i1, %i4, %i5 | |
130 | brnz %i5, test_failed | |
131 | nop | |
132 | #endif | |
133 | ||
134 | ||
135 | check_per: | |
136 | setx SOC_PER_REG, %l7, %i0 | |
137 | ldx [%i0], %i1 | |
138 | nop | |
139 | ||
140 | #ifdef EIE | |
141 | sub %i1, %i4, %i5 | |
142 | brnz %i5, test_failed | |
143 | nop | |
144 | #else | |
145 | sub %i1, %g0, %i5 | |
146 | brnz %i5, test_failed | |
147 | nop | |
148 | #endif | |
149 | ||
150 | ||
151 | ! Check if a Corrected ECC Trap happened | |
152 | check_error_trap: | |
153 | setx EXECUTED, %l1, %l0 | |
154 | cmp %o0, %l0 | |
155 | bne test_fail | |
156 | nop | |
157 | mov TT, %l0 | |
158 | cmp %o1, %l0 | |
159 | bne test_fail | |
160 | nop | |
161 | /*************************************/ | |
162 | ||
163 | /********************************/ | |
164 | ||
165 | test_passed: | |
166 | EXIT_GOOD | |
167 | ||
168 | test_failed: | |
169 | EXIT_BAD | |
170 | ||
171 | ||
172 | My_Data_access_error_trap: | |
173 | ! Signal trap taken | |
174 | setx EXECUTED, %l0, %o0 | |
175 | ! save trap type value | |
176 | rdpr %tt, %o1 | |
177 | ba err_check | |
178 | nop | |
179 | ||
180 | ||
181 | /************************************************************************ | |
182 | Test case data start | |
183 | ************************************************************************/ | |
184 | ||
185 | SECTION .DATA DATA_VA=IO_RD_ADDR | |
186 | attr_data { | |
187 | Name = .DATA, | |
188 | hypervisor, | |
189 | compressimage | |
190 | } | |
191 | ||
192 | .data | |
193 | .xword 0xdeadbeefdeadbeef | |
194 | ||
195 | .xword 0x1101010101010101 | |
196 | .xword 0x0122010101010101 | |
197 | .xword 0x0101330101010101 | |
198 | .xword 0x0101014401010101 | |
199 | .xword 0x0101010155010101 | |
200 | .xword 0x0101010101660101 | |
201 | .xword 0x0101010101017701 | |
202 | .xword 0x0101010101010188 | |
203 | ||
204 | .xword 0x1122010101010101 | |
205 | .xword 0x0101334401010101 | |
206 | .xword 0x0101010155660101 | |
207 | .xword 0x0101010101017788 | |
208 | ||
209 | .xword 0x1122334401010101 | |
210 | .xword 0x0101010155667788 | |
211 | ||
212 | .xword 0xdeadbeefdeadbeef | |
213 | ||
214 | /************************************************************************/ |