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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / error / siu / n2_err_siu_trap.s
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AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: n2_err_siu_trap.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
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32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define H_HT0_Hw_Corrected_Error_0x63 My_Corrected_ECC_error_trap
39#define H_HT0_Sw_Recoverable_Error_0x40 My_Recoverable_Sw_error_trap
40
41
42/* #define MAIN_PAGE_NUCLEUS_ALSO */ /* Access main in priviledge mode */
43#define MAIN_PAGE_HV_ALSO
44
45#include "err_defines.h"
46#include "hboot.s"
47#include "niu_defines.h"
48
49/************************************************************************
50 Test case code start
51 ************************************************************************/
52.text
53.global main
54.global My_Corrected_ECC_error_trap
55.global My_Recoverable_Sw_error_trap
56
57main:
58 ta T_CHANGE_HPRIV
59 nop
60
61#include "niu_init.h"
62 clr %i6
63 clr %i7
64
65!
66! Thread 0 Start
67!
68!
69thread_0:
70
71Init_flow:
72 nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID)
73
74P_TxDMAActivate:
75 setx MAC_ID, %g1, %o0 ! 1st Parameter
76 setx SetTxDMAActive_list, %g1, %o1 ! 2st parameter
77 call SetTxDMAActive
78 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, TxDmaActive_list)
79
80P_AddTxChannels :
81 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, NIU_TxDmaNoUE)
82
83 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
84 nop
85
86P_SetTxMaxBurst :
87 setx NIU_TxDmaNo, %g1, %o0 ! 1st parameter :
88 setx SetTxMaxBurst_Data, %g1, %o1 ! 2nd parameter
89 call SetTxMaxBurst
90 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, NIU_TxDmaNoUE, TxMaxBurst_Data)
91
92 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
93 nop
94
95P_InitTxDma:
96 setx NIU_TxDmaNo, %g1, %o0 ! 1st parameter :
97 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_InitTxDma)) -> NIU_InitTxDma (MAC_ID, NIU_TxDmaNoUE)
98 call InitTxDma
99 nop
100
101 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
102 nop
103
104
105clear_esr_first:
106 setx SOC_ESR_REG, %l7, %i0
107 stx %g0, [%i0]
108
109set_ejr:
110 set 0x1, %i1
111 sllx %i1, ERR_FIELD, %i2
112 setx SOC_EJR_REG, %l7, %i3
113 stx %i2, [%i3]
114 membar 0x40
115
116eie_reg_ones:
117 setx SOC_EIE_REG, %l7, %g5
118 stx %i2, [%g5]
119 membar 0x40
120
121Gen_Packet:
122 nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, NIU_TxDmaNoUE,NiuTxPktCountUE)
123 nop
124
125 setx 0x5, %g1, %g4
126delay_loop_tmp:
127 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
128 nop
129 nop
130 nop
131 nop
132 dec %g4
133 brnz %g4, delay_loop_tmp
134 nop
135
136
137SetTxRingKick:
138 setx 0x100000100, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick)) -> NIU_SetTxRingKick(MAC_ID, NIU_TxDmaNoUE)
139 setx NIU_TxDmaNo, %g1, %o0
140 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
141 nop
142 mulx %o0, 0x200, %g5
143 setx TX_RING_KICK_Addr, %g1, %g2
144 add %g2, %g5, %g2
145 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
146 nop
147
148SetTxCs :
149 setx NIU_TxDmaNo, %g1, %o0
150 setx TX_CS_Data, %g1, %g3
151 mulx %o0, 0x200, %g5
152 setx TX_CS_Addr, %g1, %g2
153 add %g2, %g5, %g2
154 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
155 nop
156
157
158 setx loop_count, %g1, %g4
159delay_loop:
160 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
161 nop
162 nop
163 nop
164 nop
165 dec %g4
166 brnz %g4, delay_loop
167 nop
168
169 ! ESR is cleared in INT
170 !but dont expect it to be zero; as a follow up
171 ! transaction can again set it
172read_esr:
173 setx SOC_ESR_REG, %l7, %i0
174 ldx [%i0], %i1
175! sub %i1, %g0, %i5
176! brnz %i5, test_failed
177
178 setx 0x8000000000000000, %l7, %o3 !valid bit
179 set 0x1, %i2
180 sllx %i2, ERR_FIELD, %i3
181 or %i3, %o3, %i4
182
183#ifdef CE
184read_esr_nonzero:
185 sub %i1, %i4, %i5
186 brnz %i5, test_failed
187 nop
188#endif
189
190#ifdef UE
191read_esr_zero:
192 sub %i1, %g0, %i5
193 brnz %i5, test_failed
194 nop
195#endif
196
197check_per:
198 set 0x1, %i2
199 sllx %i2, ERR_FIELD, %i3
200 or %i3, %o3, %i4
201
202 setx SOC_PER_REG, %l7, %i0
203 ldx [%i0], %i1
204 sub %i1, %i4, %i5
205 brnz %i5, test_failed
206 nop
207
208
209 ! Check if a Corrected ECC Trap happened
210check_error_trap:
211 setx EXECUTED, %l1, %l0
212 cmp %o6, %l0
213 bne test_failed
214 nop
215 mov TT, %l0
216 cmp %o7, %l0
217 bne test_failed
218 nop
219
220
221test_passed:
222 nop
223 EXIT_GOOD
224
225test_failed:
226 EXIT_BAD
227
228
229/************************************************************************
230 Trap Handlers
231 ************************************************************************/
232My_Recoverable_Sw_error_trap:
233 ! Signal trap taken
234 setx EXECUTED, %l0, %o6
235 ! save trap type value
236 rdpr %tt, %o7
237 retry
238 nop
239
240My_Corrected_ECC_error_trap:
241 ! Signal trap taken
242 setx EXECUTED, %l0, %o6
243 ! save trap type value
244 rdpr %tt, %o7
245 retry
246 nop
247
248
249/************************************************************************
250 Test case data start
251 ************************************************************************/
252/* These initialization is temporary, as there looks some bug in mempli */
253
254SECTION SetRngConfig_init data_va=0x100000000
255attr_data {
256 Name = SetRngConfig_init,
257 hypervisor,
258 compressimage
259 }
260.data
261SetRngConfig_init:
262 .xword 0x0060452301000484
263/************************************************************************/
264
265SECTION SetTxRingKick_init data_va=0x100000100
266attr_data {
267 Name = SetTxRingKick_init,
268 hypervisor,
269 compressimage
270 }
271.data
272SetTxRingKick_init:
273 .xword 0x0060452301000484
274/************************************************************************/
275
276SECTION SetTxLPMask1_init data_va=0x100000200
277attr_data {
278 Name = SetTxLPMask1_init,
279 hypervisor,
280 compressimage
281 }
282.data
283SetTxLPMask1_init:
284 .xword 0x0060452301000484
285/************************************************************************/
286
287SECTION SetTxLPValue1_init data_va=0x100000300
288attr_data {
289 Name = SetTxLPValue1_init,
290 hypervisor,
291 compressimage
292 }
293.data
294SetTxLPValue1_init:
295 .xword 0x0060452301000484
296/************************************************************************/
297
298SECTION SetTxLPRELOC1_init data_va=0x100000400
299attr_data {
300 Name = SetTxLPRELOC1_init,
301 hypervisor,
302 compressimage
303 }
304.data
305SetTxLPRELOC1_init:
306 .xword 0x0060452301000484
307/************************************************************************/
308SECTION SetTxLPMask2_init data_va=0x100000500
309attr_data {
310 Name = SetTxLPMask2_init,
311 hypervisor,
312 compressimage
313 }
314.data
315SetTxLPMask2_init:
316 .xword 0x0060452301000484
317/************************************************************************/
318SECTION SetTxLPValue2_init data_va=0x100000600
319attr_data {
320 Name = SetTxLPValue2_init,
321 hypervisor,
322 compressimage
323 }
324.data
325SetTxLPValue2_init:
326 .xword 0x0060452301000484
327
328/************************************************************************/
329SECTION SetTxLPRELOC2_init data_va=0x100000700
330attr_data {
331 Name = SetTxLPRELOC2_init,
332 hypervisor,
333 compressimage
334 }
335.data
336SetTxLPRELOC2_init:
337 .xword 0x0060452301000484
338
339/************************************************************************/
340SECTION SetTxLPValid_init data_va=0x100000800
341attr_data {
342 Name = SetTxLPValid_init,
343 hypervisor,
344 compressimage
345 }
346.data
347SetTxLPValid_init:
348 .xword 0x0060452301000484
349
350/************************************************************************/
351
Full OpenSPARC design & verification tarball including full HDL.