[OpenSPARC-T2-DV] / verif / diag / assembly / arch / error / vec / n2_ras_vec_l2_ltc.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: n2_ras_vec_l2_ltc.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define H_HT0_Hw_Corrected_Error_0x63 My_Corrected_ECC_error_trap


#define MAIN_PAGE_HV_ALSO


#define  L2_ENTRY_PA        0xa400000000
#define  TEST_DATA1         0x5555555555555555
#define  L2_ES_W1C_VALUE    0xc03ffffc00000000

#include "hboot.s"
#include "asi_s.h"
#include "err_defines.h"

.text
.global	 main
.global  My_Corrected_ECC_error_trap


main:

  ! Boot code does not provide TLB translation for IO address space
  ta    T_CHANGE_HPRIV

/*
disable_l1_DCache:
  ldxa  [%g0] ASI_LSU_CONTROL, %l0
  ! Remove bit 2
  andn  %l0, 0x2, %l0
  stxa  %l0, [%g0] ASI_LSU_CONTROL
*/

enable_err_reporting:
  setx L2EE_PA0, %l0, %l1
  ldx  [%l1], %l2
  mov  0x3, %l0
  or   %l2, %l0, %l2
  stx  %l2, [%l1]


/*
set_L2_Directly_Mapped_Mode:
  setx  L2CS_PA0, %l6, %g1      ! Bit 1 in L2 Control Status Register
  mov   0x2, %l0
  stx   %l0, [%g1]
*/

init_zero:
	clr	%i0

Tag_init:
	setx	0x2000aa00, %g7, %g1
	ldx	[%g1], %g2

        setx    0x2100aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2200aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2300aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2400aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2500aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2600aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2700aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2800aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2900aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2a00aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2b00aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2c00aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2d00aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2e00aa00, %g7, %g1
        ldx     [%g1], %g2

        setx    0x2f00aa00, %g7, %g1
        ldx     [%g1], %g2
	membar	#Sync

nops:
	nop; nop; nop; nop
	nop; nop; nop; nop
	nop; nop; nop; nop
	nop; nop; nop; nop
	nop; nop; nop; nop
	nop; nop; nop; nop
	nop; nop; nop; nop


	! Try with way 0, 1 in 2 loop count
	! First all 16 ways for the same Index was loaded to L2
	! Now inject error to way 0;
	! Do a ld with the same index different tag and make sure it is a miss in L2
	! Error should be reported and corrected;
	! Then try in the second pass of the loop for way 1
	! Used the %i5 register to have the way count as loop count and use it to getnerate different tag

set_way:
	clr	%i5			! for 16 error
/************************LOOP*****************************/
L2_diag_load:
	setx	0x2000aa00, %l0, %g2  	! 1st addr; way: 0
	setx  	0x3ffff8, %l0, %l2      ! Mask for extracting [21:3]
	and     %g2, %l2, %g5		! g2 has L2 PA,
	setx	L2_ENTRY_PA, %l0, %g4
	or	%g5, %g4, %g5           !g5 now has Diagnostic Data Array address 

flip:
	sllx	%i5, 18, %g6		! %i5 has the way
	or	%g5, %g6, %g5
	ldx	[%g5], %g6
	membar 	#Sync

! Flip one bits to inject error
	xor	%g6, 0x200, %g6
	stx	%g6, [%g5]
	membar  #Sync
	ldx	[%g5], %g7
	cmp	%g7, %g6
	bne	test_fail
	nop
        membar  #Sync

nops_1:
	nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop

	! error should be detected and reported to CCX
reading_to_cause_err:                 			! New Tag; same Index; and a miss; 											! so error should be detected and reported to CCX
	setx  	0x3000aa00, %l0, %g2
	sllx	%i5, 24, %i6				! %i5 = 0,1,2,3,..
	or	%g2, %i6, %g2				! to get a new address; with new tag; same index	
	ldx   	[%g2], %l6

	! wait for the trap
	set	0x100, %i1
loop_1:
	dec	%i1
	cmp	%i1, %g0
	be	test_fail			! timeout
	nop

	add	%i5, 0x1, %i7
	cmp	%i0, %i7 
	bne	loop_1	
	nop

	!To make sure that the error is not logged/reported again
	!that means the error is corrected
read_more_same_index_different_set:		
	setx	0x4000aa00, %l0, %g2			! another new tag; same index
        sllx    %i5, 24, %i6                            ! %i5 = 0,1,2,3,..    
        or      %g2, %i6, %g2                           ! to get a new address; with new tag; same index   
	ldx	[%g2], %l6
        setx    0x5000aa00, %l0, %g2    		! another new tag; same index
        sllx    %i5, 24, %i6                            ! %i5 = 0,1,2,3,..    
        or      %g2, %i6, %g2                           ! to get a new address; with new tag; same index   
        ldx	[%g2], %l6
        membar  #Sync

	inc	%i5
	cmp	%i5, LOOP_COUNT
	bne	L2_diag_load
	nop	
/*********************************************************/

trap_count:
	cmp	%i0,  LOOP_COUNT
	bne	test_fail	
	nop

good:
	ba	test_pass
	nop


My_Corrected_ECC_error_trap:
	inc	%i0

l2_esr_ch_63:
	setx	L2ES_PA0, %g7, %g1
	ldx   	[%g1], %g4
	setx	0xfffffffc00000000, %g7, %g3
	and	%g4, %g3, %g6
	setx	0x0000201000000000, %g7, %g3
	cmp	%g6, %g3
	bne	%xcc, test_fail
	nop		

clear_l2esr_63:
	setx	0xc03ffffc00000000, %g7, %g2
	stx	%g2, [%g1]
	ldx	[%g1], %g2

load_DESR_L2C_63:
	ldxa	[%g0] 0x4c, %g2
	setx 	0xff00000000000000, %g7, %g1
	and  	%g2, %g1, %g3
 	setx 	0x8900000000000000, %g7, %g4	
        cmp     %g4, %g3           
        bne     %xcc, test_fail
        nop      	

load_DSFSR_L2C_63:
	set	0x18, %g1
	ldxa	[%g1] 0x58, %g2
	cmp	%g2, %g0
        bne     %xcc, test_fail
        nop             

done_63:
#ifdef DONE
 	done	
#endif
	retry
	nop


/*******************************************************
 * Exit code
 *******************************************************/

test_pass:
ta  T_GOOD_TRAP

test_fail:
ta  T_BAD_TRAP
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: n2_ras_vec_l2_ltc.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define H_HT0_Hw_Corrected_Error_0x63 My_Corrected_ECC_error_trap
	39
	40
	41	#define MAIN_PAGE_HV_ALSO
	42
	43
	44	#define L2_ENTRY_PA 0xa400000000
	45	#define TEST_DATA1 0x5555555555555555
	46	#define L2_ES_W1C_VALUE 0xc03ffffc00000000
	47
	48	#include "hboot.s"
	49	#include "asi_s.h"
	50	#include "err_defines.h"
	51
	52	.text
	53	.global main
	54	.global My_Corrected_ECC_error_trap
	55
	56
	57	main:
	58
	59	! Boot code does not provide TLB translation for IO address space
	60	ta T_CHANGE_HPRIV
	61
	62	/*
	63	disable_l1_DCache:
	64	ldxa [%g0] ASI_LSU_CONTROL, %l0
65	! Remove bit 2
66	andn %l0, 0x2, %l0
67	stxa %l0, [%g0] ASI_LSU_CONTROL
68	*/
69
70	enable_err_reporting:
71	setx L2EE_PA0, %l0, %l1
72	ldx [%l1], %l2
73	mov 0x3, %l0
74	or %l2, %l0, %l2
75	stx %l2, [%l1]
76
77
78	/*
79	set_L2_Directly_Mapped_Mode:
80	setx L2CS_PA0, %l6, %g1 ! Bit 1 in L2 Control Status Register
81	mov 0x2, %l0
82	stx %l0, [%g1]
83	*/
84
85	init_zero:
86	clr %i0
87
88	Tag_init:
89	setx 0x2000aa00, %g7, %g1
90	ldx [%g1], %g2
91
92	setx 0x2100aa00, %g7, %g1
93	ldx [%g1], %g2
94
95	setx 0x2200aa00, %g7, %g1
96	ldx [%g1], %g2
97
98	setx 0x2300aa00, %g7, %g1
99	ldx [%g1], %g2
100
101	setx 0x2400aa00, %g7, %g1
102	ldx [%g1], %g2
103
104	setx 0x2500aa00, %g7, %g1
105	ldx [%g1], %g2
106
107	setx 0x2600aa00, %g7, %g1
108	ldx [%g1], %g2
109
110	setx 0x2700aa00, %g7, %g1
111	ldx [%g1], %g2
112
113	setx 0x2800aa00, %g7, %g1
114	ldx [%g1], %g2
115
116	setx 0x2900aa00, %g7, %g1
117	ldx [%g1], %g2
118
119	setx 0x2a00aa00, %g7, %g1
120	ldx [%g1], %g2
121
122	setx 0x2b00aa00, %g7, %g1
123	ldx [%g1], %g2
124
125	setx 0x2c00aa00, %g7, %g1
126	ldx [%g1], %g2
127
128	setx 0x2d00aa00, %g7, %g1
129	ldx [%g1], %g2
130
131	setx 0x2e00aa00, %g7, %g1
132	ldx [%g1], %g2
133
134	setx 0x2f00aa00, %g7, %g1
135	ldx [%g1], %g2
136	membar #Sync
137
138	nops:
139	nop; nop; nop; nop
140	nop; nop; nop; nop
141	nop; nop; nop; nop
142	nop; nop; nop; nop
143	nop; nop; nop; nop
144	nop; nop; nop; nop
145	nop; nop; nop; nop
146
147
148	! Try with way 0, 1 in 2 loop count
149	! First all 16 ways for the same Index was loaded to L2
150	! Now inject error to way 0;
151	! Do a ld with the same index different tag and make sure it is a miss in L2
152	! Error should be reported and corrected;
153	! Then try in the second pass of the loop for way 1
154	! Used the %i5 register to have the way count as loop count and use it to getnerate different tag
155
156	set_way:
157	clr %i5 ! for 16 error
158	/**********************LOOP***************************/
159	L2_diag_load:
160	setx 0x2000aa00, %l0, %g2 ! 1st addr; way: 0
161	setx 0x3ffff8, %l0, %l2 ! Mask for extracting [21:3]
162	and %g2, %l2, %g5 ! g2 has L2 PA,
163	setx L2_ENTRY_PA, %l0, %g4
164	or %g5, %g4, %g5 !g5 now has Diagnostic Data Array address
165
166	flip:
167	sllx %i5, 18, %g6 ! %i5 has the way
168	or %g5, %g6, %g5
169	ldx [%g5], %g6
170	membar #Sync
171
172	! Flip one bits to inject error
173	xor %g6, 0x200, %g6
174	stx %g6, [%g5]
175	membar #Sync
176	ldx [%g5], %g7
177	cmp %g7, %g6
178	bne test_fail
179	nop
180	membar #Sync
181
182	nops_1:
183	nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop
184
185	! error should be detected and reported to CCX
186	reading_to_cause_err: ! New Tag; same Index; and a miss; ! so error should be detected and reported to CCX
187	setx 0x3000aa00, %l0, %g2
188	sllx %i5, 24, %i6 ! %i5 = 0,1,2,3,..
189	or %g2, %i6, %g2 ! to get a new address; with new tag; same index
190	ldx [%g2], %l6
191
192	! wait for the trap
193	set 0x100, %i1
194	loop_1:
195	dec %i1
196	cmp %i1, %g0
197	be test_fail ! timeout
198	nop
199
200	add %i5, 0x1, %i7
201	cmp %i0, %i7
202	bne loop_1
203	nop
204
205	!To make sure that the error is not logged/reported again
206	!that means the error is corrected
207	read_more_same_index_different_set:
208	setx 0x4000aa00, %l0, %g2 ! another new tag; same index
209	sllx %i5, 24, %i6 ! %i5 = 0,1,2,3,..
210	or %g2, %i6, %g2 ! to get a new address; with new tag; same index
211	ldx [%g2], %l6
212	setx 0x5000aa00, %l0, %g2 ! another new tag; same index
213	sllx %i5, 24, %i6 ! %i5 = 0,1,2,3,..
214	or %g2, %i6, %g2 ! to get a new address; with new tag; same index
215	ldx [%g2], %l6
216	membar #Sync
217
218	inc %i5
219	cmp %i5, LOOP_COUNT
220	bne L2_diag_load
221	nop
222	/*********************************************************/
223
224	trap_count:
225	cmp %i0, LOOP_COUNT
226	bne test_fail
227	nop
228
229	good:
230	ba test_pass
231	nop
232
233
234
235	My_Corrected_ECC_error_trap:
236	inc %i0
237
238	l2_esr_ch_63:
239	setx L2ES_PA0, %g7, %g1
240	ldx [%g1], %g4
241	setx 0xfffffffc00000000, %g7, %g3
242	and %g4, %g3, %g6
243	setx 0x0000201000000000, %g7, %g3
244	cmp %g6, %g3
245	bne %xcc, test_fail
246	nop
247
248	clear_l2esr_63:
249	setx 0xc03ffffc00000000, %g7, %g2
250	stx %g2, [%g1]
251	ldx [%g1], %g2
252
253	load_DESR_L2C_63:
254	ldxa [%g0] 0x4c, %g2
255	setx 0xff00000000000000, %g7, %g1
256	and %g2, %g1, %g3
257	setx 0x8900000000000000, %g7, %g4
258	cmp %g4, %g3
259	bne %xcc, test_fail
260	nop
261
262	load_DSFSR_L2C_63:
263	set 0x18, %g1
264	ldxa [%g1] 0x58, %g2
265	cmp %g2, %g0
266	bne %xcc, test_fail
267	nop
268
269	done_63:
270	#ifdef DONE
271	done
272	#endif
273	retry
274	nop
275
276
277
278	/*******************************************************
279	* Exit code
280	*******************************************************/
281
282	test_pass:
283	ta T_GOOD_TRAP
284
285	test_fail:
286	ta T_BAD_TRAP