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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: interrupt_pci_pwr_msg.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define MAIN_PAGE_HV_ALSO | |
39 | ||
40 | #define ENABLE_PCIE_LINK_TRAINING | |
41 | ||
42 | #define ENABLE_INTR0x60 1 | |
43 | ||
44 | #define INTR0x60_EVENT_QUEUE_BASE event_queue_base | |
45 | ||
46 | #define INTR0x60_MONDO_IV 62 | |
47 | ||
48 | #define INTR0x60_MONDO_30_V 1 | |
49 | #define INTR0x60_MONDO_30_MODE 1 | |
50 | #define INTR0x60_MONDO_30_THREAD 0 | |
51 | #define INTR0x60_MONDO_30_CNTRL 0 | |
52 | #define INTR0x60_PM_PME_EQN eval(30-24) | |
53 | ||
54 | #define INTR0x60_MONDO_31_V 1 | |
55 | #define INTR0x60_MONDO_31_MODE 1 | |
56 | #define INTR0x60_MONDO_31_THREAD 0 | |
57 | #define INTR0x60_MONDO_31_CNTRL 1 | |
58 | #define INTR0x60_PME_TO_ACK_EQN eval(31-24) | |
59 | ||
60 | #define INTR0x60_PM_PME_EXTRA_HANDLER \ | |
61 | setx pm_pme_intr_count, %g4, %g3; \ | |
62 | ldub [%g3], %g4; \ | |
63 | inc %g4; \ | |
64 | stb %g4, [%g3] | |
65 | #define INTR0x60_PME_TO_ACK_EXTRA_HANDLER \ | |
66 | setx pme_to_ack_intr_count, %g4, %g3; \ | |
67 | ldub [%g3], %g4; \ | |
68 | inc %g4; \ | |
69 | stb %g4, [%g3] | |
70 | ||
71 | ||
72 | #define WAIT_FOR_INTERRUPT(counter_addr_reg) \ | |
73 | best_set_reg(0x100,%l7,%l0); \ | |
74 | 1: ldub [counter_addr_reg], %l2; \ | |
75 | brnz %l2,2f; \ | |
76 | dec %l0; \ | |
77 | brz %l0, wait_for_interrupt_timeout; \ | |
78 | nop; \ | |
79 | ba 1b; \ | |
80 | 2: nop | |
81 | ||
82 | #include "interrupt0x60_defines.h" | |
83 | ||
84 | ||
85 | #define SYNC_THREADS 1 | |
86 | ||
87 | #include "hboot.s" | |
88 | #include "peu_defines.h" | |
89 | #include "ncu_defines.h" | |
90 | #include "cmp_macros.h" | |
91 | ||
92 | #include "interrupt0x60_handler.s" | |
93 | ||
94 | ||
95 | ||
96 | /************************************************************************ | |
97 | Test case code start | |
98 | ************************************************************************/ | |
99 | SECTION .MAIN | |
100 | .text | |
101 | .global main | |
102 | ||
103 | main: | |
104 | ta T_CHANGE_HPRIV | |
105 | nop | |
106 | ||
107 | /* Kick off one interrupt, wait for it, then kick off the next */ | |
108 | ||
109 | send_pm_pme_intr1: | |
110 | ! user event to generate PM_PME msg. | |
111 | nop ! $EV trig_pc_d(1, @VA(.MAIN.send_pm_pme_intr1)) -> EnablePCIeIgCmd ("PM_PME", 0, 0, "0", 1, * ) | |
112 | setx pm_pme_intr_count, %l7, %l1 | |
113 | WAIT_FOR_INTERRUPT(%l1) | |
114 | stb %g0, [%l1] | |
115 | ||
116 | send_pm_pme_intr2: | |
117 | nop ! $EV trig_pc_d(1, @VA(.MAIN.send_pm_pme_intr2)) -> EnablePCIeIgCmd ("PM_PME", 0, 0, "0", 1, * ) | |
118 | WAIT_FOR_INTERRUPT(%l1) | |
119 | stb %g0, [%l1] | |
120 | ||
121 | send_pme_to_ack_intr1: | |
122 | ! user event to generate PME_TO_ACK msg. | |
123 | nop ! $EV trig_pc_d(1, @VA(.MAIN.send_pme_to_ack_intr1)) -> EnablePCIeIgCmd ("PM_TO_ACK", 0, 0, "0", 1, * ) | |
124 | setx pme_to_ack_intr_count, %l7, %l1 | |
125 | WAIT_FOR_INTERRUPT(%l1) | |
126 | stb %g0, [%l1] | |
127 | ||
128 | send_pme_to_ack_intr2: | |
129 | nop ! $EV trig_pc_d(1, @VA(.MAIN.send_pme_to_ack_intr2)) -> EnablePCIeIgCmd ("PM_TO_ACK", 0, 0, "0", 1, * ) | |
130 | WAIT_FOR_INTERRUPT(%l1) | |
131 | stb %g0, [%l1] | |
132 | ||
133 | /* We are all done sending interrupts, to go to good trap */ | |
134 | thread_passed: | |
135 | EXIT_GOOD | |
136 | ||
137 | wait_for_interrupt_timeout: | |
138 | EXIT_BAD ! $EV trig_pc_d(1, @VA(.MAIN.wait_for_interrupt_timeout)) -> printf ("ERROR: Timeout waiting for interrupt",*,1); | |
139 | ||
140 | ||
141 | ||
142 | /************************************************************************ | |
143 | Test case data start | |
144 | ************************************************************************/ | |
145 | ||
146 | .data | |
147 | .align eval(512*1024) | |
148 | user_data_start: | |
149 | ||
150 | .global event_queue_base | |
151 | event_queue_base: | |
152 | .skip 1024 | |
153 | user_data_end: | |
154 | ||
155 | ||
156 | SECTION .HTRAPS | |
157 | .data | |
158 | .global pm_pme_intr_count | |
159 | pm_pme_intr_count: | |
160 | .byte 0 ! interrupt count for PM_PME | |
161 | .global pme_to_ack_intr_count | |
162 | pme_to_ack_intr_count: | |
163 | .byte 0 ! interrupt count for PME_TO_ACK | |
164 | ||
165 | .end | |
166 | ||
167 | /************************************************************************/ |