projects / OpenSPARC-T2-DV / blame
| Commit | Line | Data |
|---|---|---|
| 86530b38 AT |
1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * OpenSPARC T2 Processor File: n2_pm_all_dimm.s | |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 7 | * | |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License as published by | |
| 12 | * the Free Software Foundation; version 2 of the License. | |
| 13 | * | |
| 14 | * This program is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public License | |
| 20 | * along with this program; if not, write to the Free Software | |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 22 | * | |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license | |
| 24 | * choice is available it will apply instead, Sun elects to use only | |
| 25 | * the General Public License version 2 (GPLv2) at this time for any | |
| 26 | * software where a choice of GPL license versions is made | |
| 27 | * available with the language indicating that GPLv2 or any later version | |
| 28 | * may be used, or where a choice of which version of the GPL is applied is | |
| 29 | * otherwise unspecified. | |
| 30 | * | |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 33 | * have any questions. | |
| 34 | * | |
| 35 | * | |
| 36 | * ========== Copyright Header End ============================================ | |
| 37 | */ | |
| 38 | #define MAIN_PAGE_NUCLEUS_ALSO | |
| 39 | #define MAIN_PAGE_HV_ALSO | |
| 40 | ||
| 41 | ||
| 42 | #include "hboot.s" | |
| 43 | #include "asi_s.h" | |
| 44 | ||
| 45 | #ifdef PM_8BANK | |
| 46 | #define L20_MCU_DM0_BK0 0x0000134000 | |
| 47 | #define L20_MCU_DM0_BK2 0x0000134200 | |
| 48 | #define L20_MCU_DM0_BK4 0x0000134400 | |
| 49 | #define L20_MCU_DM0_BK6 0x0000134600 | |
| 50 | ||
| 51 | #define L20_MCU_DM1_BK0 0x0800134000 | |
| 52 | #define L20_MCU_DM1_BK2 0x0800134200 | |
| 53 | #define L20_MCU_DM1_BK4 0x0800134400 | |
| 54 | #define L20_MCU_DM1_BK6 0x0800134600 | |
| 55 | ||
| 56 | #define L20_MCU_DM2_BK0 0x1000134000 | |
| 57 | #define L20_MCU_DM2_BK2 0x1000134200 | |
| 58 | #define L20_MCU_DM2_BK4 0x1000134400 | |
| 59 | #define L20_MCU_DM2_BK6 0x1000134600 | |
| 60 | ||
| 61 | #define L20_MCU_DM3_BK0 0x1800134000 | |
| 62 | #define L20_MCU_DM3_BK2 0x1800134200 | |
| 63 | #define L20_MCU_DM3_BK4 0x1800134400 | |
| 64 | #define L20_MCU_DM3_BK6 0x1800134600 | |
| 65 | ||
| 66 | #define L20_MCU_DM4_BK0 0x2000134000 | |
| 67 | #define L20_MCU_DM4_BK2 0x2000134200 | |
| 68 | #define L20_MCU_DM4_BK4 0x2000134400 | |
| 69 | #define L20_MCU_DM4_BK6 0x2000134600 | |
| 70 | ||
| 71 | #define L20_MCU_DM5_BK0 0x2800134000 | |
| 72 | #define L20_MCU_DM5_BK2 0x2800134200 | |
| 73 | #define L20_MCU_DM5_BK4 0x2800134400 | |
| 74 | #define L20_MCU_DM5_BK6 0x2800134600 | |
| 75 | ||
| 76 | #define L20_MCU_DM6_BK0 0x3000134000 | |
| 77 | #define L20_MCU_DM6_BK2 0x3000134200 | |
| 78 | #define L20_MCU_DM6_BK4 0x3000134400 | |
| 79 | #define L20_MCU_DM6_BK6 0x3000134600 | |
| 80 | ||
| 81 | #define L20_MCU_DM7_BK0 0x3800134000 | |
| 82 | #define L20_MCU_DM7_BK2 0x3800134200 | |
| 83 | #define L20_MCU_DM7_BK4 0x3800134400 | |
| 84 | #define L20_MCU_DM7_BK6 0x3800134600 | |
| 85 | ||
| 86 | #define L2_1_MCU_DM0_BK0 0x0000134040 | |
| 87 | #define L2_1_MCU_DM0_BK2 0x0000134240 | |
| 88 | #define L2_1_MCU_DM0_BK4 0x0000134440 | |
| 89 | #define L2_1_MCU_DM0_BK6 0x0000134640 | |
| 90 | ||
| 91 | #define L2_1_MCU_DM1_BK0 0x0800134040 | |
| 92 | #define L2_1_MCU_DM1_BK2 0x0800134240 | |
| 93 | #define L2_1_MCU_DM1_BK4 0x0800134440 | |
| 94 | #define L2_1_MCU_DM1_BK6 0x0800134640 | |
| 95 | ||
| 96 | #define L2_1_MCU_DM2_BK0 0x1000134040 | |
| 97 | #define L2_1_MCU_DM2_BK2 0x1000134240 | |
| 98 | #define L2_1_MCU_DM2_BK4 0x1000134440 | |
| 99 | #define L2_1_MCU_DM2_BK6 0x1000134640 | |
| 100 | ||
| 101 | #define L2_1_MCU_DM3_BK0 0x1800134040 | |
| 102 | #define L2_1_MCU_DM3_BK2 0x1800134240 | |
| 103 | #define L2_1_MCU_DM3_BK4 0x1800134440 | |
| 104 | #define L2_1_MCU_DM3_BK6 0x1800134640 | |
| 105 | ||
| 106 | #define L2_1_MCU_DM4_BK0 0x2000134040 | |
| 107 | #define L2_1_MCU_DM4_BK2 0x2000134240 | |
| 108 | #define L2_1_MCU_DM4_BK4 0x2000134440 | |
| 109 | #define L2_1_MCU_DM4_BK6 0x2000134640 | |
| 110 | ||
| 111 | #define L2_1_MCU_DM5_BK0 0x2800134040 | |
| 112 | #define L2_1_MCU_DM5_BK2 0x2800134240 | |
| 113 | #define L2_1_MCU_DM5_BK4 0x2800134440 | |
| 114 | #define L2_1_MCU_DM5_BK6 0x2800134640 | |
| 115 | ||
| 116 | #define L2_1_MCU_DM6_BK0 0x3000134040 | |
| 117 | #define L2_1_MCU_DM6_BK2 0x3000134240 | |
| 118 | #define L2_1_MCU_DM6_BK4 0x3000134440 | |
| 119 | #define L2_1_MCU_DM6_BK6 0x3000134640 | |
| 120 | ||
| 121 | #define L2_1_MCU_DM7_BK0 0x3800134040 | |
| 122 | #define L2_1_MCU_DM7_BK2 0x3800134240 | |
| 123 | #define L2_1_MCU_DM7_BK4 0x3800134440 | |
| 124 | #define L2_1_MCU_DM7_BK6 0x3800134640 | |
| 125 | #endif | |
| 126 | ||
| 127 | #ifdef PM_4BANK | |
| 128 | #define L20_MCU_DM0_BK0 0x0000134000 | |
| 129 | #define L20_MCU_DM0_BK2 0x0000134100 | |
| 130 | #define L20_MCU_DM0_BK4 0x0000134200 | |
| 131 | #define L20_MCU_DM0_BK6 0x0000134300 | |
| 132 | ||
| 133 | #define L20_MCU_DM1_BK0 0x0400134000 | |
| 134 | #define L20_MCU_DM1_BK2 0x0400134100 | |
| 135 | #define L20_MCU_DM1_BK4 0x0400134200 | |
| 136 | #define L20_MCU_DM1_BK6 0x0400134300 | |
| 137 | ||
| 138 | #define L20_MCU_DM2_BK0 0x0800134000 | |
| 139 | #define L20_MCU_DM2_BK2 0x0800134100 | |
| 140 | #define L20_MCU_DM2_BK4 0x0800134200 | |
| 141 | #define L20_MCU_DM2_BK6 0x0800134300 | |
| 142 | ||
| 143 | #define L20_MCU_DM3_BK0 0x0c00134000 | |
| 144 | #define L20_MCU_DM3_BK2 0x0c00134100 | |
| 145 | #define L20_MCU_DM3_BK4 0x0c00134200 | |
| 146 | #define L20_MCU_DM3_BK6 0x0c00134300 | |
| 147 | ||
| 148 | #define L20_MCU_DM4_BK0 0x1000134000 | |
| 149 | #define L20_MCU_DM4_BK2 0x1000134100 | |
| 150 | #define L20_MCU_DM4_BK4 0x1000134200 | |
| 151 | #define L20_MCU_DM4_BK6 0x1000134300 | |
| 152 | ||
| 153 | #define L20_MCU_DM5_BK0 0x1400134000 | |
| 154 | #define L20_MCU_DM5_BK2 0x1400134100 | |
| 155 | #define L20_MCU_DM5_BK4 0x1400134200 | |
| 156 | #define L20_MCU_DM5_BK6 0x1400134300 | |
| 157 | ||
| 158 | #define L20_MCU_DM6_BK0 0x1800134000 | |
| 159 | #define L20_MCU_DM6_BK2 0x1800134100 | |
| 160 | #define L20_MCU_DM6_BK4 0x1800134200 | |
| 161 | #define L20_MCU_DM6_BK6 0x1800134300 | |
| 162 | ||
| 163 | #define L20_MCU_DM7_BK0 0x1c00134000 | |
| 164 | #define L20_MCU_DM7_BK2 0x1c00134100 | |
| 165 | #define L20_MCU_DM7_BK4 0x1c00134200 | |
| 166 | #define L20_MCU_DM7_BK6 0x1c00134300 | |
| 167 | ||
| 168 | #define L2_1_MCU_DM0_BK0 0x0000134040 | |
| 169 | #define L2_1_MCU_DM0_BK2 0x0000134140 | |
| 170 | #define L2_1_MCU_DM0_BK4 0x0000134240 | |
| 171 | #define L2_1_MCU_DM0_BK6 0x0000134340 | |
| 172 | ||
| 173 | #define L2_1_MCU_DM1_BK0 0x0400134040 | |
| 174 | #define L2_1_MCU_DM1_BK2 0x0400134140 | |
| 175 | #define L2_1_MCU_DM1_BK4 0x0400134240 | |
| 176 | #define L2_1_MCU_DM1_BK6 0x0400134340 | |
| 177 | ||
| 178 | #define L2_1_MCU_DM2_BK0 0x0800134040 | |
| 179 | #define L2_1_MCU_DM2_BK2 0x0800134140 | |
| 180 | #define L2_1_MCU_DM2_BK4 0x0800134240 | |
| 181 | #define L2_1_MCU_DM2_BK6 0x0800134340 | |
| 182 | ||
| 183 | #define L2_1_MCU_DM3_BK0 0x0c00134040 | |
| 184 | #define L2_1_MCU_DM3_BK2 0x0c00134140 | |
| 185 | #define L2_1_MCU_DM3_BK4 0x0c00134240 | |
| 186 | #define L2_1_MCU_DM3_BK6 0x0c00134340 | |
| 187 | ||
| 188 | #define L2_1_MCU_DM4_BK0 0x1000134040 | |
| 189 | #define L2_1_MCU_DM4_BK2 0x1000134140 | |
| 190 | #define L2_1_MCU_DM4_BK4 0x1000134240 | |
| 191 | #define L2_1_MCU_DM4_BK6 0x1000134340 | |
| 192 | ||
| 193 | #define L2_1_MCU_DM5_BK0 0x1400134040 | |
| 194 | #define L2_1_MCU_DM5_BK2 0x1400134140 | |
| 195 | #define L2_1_MCU_DM5_BK4 0x1400134240 | |
| 196 | #define L2_1_MCU_DM5_BK6 0x1400134340 | |
| 197 | ||
| 198 | #define L2_1_MCU_DM6_BK0 0x1800134040 | |
| 199 | #define L2_1_MCU_DM6_BK2 0x1800134140 | |
| 200 | #define L2_1_MCU_DM6_BK4 0x1800134240 | |
| 201 | #define L2_1_MCU_DM6_BK6 0x1800134340 | |
| 202 | ||
| 203 | #define L2_1_MCU_DM7_BK0 0x1c00134040 | |
| 204 | #define L2_1_MCU_DM7_BK2 0x1c00134140 | |
| 205 | #define L2_1_MCU_DM7_BK4 0x1c00134240 | |
| 206 | #define L2_1_MCU_DM7_BK6 0x1c00134340 | |
| 207 | #endif | |
| 208 | ||
| 209 | ||
| 210 | ||
| 211 | #ifdef PM_2BANK | |
| 212 | #define L20_MCU_DM0_BK0 0x0000134000 | |
| 213 | #define L20_MCU_DM0_BK2 0x0000134080 | |
| 214 | #define L20_MCU_DM0_BK4 0x0000134100 | |
| 215 | #define L20_MCU_DM0_BK6 0x0000134180 | |
| 216 | ||
| 217 | #define L20_MCU_DM1_BK0 0x0200134000 | |
| 218 | #define L20_MCU_DM1_BK2 0x0200134080 | |
| 219 | #define L20_MCU_DM1_BK4 0x0200134100 | |
| 220 | #define L20_MCU_DM1_BK6 0x0200134180 | |
| 221 | ||
| 222 | #define L20_MCU_DM2_BK0 0x0400134000 | |
| 223 | #define L20_MCU_DM2_BK2 0x0400134080 | |
| 224 | #define L20_MCU_DM2_BK4 0x0400134100 | |
| 225 | #define L20_MCU_DM2_BK6 0x0400134180 | |
| 226 | ||
| 227 | #define L20_MCU_DM3_BK0 0x0600134000 | |
| 228 | #define L20_MCU_DM3_BK2 0x0600134080 | |
| 229 | #define L20_MCU_DM3_BK4 0x0600134100 | |
| 230 | #define L20_MCU_DM3_BK6 0x0600134180 | |
| 231 | ||
| 232 | #define L20_MCU_DM4_BK0 0x0800134000 | |
| 233 | #define L20_MCU_DM4_BK2 0x0800134080 | |
| 234 | #define L20_MCU_DM4_BK4 0x0800134100 | |
| 235 | #define L20_MCU_DM4_BK6 0x0800134180 | |
| 236 | ||
| 237 | #define L20_MCU_DM5_BK0 0x0a00134000 | |
| 238 | #define L20_MCU_DM5_BK2 0x0a00134080 | |
| 239 | #define L20_MCU_DM5_BK4 0x0a00134100 | |
| 240 | #define L20_MCU_DM5_BK6 0x0a00134180 | |
| 241 | ||
| 242 | #define L20_MCU_DM6_BK0 0x0c00134000 | |
| 243 | #define L20_MCU_DM6_BK2 0x0c00134080 | |
| 244 | #define L20_MCU_DM6_BK4 0x0c00134100 | |
| 245 | #define L20_MCU_DM6_BK6 0x0c00134180 | |
| 246 | ||
| 247 | #define L20_MCU_DM7_BK0 0x0e00134000 | |
| 248 | #define L20_MCU_DM7_BK2 0x0e00134080 | |
| 249 | #define L20_MCU_DM7_BK4 0x0e00134100 | |
| 250 | #define L20_MCU_DM7_BK6 0x0e00134180 | |
| 251 | ||
| 252 | ||
| 253 | #define L2_1_MCU_DM0_BK0 0x0000134040 | |
| 254 | #define L2_1_MCU_DM0_BK2 0x00001340c0 | |
| 255 | #define L2_1_MCU_DM0_BK4 0x0000134140 | |
| 256 | #define L2_1_MCU_DM0_BK6 0x00001341c0 | |
| 257 | ||
| 258 | #define L2_1_MCU_DM1_BK0 0x0200134040 | |
| 259 | #define L2_1_MCU_DM1_BK2 0x02001340c0 | |
| 260 | #define L2_1_MCU_DM1_BK4 0x0200134140 | |
| 261 | #define L2_1_MCU_DM1_BK6 0x02001341c0 | |
| 262 | ||
| 263 | #define L2_1_MCU_DM2_BK0 0x0400134040 | |
| 264 | #define L2_1_MCU_DM2_BK2 0x04001340c0 | |
| 265 | #define L2_1_MCU_DM2_BK4 0x0400134140 | |
| 266 | #define L2_1_MCU_DM2_BK6 0x04001341c0 | |
| 267 | ||
| 268 | #define L2_1_MCU_DM3_BK0 0x0600134040 | |
| 269 | #define L2_1_MCU_DM3_BK2 0x06001340c0 | |
| 270 | #define L2_1_MCU_DM3_BK4 0x0600134140 | |
| 271 | #define L2_1_MCU_DM3_BK6 0x06001341c0 | |
| 272 | ||
| 273 | #define L2_1_MCU_DM4_BK0 0x0800134040 | |
| 274 | #define L2_1_MCU_DM4_BK2 0x08001340c0 | |
| 275 | #define L2_1_MCU_DM4_BK4 0x0800134140 | |
| 276 | #define L2_1_MCU_DM4_BK6 0x08001341c0 | |
| 277 | ||
| 278 | #define L2_1_MCU_DM5_BK0 0x0a00134040 | |
| 279 | #define L2_1_MCU_DM5_BK2 0x0a001340c0 | |
| 280 | #define L2_1_MCU_DM5_BK4 0x0a00134140 | |
| 281 | #define L2_1_MCU_DM5_BK6 0x0a001341c0 | |
| 282 | ||
| 283 | #define L2_1_MCU_DM6_BK0 0x0c00134040 | |
| 284 | #define L2_1_MCU_DM6_BK2 0x0c001340c0 | |
| 285 | #define L2_1_MCU_DM6_BK4 0x0c00134140 | |
| 286 | #define L2_1_MCU_DM6_BK6 0x0c001341c0 | |
| 287 | ||
| 288 | #define L2_1_MCU_DM7_BK0 0x0e00134040 | |
| 289 | #define L2_1_MCU_DM7_BK2 0x0e001340c0 | |
| 290 | #define L2_1_MCU_DM7_BK4 0x0e00134140 | |
| 291 | #define L2_1_MCU_DM7_BK6 0x0e001341c0 | |
| 292 | #endif | |
| 293 | ||
| 294 | #ifdef L2_OFF | |
| 295 | #define L2_ON_OFF_DM 0x1 | |
| 296 | #else | |
| 297 | #define L2_ON_OFF_DM 0x0 | |
| 298 | #endif | |
| 299 | ||
| 300 | ||
| 301 | .text | |
| 302 | .global main | |
| 303 | ||
| 304 | ||
| 305 | main: | |
| 306 | ta T_CHANGE_HPRIV | |
| 307 | nop | |
| 308 | ||
| 309 | L2_on_off_dm: | |
| 310 | setx L2CS_PA0, %l6, %g1 | |
| 311 | ldx [%g1], %o1 | |
| 312 | ||
| 313 | setx 0xfffffffffffffffc, %l6, %i1 ! <1:0>=00 | |
| 314 | and %i1, %o1, %o2 | |
| 315 | ||
| 316 | mov L2_ON_OFF_DM, %l0 | |
| 317 | or %o2, %l0, %l1 | |
| 318 | ||
| 319 | stx %l1, [%g1] | |
| 320 | ||
| 321 | ||
| 322 | membar #Sync | |
| 323 | ||
| 324 | #ifdef BANK0 | |
| 325 | /********************** | |
| 326 | L2 Bank 0 | |
| 327 | **********************/ | |
| 328 | ||
| 329 | /******************* | |
| 330 | DIMM 0,1 | |
| 331 | *******************/ | |
| 332 | L20_dimm01_init: | |
| 333 | setx 0x1111111111111110, %g7, %o0 | |
| 334 | setx 0x2222222222222220, %g7, %o1 | |
| 335 | setx 0x3333333333333330, %g7, %o2 | |
| 336 | setx 0x4444444444444440, %g7, %o3 | |
| 337 | setx 0x5555555555555550, %g7, %o4 | |
| 338 | setx 0x6666666666666660, %g7, %o5 | |
| 339 | setx 0x7777777777777770, %g7, %o6 | |
| 340 | setx 0x8888888888888880, %g7, %o7 | |
| 341 | ||
| 342 | setx L20_MCU_DM0_BK0, %g7, %l0 | |
| 343 | setx L20_MCU_DM0_BK2, %g7, %l1 | |
| 344 | setx L20_MCU_DM0_BK4, %g7, %l2 | |
| 345 | setx L20_MCU_DM0_BK6, %g7, %l3 | |
| 346 | ||
| 347 | setx L20_MCU_DM1_BK0, %g7, %l4 | |
| 348 | setx L20_MCU_DM1_BK2, %g7, %l5 | |
| 349 | setx L20_MCU_DM1_BK4, %g7, %l6 | |
| 350 | setx L20_MCU_DM1_BK6, %g7, %l7 | |
| 351 | ||
| 352 | L20_dimm01_rd_wr: | |
| 353 | !DIMM0,1 | |
| 354 | stx %o0, [%l0] | |
| 355 | ldx [%l0], %g1 | |
| 356 | ||
| 357 | stx %o1, [%l1] | |
| 358 | ldx [%l1], %g1 | |
| 359 | ||
| 360 | stx %o2, [%l2] | |
| 361 | ldx [%l2], %g1 | |
| 362 | ||
| 363 | stx %o3, [%l3] | |
| 364 | ldx [%l3], %g1 | |
| 365 | ||
| 366 | stx %o4, [%l4] | |
| 367 | ldx [%l4], %g1 | |
| 368 | ||
| 369 | stx %o5, [%l5] | |
| 370 | ldx [%l5], %g1 | |
| 371 | ||
| 372 | stx %o6, [%l6] | |
| 373 | ldx [%l6], %g1 | |
| 374 | ||
| 375 | stx %o7, [%l7] | |
| 376 | ldx [%l7], %g1 | |
| 377 | ||
| 378 | /******************* | |
| 379 | DIMM2,3 | |
| 380 | *******************/ | |
| 381 | L20_dimm23_init: | |
| 382 | setx L20_MCU_DM2_BK0, %g7, %i0 | |
| 383 | setx L20_MCU_DM2_BK2, %g7, %i1 | |
| 384 | setx L20_MCU_DM2_BK4, %g7, %i2 | |
| 385 | setx L20_MCU_DM2_BK6, %g7, %i3 | |
| 386 | ||
| 387 | setx L20_MCU_DM3_BK0, %g7, %i4 | |
| 388 | setx L20_MCU_DM3_BK2, %g7, %i5 | |
| 389 | setx L20_MCU_DM3_BK4, %g7, %i6 | |
| 390 | setx L20_MCU_DM3_BK6, %g7, %i7 | |
| 391 | ||
| 392 | inc %o0 | |
| 393 | inc %o1 | |
| 394 | inc %o2 | |
| 395 | inc %o3 | |
| 396 | inc %o4 | |
| 397 | inc %o5 | |
| 398 | inc %o6 | |
| 399 | inc %o7 | |
| 400 | ||
| 401 | L20_dimm23_rd_wr: | |
| 402 | !DIMM0,1 | |
| 403 | stx %o0, [%i0] | |
| 404 | ldx [%i0], %g1 | |
| 405 | ||
| 406 | stx %o1, [%i1] | |
| 407 | ldx [%i1], %g1 | |
| 408 | ||
| 409 | stx %o2, [%i2] | |
| 410 | ldx [%i2], %g1 | |
| 411 | ||
| 412 | stx %o3, [%i3] | |
| 413 | ldx [%i3], %g1 | |
| 414 | ||
| 415 | stx %o4, [%i4] | |
| 416 | ldx [%i4], %g1 | |
| 417 | ||
| 418 | stx %o5, [%i5] | |
| 419 | ldx [%i5], %g1 | |
| 420 | ||
| 421 | stx %o6, [%i6] | |
| 422 | ldx [%i6], %g1 | |
| 423 | ||
| 424 | stx %o7, [%i7] | |
| 425 | ldx [%i7], %g1 | |
| 426 | ||
| 427 | ||
| 428 | /******************************** | |
| 429 | * DIMM 4, 5 | |
| 430 | *********************************/ | |
| 431 | L20_dimm45_init: | |
| 432 | setx L20_MCU_DM4_BK0, %g7, %l0 | |
| 433 | setx L20_MCU_DM4_BK2, %g7, %l1 | |
| 434 | setx L20_MCU_DM4_BK4, %g7, %l2 | |
| 435 | setx L20_MCU_DM4_BK6, %g7, %l3 | |
| 436 | ||
| 437 | setx L20_MCU_DM5_BK0, %g7, %l4 | |
| 438 | setx L20_MCU_DM5_BK2, %g7, %l5 | |
| 439 | setx L20_MCU_DM5_BK4, %g7, %l6 | |
| 440 | setx L20_MCU_DM5_BK6, %g7, %l7 | |
| 441 | ||
| 442 | inc %o0 | |
| 443 | inc %o1 | |
| 444 | inc %o2 | |
| 445 | inc %o3 | |
| 446 | inc %o4 | |
| 447 | inc %o5 | |
| 448 | inc %o6 | |
| 449 | inc %o7 | |
| 450 | ||
| 451 | L20_dimm45_rd_wr: | |
| 452 | !DIMM4,5 | |
| 453 | stx %o0, [%l0] | |
| 454 | ldx [%l0], %g1 | |
| 455 | ||
| 456 | stx %o1, [%l1] | |
| 457 | ldx [%l1], %g1 | |
| 458 | ||
| 459 | stx %o2, [%l2] | |
| 460 | ldx [%l2], %g1 | |
| 461 | ||
| 462 | stx %o3, [%l3] | |
| 463 | ldx [%l3], %g1 | |
| 464 | ||
| 465 | stx %o4, [%l4] | |
| 466 | ldx [%l4], %g1 | |
| 467 | ||
| 468 | stx %o5, [%l5] | |
| 469 | ldx [%l5], %g1 | |
| 470 | ||
| 471 | stx %o6, [%l6] | |
| 472 | ldx [%l6], %g1 | |
| 473 | ||
| 474 | stx %o7, [%l7] | |
| 475 | ldx [%l7], %g1 | |
| 476 | ||
| 477 | /******************************** | |
| 478 | * DIMM 6, 7 | |
| 479 | *********************************/ | |
| 480 | L20_dimm67_init: | |
| 481 | setx L20_MCU_DM6_BK0, %g7, %i0 | |
| 482 | setx L20_MCU_DM6_BK2, %g7, %i1 | |
| 483 | setx L20_MCU_DM6_BK4, %g7, %i2 | |
| 484 | setx L20_MCU_DM6_BK6, %g7, %i3 | |
| 485 | ||
| 486 | setx L20_MCU_DM7_BK0, %g7, %i4 | |
| 487 | setx L20_MCU_DM7_BK2, %g7, %i5 | |
| 488 | setx L20_MCU_DM7_BK4, %g7, %i6 | |
| 489 | setx L20_MCU_DM7_BK6, %g7, %i7 | |
| 490 | ||
| 491 | inc %o0 | |
| 492 | inc %o1 | |
| 493 | inc %o2 | |
| 494 | inc %o3 | |
| 495 | inc %o4 | |
| 496 | inc %o5 | |
| 497 | inc %o6 | |
| 498 | inc %o7 | |
| 499 | ||
| 500 | L20_dimm67_rd_wr: | |
| 501 | !DIMM6,7 | |
| 502 | stx %o0, [%i0] | |
| 503 | ldx [%i0], %g1 | |
| 504 | ||
| 505 | stx %o1, [%i1] | |
| 506 | ldx [%i1], %g1 | |
| 507 | ||
| 508 | stx %o2, [%i2] | |
| 509 | ldx [%i2], %g1 | |
| 510 | ||
| 511 | stx %o3, [%i3] | |
| 512 | ldx [%i3], %g1 | |
| 513 | ||
| 514 | stx %o4, [%i4] | |
| 515 | ldx [%i4], %g1 | |
| 516 | ||
| 517 | stx %o5, [%i5] | |
| 518 | ldx [%i5], %g1 | |
| 519 | ||
| 520 | stx %o6, [%i6] | |
| 521 | ldx [%i6], %g1 | |
| 522 | ||
| 523 | stx %o7, [%i7] | |
| 524 | ldx [%i7], %g1 | |
| 525 | ||
| 526 | #endif | |
| 527 | ||
| 528 | #ifdef BANK1 | |
| 529 | ||
| 530 | /*********************************** | |
| 531 | L2 Bank 1 | |
| 532 | ***********************************/ | |
| 533 | ||
| 534 | /******************************** | |
| 535 | * DIMM 0, 1 | |
| 536 | *********************************/ | |
| 537 | L2_1_dimm01_init: | |
| 538 | setx L2_1_MCU_DM0_BK0, %g7, %l0 | |
| 539 | setx L2_1_MCU_DM0_BK2, %g7, %l1 | |
| 540 | setx L2_1_MCU_DM0_BK4, %g7, %l2 | |
| 541 | setx L2_1_MCU_DM0_BK6, %g7, %l3 | |
| 542 | ||
| 543 | setx L2_1_MCU_DM1_BK0, %g7, %l4 | |
| 544 | setx L2_1_MCU_DM1_BK2, %g7, %l5 | |
| 545 | setx L2_1_MCU_DM1_BK4, %g7, %l6 | |
| 546 | setx L2_1_MCU_DM1_BK6, %g7, %l7 | |
| 547 | ||
| 548 | inc %o0 | |
| 549 | inc %o1 | |
| 550 | inc %o2 | |
| 551 | inc %o3 | |
| 552 | inc %o4 | |
| 553 | inc %o5 | |
| 554 | inc %o6 | |
| 555 | inc %o7 | |
| 556 | ||
| 557 | L2_1_dimm01_rd_wr: | |
| 558 | !DIMM0,1 | |
| 559 | stx %o0, [%l0] | |
| 560 | ldx [%l0], %g1 | |
| 561 | ||
| 562 | stx %o1, [%l1] | |
| 563 | ldx [%l1], %g1 | |
| 564 | ||
| 565 | stx %o2, [%l2] | |
| 566 | ldx [%l2], %g1 | |
| 567 | ||
| 568 | stx %o3, [%l3] | |
| 569 | ldx [%l3], %g1 | |
| 570 | ||
| 571 | stx %o4, [%l4] | |
| 572 | ldx [%l4], %g1 | |
| 573 | ||
| 574 | stx %o5, [%l5] | |
| 575 | ldx [%l5], %g1 | |
| 576 | ||
| 577 | stx %o6, [%l6] | |
| 578 | ldx [%l6], %g1 | |
| 579 | ||
| 580 | stx %o7, [%l7] | |
| 581 | ldx [%l7], %g1 | |
| 582 | ||
| 583 | /******************************** | |
| 584 | * DIMM 2, 3 | |
| 585 | *********************************/ | |
| 586 | L2_1_dimm23_init: | |
| 587 | setx L2_1_MCU_DM2_BK0, %g7, %i0 | |
| 588 | setx L2_1_MCU_DM2_BK2, %g7, %i1 | |
| 589 | setx L2_1_MCU_DM2_BK4, %g7, %i2 | |
| 590 | setx L2_1_MCU_DM2_BK6, %g7, %i3 | |
| 591 | ||
| 592 | setx L2_1_MCU_DM3_BK0, %g7, %i4 | |
| 593 | setx L2_1_MCU_DM3_BK2, %g7, %i5 | |
| 594 | setx L2_1_MCU_DM3_BK4, %g7, %i6 | |
| 595 | setx L2_1_MCU_DM3_BK6, %g7, %i7 | |
| 596 | ||
| 597 | inc %o0 | |
| 598 | inc %o1 | |
| 599 | inc %o2 | |
| 600 | inc %o3 | |
| 601 | inc %o4 | |
| 602 | inc %o5 | |
| 603 | inc %o6 | |
| 604 | inc %o7 | |
| 605 | ||
| 606 | L2_1_dimm23_rd_wr: | |
| 607 | !DIMM2,3 | |
| 608 | stx %o0, [%i0] | |
| 609 | ldx [%i0], %g1 | |
| 610 | ||
| 611 | stx %o1, [%i1] | |
| 612 | ldx [%i1], %g1 | |
| 613 | ||
| 614 | stx %o2, [%i2] | |
| 615 | ldx [%i2], %g1 | |
| 616 | ||
| 617 | stx %o3, [%i3] | |
| 618 | ldx [%i3], %g1 | |
| 619 | ||
| 620 | stx %o4, [%i4] | |
| 621 | ldx [%i4], %g1 | |
| 622 | ||
| 623 | stx %o5, [%i5] | |
| 624 | ldx [%i5], %g1 | |
| 625 | ||
| 626 | stx %o6, [%i6] | |
| 627 | ldx [%i6], %g1 | |
| 628 | ||
| 629 | stx %o7, [%i7] | |
| 630 | ldx [%i7], %g1 | |
| 631 | ||
| 632 | ||
| 633 | /******************************** | |
| 634 | * DIMM4, 5 | |
| 635 | *********************************/ | |
| 636 | L2_1_dimm45_init: | |
| 637 | setx L2_1_MCU_DM4_BK0, %g7, %l0 | |
| 638 | setx L2_1_MCU_DM4_BK2, %g7, %l1 | |
| 639 | setx L2_1_MCU_DM4_BK4, %g7, %l2 | |
| 640 | setx L2_1_MCU_DM4_BK6, %g7, %l3 | |
| 641 | ||
| 642 | setx L2_1_MCU_DM5_BK0, %g7, %l4 | |
| 643 | setx L2_1_MCU_DM5_BK2, %g7, %l5 | |
| 644 | setx L2_1_MCU_DM5_BK4, %g7, %l6 | |
| 645 | setx L2_1_MCU_DM5_BK6, %g7, %l7 | |
| 646 | ||
| 647 | inc %o0 | |
| 648 | inc %o1 | |
| 649 | inc %o2 | |
| 650 | inc %o3 | |
| 651 | inc %o4 | |
| 652 | inc %o5 | |
| 653 | inc %o6 | |
| 654 | inc %o7 | |
| 655 | ||
| 656 | L2_1_dimm45_rd_wr: | |
| 657 | !DIMM4,5 | |
| 658 | stx %o0, [%l0] | |
| 659 | ldx [%l0], %g1 | |
| 660 | ||
| 661 | stx %o1, [%l1] | |
| 662 | ldx [%l1], %g1 | |
| 663 | ||
| 664 | stx %o2, [%l2] | |
| 665 | ldx [%l2], %g1 | |
| 666 | ||
| 667 | stx %o3, [%l3] | |
| 668 | ldx [%l3], %g1 | |
| 669 | ||
| 670 | stx %o4, [%l4] | |
| 671 | ldx [%l4], %g1 | |
| 672 | ||
| 673 | stx %o5, [%l5] | |
| 674 | ldx [%l5], %g1 | |
| 675 | ||
| 676 | stx %o6, [%l6] | |
| 677 | ldx [%l6], %g1 | |
| 678 | ||
| 679 | stx %o7, [%l7] | |
| 680 | ldx [%l7], %g1 | |
| 681 | ||
| 682 | /******************************** | |
| 683 | * DIMM 6, 7 | |
| 684 | *********************************/ | |
| 685 | L2_1_dimm67_init: | |
| 686 | setx L2_1_MCU_DM6_BK0, %g7, %i0 | |
| 687 | setx L2_1_MCU_DM6_BK2, %g7, %i1 | |
| 688 | setx L2_1_MCU_DM6_BK4, %g7, %i2 | |
| 689 | setx L2_1_MCU_DM6_BK6, %g7, %i3 | |
| 690 | ||
| 691 | setx L2_1_MCU_DM7_BK0, %g7, %i4 | |
| 692 | setx L2_1_MCU_DM7_BK2, %g7, %i5 | |
| 693 | setx L2_1_MCU_DM7_BK4, %g7, %i6 | |
| 694 | setx L2_1_MCU_DM7_BK6, %g7, %i7 | |
| 695 | ||
| 696 | ||
| 697 | inc %o0 | |
| 698 | inc %o1 | |
| 699 | inc %o2 | |
| 700 | inc %o3 | |
| 701 | inc %o4 | |
| 702 | inc %o5 | |
| 703 | inc %o6 | |
| 704 | inc %o7 | |
| 705 | ||
| 706 | L2_1_dimm67_rd_wr: | |
| 707 | !DIMM6,7 | |
| 708 | stx %o0, [%i0] | |
| 709 | ldx [%i0], %g1 | |
| 710 | ||
| 711 | stx %o1, [%i1] | |
| 712 | ldx [%i1], %g1 | |
| 713 | ||
| 714 | stx %o2, [%i2] | |
| 715 | ldx [%i2], %g1 | |
| 716 | ||
| 717 | stx %o3, [%i3] | |
| 718 | ldx [%i3], %g1 | |
| 719 | ||
| 720 | stx %o4, [%i4] | |
| 721 | ldx [%i4], %g1 | |
| 722 | ||
| 723 | stx %o5, [%i5] | |
| 724 | ldx [%i5], %g1 | |
| 725 | ||
| 726 | stx %o6, [%i6] | |
| 727 | ldx [%i6], %g1 | |
| 728 | ||
| 729 | stx %o7, [%i7] | |
| 730 | ldx [%i7], %g1 | |
| 731 | #endif | |
| 732 | ||
| 733 | ||
| 734 | /****************************************************** | |
| 735 | * Exit code | |
| 736 | *******************************************************/ | |
| 737 | ||
| 738 | test_pass: | |
| 739 | EXIT_GOOD | |
| 740 | ||
| 741 | test_fail: | |
| 742 | EXIT_BAD | |
| 743 |