Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / memory / memop_l2_err_inject_reg.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: memop_l2_err_inject_reg.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
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17* GNU General Public License for more details.
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37*/
38#define MAIN_PAGE_NUCLEUS_ALSO
39#define MAIN_PAGE_HV_ALSO
40#define L2_ERROR_INJECT_REG_ADDR 0xad00000000
41
42#include "hboot.s"
43#include "asi_s.h"
44
45/************************************************************************
46 Test case code start
47 ************************************************************************/
48
49.text
50.global main
51
52main:
53 ta T_CHANGE_HPRIV
54
55 ! Read the bank 0 L2 Error Injection Register
56bank0:
57 setx L2_ERROR_INJECT_REG_ADDR, %g1, %g2
58 ldx [%g2], %g5
59 membar #Sync
60
61 ! Write the bank 0 L2 Error Injection Register
62
63 stx %g5, [%g2]
64 membar #Sync
65
66 ! Read the bank 1 L2 Error Injection Register
67bank1:
68 add %g2, 64, %g2
69 ldx [%g2], %g5
70 membar #Sync
71
72 ! Write the bank 1 L2 Error Injection Register
73
74 stx %g5, [%g2]
75 membar #Sync
76
77 ! Read the bank 2 L2 Error Injection Register
78bank2:
79 add %g2, 64, %g2
80 ldx [%g2], %g5
81 membar #Sync
82
83 ! Write the bank 2 L2 Error Injection Register
84
85 stx %g5, [%g2]
86 membar #Sync
87
88 ! Read the bank 3 L2 Error Injection Register
89bank3:
90 add %g2, 64, %g2
91 ldx [%g2], %g5
92 membar #Sync
93
94 ! Write the bank 3 L2 Error Injection Register
95
96 stx %g5, [%g2]
97 membar #Sync
98
99 ! Read the bank 4 L2 Error Injection Register
100bank4:
101 add %g2, 64, %g2
102 ldx [%g2], %g5
103 membar #Sync
104
105 ! Write the bank 4 L2 Error Injection Register
106
107 stx %g5, [%g2]
108 membar #Sync
109
110 ! Read the bank 5 L2 Error Injection Register
111bank5:
112 add %g2, 64, %g2
113 ldx [%g2], %g5
114 membar #Sync
115
116 ! Write the bank 5 L2 Error Injection Register
117
118 stx %g5, [%g2]
119 membar #Sync
120
121 ! Read the bank 6 L2 Error Injection Register
122bank6:
123 add %g2, 64, %g2
124 ldx [%g2], %g5
125 membar #Sync
126
127 ! Write the bank 6 L2 Error Injection Register
128
129 stx %g5, [%g2]
130 membar #Sync
131
132 ! Read the bank 7 L2 Error Injection Register
133bank7:
134 add %g2, 64, %g2
135 ldx [%g2], %g5
136 membar #Sync
137
138 ! Write the bank 7 L2 Error Injection Register
139
140 stx %g5, [%g2]
141 membar #Sync
142
143test_passed:
144 EXIT_GOOD
145
146test_failed:
147 EXIT_BAD
148
149
150/************************************************************************
151 Test case data start
152 ************************************************************************/
153.data
154user_data_start:
155 .xword 0x0
156.end
157
158
159