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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / memory / memop_l2_tag_access.s
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AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: memop_l2_tag_access.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
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31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_NUCLEUS_ALSO
39#define MAIN_PAGE_HV_ALSO
40#define L2_TAG_ARRAY_BASE_ADDR 0xa400000000
41
42#include "hboot.s"
43#include "asi_s.h"
44
45/************************************************************************
46 Test case code start
47 ************************************************************************/
48
49.text
50.global main
51
52main:
53 ta T_CHANGE_HPRIV
54
55 ! Until the simulation evniorment gets updated to initialize
56 ! the tag array in L2$, do it myself.
57
58init0:
59 setx L2_TAG_ARRAY_BASE_ADDR, %g1, %o0 ! address to init.
60 set 0x40, %g3 ! Increment
61 set 8, %g4 ! # lines to initialize
62
63initloop:
64 call init_l2_line
65 sub %g4, 1, %g4
66 cmp %g4, 0
67 bne initloop
68 add %o0, %g3, %o0
69
70init1:
71 setx L2_TAG_ARRAY_BASE_ADDR, %g1, %o0 ! address to init.
72 setx 0x00200, %g1, %g3 ! increment to get next set
73 setx 0x3fe00, %g1, %g4
74 add %o0, %g4, %g4 ! addr for last set in bank 0
75
76initloop1:
77 call init_l2_line
78 nop
79 cmp %o0, %g4
80 bne initloop1
81 add %o0, %g3, %o0
82
83 ! Done with initialization
84
85
86 ! Check first word in each bank of the L2 tag array.
87
88 setx L2_TAG_ARRAY_BASE_ADDR, %g1, %g2
89bank0:
90 ldx [%g2], %l0
91 membar #Sync
92 stx %l0, [%g2]
93 membar #Sync
94bank1:
95 add %g2, 0x40, %g2
96 ldx [%g2], %l0
97 membar #Sync
98 stx %l0, [%g2]
99 membar #Sync
100bank2:
101 add %g2, 0x40, %g2
102 ldx [%g2], %l0
103 membar #Sync
104 stx %l0, [%g2]
105 membar #Sync
106bank3:
107 add %g2, 0x40, %g2
108 ldx [%g2], %l0
109 membar #Sync
110 stx %l0, [%g2]
111 membar #Sync
112bank4:
113 add %g2, 0x40, %g2
114 ldx [%g2], %l0
115 membar #Sync
116 stx %l0, [%g2]
117 membar #Sync
118bank5:
119 add %g2, 0x40, %g2
120 ldx [%g2], %l0
121 membar #Sync
122 stx %l0, [%g2]
123 membar #Sync
124bank6:
125 add %g2, 0x40, %g2
126 ldx [%g2], %l0
127 membar #Sync
128 stx %l0, [%g2]
129 membar #Sync
130bank7:
131 add %g2, 0x40, %g2
132 ldx [%g2], %l0
133 membar #Sync
134 stx %l0, [%g2]
135 membar #Sync
136
137 ! Check first word in each set of bank 0 of the L2 tag array.
138sets:
139 setx L2_TAG_ARRAY_BASE_ADDR, %g1, %g2
140 setx 0x00200, %g1, %g3 ! increment to get next set
141 setx 0x3fe00, %g1, %g4
142 add %g2, %g4, %g4 ! addr for last set in bank 0
143setloop:
144 ldx [%g2], %l1
145 stx %l1, [%g2]
146 cmp %g2, %g4
147 bne setloop
148 add %g2, %g3, %g2
149
150 ! Check first word in each way of set 0, bank 0 of the L2 tag array.
151ways:
152 setx L2_TAG_ARRAY_BASE_ADDR, %g1, %g2
153 setx 0x040000, %g1, %g3 ! increment to get next way
154 setx 0x3c0000, %g1, %g4
155 add %g2, %g4, %g4 ! addr for last way in bank 0, set 0
156wayloop:
157 ldx [%g2], %l1
158 stx %l1, [%g2]
159 cmp %g2, %g4
160 bne wayloop
161 add %g2, %g3, %g2
162
163 ba test_passed
164 nop
165
166/**********************************************************************
167 * Common code.
168 *********************************************************************/
169
170 ! Assumes that %o0 contains VA that maps to L2$ line to be initialized.
171 ! This is done by doing 16 stores from different addresses that alias
172 ! to that line.
173
174init_l2_line:
175 setx 0x3ffff, %o1, %o2
176 and %o0, %o2, %o3
177 setx alias1, %o1, %o4
178 ldx [%o3+%o4], %g0
179 setx 0x40000, %o1, %o5
180 add %o4, %o5, %o4
181 ldx [%o3+%o4], %g0
182 add %o4, %o5, %o4
183 ldx [%o3+%o4], %g0
184 add %o4, %o5, %o4
185 ldx [%o3+%o4], %g0
186 add %o4, %o5, %o4
187 ldx [%o3+%o4], %g0
188 add %o4, %o5, %o4
189 ldx [%o3+%o4], %g0
190 add %o4, %o5, %o4
191 ldx [%o3+%o4], %g0
192 add %o4, %o5, %o4
193 ldx [%o3+%o4], %g0
194 add %o4, %o5, %o4
195 ldx [%o3+%o4], %g0
196 add %o4, %o5, %o4
197 ldx [%o3+%o4], %g0
198 add %o4, %o5, %o4
199 ldx [%o3+%o4], %g0
200 add %o4, %o5, %o4
201 ldx [%o3+%o4], %g0
202 add %o4, %o5, %o4
203 ldx [%o3+%o4], %g0
204 add %o4, %o5, %o4
205 ldx [%o3+%o4], %g0
206 add %o4, %o5, %o4
207 ldx [%o3+%o4], %g0
208 add %o4, %o5, %o4
209 ldx [%o3+%o4], %o4
210 membar #Sync
211 and %o4, %o3, %g0
212 jmpl %o7+0x8, %g0
213 nop
214
215
216test_passed:
217 EXIT_GOOD
218
219test_failed:
220 EXIT_BAD
221
222
223/************************************************************************
224 Test case data start
225 ************************************************************************/
226
227SECTION .DATA DATA_VA=0x70000000
228attr_data {
229 Name = .DATA,
230 hypervisor,
231 compressimage
232}
233
234.data
235.global single_data
236.global double_data
237.global zero_data
238.global block_data
239.global result_area
240.global alias1
241.global alias2
242.global alias3
243.global alias4
244.global alias5
245.global alias6
246.global alias7
247.global alias8
248.global alias9
249.global alias10
250.global alias11
251.global alias12
252.global alias13
253.global alias14
254.global alias15
255.global alias16
256
257user_data_start:
258zero_data:
259 .xword 0x0000000000000000
260 .align 256
261
262 .align 0x40000 ! each 246kb, 0x40000, aliases to same L2$ line
263alias1:
264 .skip 1024
265 .align 0x40000
266alias2:
267 .skip 1024
268 .align 0x40000
269alias3:
270 .skip 1024
271 .align 0x40000
272alias4:
273 .skip 1024
274 .align 0x40000
275alias5:
276 .skip 1024
277 .align 0x40000
278alias6:
279 .skip 1024
280 .align 0x40000
281alias7:
282 .skip 1024
283 .align 0x40000
284alias8:
285 .skip 1024
286 .align 0x40000
287alias9:
288 .skip 1024
289 .align 0x40000
290alias10:
291 .skip 1024
292 .align 0x40000
293alias11:
294 .skip 1024
295 .align 0x40000
296alias12:
297 .skip 1024
298 .align 0x40000
299alias13:
300 .skip 1024
301 .align 0x40000
302alias14:
303 .skip 1024
304 .align 0x40000
305alias15:
306 .skip 1024
307 .align 0x40000
308alias16:
309 .skip 1024
310
311user_data_end:
312.end
313
314
315
Full OpenSPARC design & verification tarball including full HDL.