[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / memory / memop_mt_l2_dep_store.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: memop_mt_l2_dep_store.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define MAIN_PAGE_NUCLEUS_ALSO
#define MAIN_PAGE_HV_ALSO

#ifndef SYNC_THREADS
#define SYNC_THREADS	0xff
#endif

#include "hboot.s"
#include "asi_s.h"
#include "nmacros.h"

/****************************************************************
* Objective:
* Macro used by one main thread to sync up with any other running
* threads, uses parking as the method to accomplish this.
* 
* Syntax:
* SYNC_THREAD_MAIN(
*       unpark_value, exit_label, tmp_reg_1, tmp_reg_2, tmp_reg_3
*       )
* 
* Args:
*    unpark_value       -> value to write to CMP_CORE_RUNNING_W1S
*                          to unpark the other threads, 1 bit/thread
*    exit_label         -> label to branch to on timeout
*    tmp_reg_1/2/3      -> temporary registers
* 
* Expectation from macro user:
* The macro SYNC_THREAD_OTHER will be used in the other thread's code.
* These two macros work together to accomplish the synchronization.
* NOTE that these macros assume that the other threads have already
* been started.
*/

define(SYNC_THREAD_MAIN,`
        setx    ASI_CMP_CORE_RUNNING_STATUS, $3, $4
        setx    0x400, $3, $5
1:
        subcc   $5, 1, $5
        brz     $5, $2
        nop
        ldxa    [$4] ASI_CMP_CORE, $3
        membar  #Sync
        subcc   $3, 0x1, $3
        brnz    $3, 1b
        nop

        setx    $1, $3, $4
        setx    ASI_CMP_CORE_RUNNING_W1S, $3, $5
        stxa    $4, [$5] ASI_CMP_CORE
        membar  #Sync
      ')


/****************************************************************
* Objective:
* Macro used other threads to sync up with a main thread, uses
* parking as the method to accomplish this.
* 
* Syntax:
* SYNC_THREAD_OTHER(
*       thread_id, tmp_reg_1, tmp_reg_2
*       )
* 
* Args:
*    thread_id          -> register containing thread id # for this tread
*    tmp_reg_1/2        -> temporary registers
* 
* Expectation from macro user:
* The macro SYNC_THREAD_OTHER will be used in the code for any thread
* except thread 0.  Works with the SYNC_THREAD_MAIN macro.  These two
* macros work together to accomplish the synchronization.
*/

define(SYNC_THREAD_OTHER,`
      setx      ASI_CMP_CORE_RUNNING_W1C, $2, $3
      set       0x1, $2
      sllx      $2, $1, $2
      stxa      $2, [$3] ASI_CMP_CORE
      membar	#Sync
      ')

	
/************************************************************************
   Test case code start
 ************************************************************************/

.text
.global main

main:
	ta	T_CHANGE_HPRIV

	! Initialize the global registers.
	mov	%g0, %g1	
	mov	%g0, %g2
	mov	%g0, %g3
	mov	%g0, %g4
	mov	%g0, %g5
	mov	%g0, %g6
	mov	%g0, %g7

	ta	T_RD_THID
	cmp	%o1, 0x0
	be	main_t0
	nop
	ba	main_t1_to_t63
	nop

!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!
! Thread 0 Start
!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!

main_t0:

	! Sync up all the treads.

	SYNC_THREAD_MAIN( SYNC_THREADS, test_failed, %g1, %g2, %g3 )

	! Bring data of all 1's into a L2 cache line
test1_t0:
	setx	dep_store_addr, %g1, %g2
	ldx	[%g2], %l0
	membar	#Sync

	! Do byte stores into that same L2 cache line.
	! Data = 0, 1, 2, 3, ..., 63

	mov	%g2, %g3	! %g3 = address
	mov	%g0, %g1	! %g1 = data

storeloop_t0:
	stb	%g1, [%g3]
	add	%g1, 1, %g1
	cmp	%g1, 63
	bne	storeloop_t0
	add	%g3, 1, %g3

	! Do byte reads from that same L2 cache line
	! Check the data read.

	mov	%g2, %g3	! %g3 = address
	mov	%g0, %g1	! %g1 = data

readloop_t0:
	ldub	[%g3], %l1
	cmp	%l1, %g1
	bne	test_failed
	add	%g1, 1, %g1
	cmp	%g1, 63
	bne	readloop_t0
	add	%g3, 1, %g3

	ba	test_passed
	nop

!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!
! Thread 1 Start
!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!

main_t1_to_t63:	

	! Sync up the treads.

	SYNC_THREAD_OTHER( %o1,%g1,%g2 )
	
	! Bring data of all 1's into a L2 cache line
test1_t1_t63:
	setx	dep_store_addr, %g1, %g2
	ldx	[%g2], %l0
	membar	#Sync

	! Do byte stores into that same L2 cache line.
	! Data = 0, 1, 2, 3, ..., 63

	mov	%g2, %g3	! %g3 = address
	mov	%g0, %g1	! %g1 = data

storeloop_t1_t63:
	stb	%g1, [%g3]
	add	%g1, 1, %g1
	cmp	%g1, 63
	bne	storeloop_t1_t63
	add	%g3, 1, %g3

	! Do byte reads from that same L2 cache line
	! Check the data read.

	mov	%g2, %g3	! %g3 = address
	mov	%g0, %g1	! %g1 = data

readloop_t1_t63:
	ldub	[%g3], %l1
	cmp	%l1, %g1
	bne	test_failed
	add	%g1, 1, %g1
	cmp	%g1, 63
	bne	readloop_t1_t63
	add	%g3, 1, %g3

	ba	test_passed
	nop

/**********************************************************************
 *  Common code.
 *********************************************************************/

test_passed:
	EXIT_GOOD
	nop

test_failed:
	EXIT_BAD
	nop
user_text_end:	

/************************************************************************
 *  Test case data start
 ************************************************************************/
	.align	8192
.data
user_data_start:
	.xword 0x00000000
	.xword 0x00000000
	.xword 0x00000000
	.xword 0x00000000
dep_store_addr:	
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
	.xword 0xffffffff
.end
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: memop_mt_l2_dep_store.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define MAIN_PAGE_NUCLEUS_ALSO
	39	#define MAIN_PAGE_HV_ALSO
	40
	41	#ifndef SYNC_THREADS
	42	#define SYNC_THREADS 0xff
	43	#endif
	44
	45	#include "hboot.s"
	46	#include "asi_s.h"
	47	#include "nmacros.h"
	48
	49	/****************************************************************
	50	* Objective:
	51	* Macro used by one main thread to sync up with any other running
	52	* threads, uses parking as the method to accomplish this.
	53	*
	54	* Syntax:
	55	* SYNC_THREAD_MAIN(
	56	* unpark_value, exit_label, tmp_reg_1, tmp_reg_2, tmp_reg_3
	57	* )
	58	*
	59	* Args:
	60	* unpark_value -> value to write to CMP_CORE_RUNNING_W1S
	61	* to unpark the other threads, 1 bit/thread
	62	* exit_label -> label to branch to on timeout
	63	* tmp_reg_1/2/3 -> temporary registers
	64	*
65	* Expectation from macro user:
66	* The macro SYNC_THREAD_OTHER will be used in the other thread's code.
67	* These two macros work together to accomplish the synchronization.
68	* NOTE that these macros assume that the other threads have already
69	* been started.
70	*/
71
72	define(SYNC_THREAD_MAIN,`
73	setx ASI_CMP_CORE_RUNNING_STATUS, $3, $4
74	setx 0x400, $3, $5
75	1:
76	subcc $5, 1, $5
77	brz $5, $2
78	nop
79	ldxa [$4] ASI_CMP_CORE, $3
80	membar #Sync
81	subcc $3, 0x1, $3
82	brnz $3, 1b
83	nop
84
85	setx $1, $3, $4
86	setx ASI_CMP_CORE_RUNNING_W1S, $3, $5
87	stxa $4, [$5] ASI_CMP_CORE
88	membar #Sync
89	')
90
91
92	/****************************************************************
93	* Objective:
94	* Macro used other threads to sync up with a main thread, uses
95	* parking as the method to accomplish this.
96	*
97	* Syntax:
98	* SYNC_THREAD_OTHER(
99	* thread_id, tmp_reg_1, tmp_reg_2
100	* )
101	*
102	* Args:
103	* thread_id -> register containing thread id # for this tread
104	* tmp_reg_1/2 -> temporary registers
105	*
106	* Expectation from macro user:
107	* The macro SYNC_THREAD_OTHER will be used in the code for any thread
108	* except thread 0. Works with the SYNC_THREAD_MAIN macro. These two
109	* macros work together to accomplish the synchronization.
110	*/
111
112	define(SYNC_THREAD_OTHER,`
113	setx ASI_CMP_CORE_RUNNING_W1C, $2, $3
114	set 0x1, $2
115	sllx $2, $1, $2
116	stxa $2, [$3] ASI_CMP_CORE
117	membar #Sync
118	')
119
120
121	/************************************************************************
122	Test case code start
123	************************************************************************/
124
125	.text
126	.global main
127
128	main:
129	ta T_CHANGE_HPRIV
130
131	! Initialize the global registers.
132	mov %g0, %g1
133	mov %g0, %g2
134	mov %g0, %g3
135	mov %g0, %g4
136	mov %g0, %g5
137	mov %g0, %g6
138	mov %g0, %g7
139
140	ta T_RD_THID
141	cmp %o1, 0x0
142	be main_t0
143	nop
144	ba main_t1_to_t63
145	nop
146
147	!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
148	!
149	! Thread 0 Start
150	!
151	!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
152
153	main_t0:
154
155	! Sync up all the treads.
156
157	SYNC_THREAD_MAIN( SYNC_THREADS, test_failed, %g1, %g2, %g3 )
158
159	! Bring data of all 1's into a L2 cache line
160	test1_t0:
161	setx dep_store_addr, %g1, %g2
162	ldx [%g2], %l0
163	membar #Sync
164
165	! Do byte stores into that same L2 cache line.
166	! Data = 0, 1, 2, 3, ..., 63
167
168	mov %g2, %g3 ! %g3 = address
169	mov %g0, %g1 ! %g1 = data
170
171	storeloop_t0:
172	stb %g1, [%g3]
173	add %g1, 1, %g1
174	cmp %g1, 63
175	bne storeloop_t0
176	add %g3, 1, %g3
177
178	! Do byte reads from that same L2 cache line
179	! Check the data read.
180
181	mov %g2, %g3 ! %g3 = address
182	mov %g0, %g1 ! %g1 = data
183
184	readloop_t0:
185	ldub [%g3], %l1
186	cmp %l1, %g1
187	bne test_failed
188	add %g1, 1, %g1
189	cmp %g1, 63
190	bne readloop_t0
191	add %g3, 1, %g3
192
193	ba test_passed
194	nop
195
196	!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
197	!
198	! Thread 1 Start
199	!
200	!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
201
202	main_t1_to_t63:
203
204	! Sync up the treads.
205
206	SYNC_THREAD_OTHER( %o1,%g1,%g2 )
207
208	! Bring data of all 1's into a L2 cache line
209	test1_t1_t63:
210	setx dep_store_addr, %g1, %g2
211	ldx [%g2], %l0
212	membar #Sync
213
214	! Do byte stores into that same L2 cache line.
215	! Data = 0, 1, 2, 3, ..., 63
216
217	mov %g2, %g3 ! %g3 = address
218	mov %g0, %g1 ! %g1 = data
219
220	storeloop_t1_t63:
221	stb %g1, [%g3]
222	add %g1, 1, %g1
223	cmp %g1, 63
224	bne storeloop_t1_t63
225	add %g3, 1, %g3
226
227	! Do byte reads from that same L2 cache line
228	! Check the data read.
229
230	mov %g2, %g3 ! %g3 = address
231	mov %g0, %g1 ! %g1 = data
232
233	readloop_t1_t63:
234	ldub [%g3], %l1
235	cmp %l1, %g1
236	bne test_failed
237	add %g1, 1, %g1
238	cmp %g1, 63
239	bne readloop_t1_t63
240	add %g3, 1, %g3
241
242	ba test_passed
243	nop
244
245	/**********************************************************************
246	* Common code.
247	*********************************************************************/
248
249	test_passed:
250	EXIT_GOOD
251	nop
252
253	test_failed:
254	EXIT_BAD
255	nop
256	user_text_end:
257
258	/************************************************************************
259	* Test case data start
260	************************************************************************/
261	.align 8192
262	.data
263	user_data_start:
264	.xword 0x00000000
265	.xword 0x00000000
266	.xword 0x00000000
267	.xword 0x00000000
268	dep_store_addr:
269	.xword 0xffffffff
270	.xword 0xffffffff
271	.xword 0xffffffff
272	.xword 0xffffffff
273	.xword 0xffffffff
274	.xword 0xffffffff
275	.xword 0xffffffff
276	.xword 0xffffffff
277	.xword 0xffffffff
278	.xword 0xffffffff
279	.xword 0xffffffff
280	.xword 0xffffffff
281	.xword 0xffffffff
282	.xword 0xffffffff
283	.xword 0xffffffff
284	.xword 0xffffffff
285	.end
286
287
288