Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / memory / memop_walk_one_addr.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: memop_walk_one_addr.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_NUCLEUS_ALSO
39#define MAIN_PAGE_HV_ALSO
40
41#include "hboot.s"
42#include "asi_s.h"
43
44/************************************************************************
45 Test case code start
46 ************************************************************************/
47
48.text
49.global main
50
51main:
52 ta T_CHANGE_HPRIV
53
54 ! First do for addr[6:0], all in same L2 cache line
55byte:
56 set 1, %g7 ! %g7 = address to use
57 stb %g7, [%g7] ! addr = 0x1
58 mov %g7, %o0 ! Now flush that L2 cache line
59 call flush_l2_line
60 nop
61 ldub [%g7], %l0
62 cmp %g7, %l0
63 bne test_failed
64 nop
65halfword:
66 sllx %g7, 1, %g7 ! addr = 0x2
67 sth %g7, [%g7]
68 mov %g7, %o0 ! Now flush that L2 cache line
69 call flush_l2_line
70 nop
71 lduh [%g7], %l0
72 cmp %g7, %l0
73 bne test_failed
74 nop
75word:
76 sllx %g7, 1, %g7 ! addr = 0x4
77 stw %g7, [%g7]
78 mov %g7, %o0 ! Now flush that L2 cache line
79 call flush_l2_line
80 nop
81 lduw [%g7], %l0
82 cmp %g7, %l0
83 bne test_failed
84 nop
85doubleword:
86 sllx %g7, 1, %g7 ! addr = 0x8
87 stx %g7, [%g7]
88 mov %g7, %o0 ! Now flush that L2 cache line
89 call flush_l2_line
90 nop
91 ldx [%g7], %l0
92 cmp %g7, %l0
93 bne test_failed
94 nop
95
96 sllx %g7, 1, %g7 ! addr = 0x10
97 stx %g7, [%g7]
98 mov %g7, %o0 ! Now flush that L2 cache line
99 call flush_l2_line
100 nop
101 ldx [%g7], %l0
102 cmp %g7, %l0
103 bne test_failed
104 nop
105
106 sllx %g7, 1, %g7 ! addr = 0x20
107 stx %g7, [%g7]
108 mov %g7, %o0 ! Now flush that L2 cache line
109 call flush_l2_line
110 nop
111 ldx [%g7], %l0
112 cmp %g7, %l0
113 bne test_failed
114 nop
115
116
117 ! Now loop through addr = 0x40 to 0x8-0000-0000 (32 Gbyte)
118 ! (max. mem. addr. in sim.)
119loop:
120 setx 0x800000000, %g1, %g6 ! %g6 = ending address
121loop_top:
122 stx %g7, [%g7]
123 mov %g7, %o0
124 call flush_l2_line
125 nop
126 ldx [%g7], %l0
127 cmp %g7, %l0
128 bne test_failed
129 nop
130 cmp %g7, %g6
131 bne loop_top
132 sllx %g7, 1, %g7
133
134 ba test_passed
135 nop
136
137/**********************************************************************
138 * Common code.
139 *********************************************************************/
140
141 ! Assumes that %o0 contains VA that maps to L2$ line to be flushed.
142 ! This is done by doing 16 loads from different addresses that alias
143 ! to that line. Note that this will cause a writeback if the L2$
144 ! line is dirty.
145
146flush_l2_line:
147 setx 0x3ffff, %o1, %o2
148 and %o0, %g0, %o3
149 setx alias1, %o1, %o4
150 ld [%o3+%o4], %o5
151 setx alias2, %o1, %o4
152 ld [%o3+%o4], %o5
153 setx alias3, %o1, %o4
154 ld [%o3+%o4], %o5
155 setx alias4, %o1, %o4
156 ld [%o3+%o4], %o5
157 setx alias5, %o1, %o4
158 ld [%o3+%o4], %o5
159 setx alias6, %o1, %o4
160 ld [%o3+%o4], %o5
161 setx alias7, %o1, %o4
162 ld [%o3+%o4], %o5
163 setx alias8, %o1, %o4
164 ld [%o3+%o4], %o5
165 setx alias9, %o1, %o4
166 ld [%o3+%o4], %o5
167 setx alias10, %o1, %o4
168 ld [%o3+%o4], %o5
169 setx alias11, %o1, %o4
170 ld [%o3+%o4], %o5
171 setx alias12, %o1, %o4
172 ld [%o3+%o4], %o5
173 setx alias13, %o1, %o4
174 ld [%o3+%o4], %o5
175 setx alias14, %o1, %o4
176 ld [%o3+%o4], %o5
177 setx alias15, %o1, %o4
178 ld [%o3+%o4], %o5
179 setx alias16, %o1, %o4
180 ld [%o3+%o4], %o5
181 jmpl %o7+0x8, %g0
182 nop
183
184test_passed:
185 EXIT_GOOD
186
187test_failed:
188 EXIT_BAD
189
190
191/************************************************************************
192 Test case data start
193 ************************************************************************/
194
195SECTION .DATA DATA_VA=0x70000000
196attr_data {
197 Name = .DATA,
198 hypervisor,
199 compressimage
200}
201
202.data
203.global single_data
204.global double_data
205.global zero_data
206.global block_data
207.global result_area
208.global alias1
209.global alias2
210.global alias3
211.global alias4
212.global alias5
213.global alias6
214.global alias7
215.global alias8
216.global alias9
217.global alias10
218.global alias11
219.global alias12
220.global alias13
221.global alias14
222.global alias15
223.global alias16
224
225user_data_start:
226zero_data:
227 .xword 0x0000000000000000
228 .align 256
229
230 .align 0x40000 ! each 246kb, 0x40000, aliases to same L2$ line
231alias1:
232 .skip 1024
233 .align 0x40000
234alias2:
235 .skip 1024
236 .align 0x40000
237alias3:
238 .skip 1024
239 .align 0x40000
240alias4:
241 .skip 1024
242 .align 0x40000
243alias5:
244 .skip 1024
245 .align 0x40000
246alias6:
247 .skip 1024
248 .align 0x40000
249alias7:
250 .skip 1024
251 .align 0x40000
252alias8:
253 .skip 1024
254 .align 0x40000
255alias9:
256 .skip 1024
257 .align 0x40000
258alias10:
259 .skip 1024
260 .align 0x40000
261alias11:
262 .skip 1024
263 .align 0x40000
264alias12:
265 .skip 1024
266 .align 0x40000
267alias13:
268 .skip 1024
269 .align 0x40000
270alias14:
271 .skip 1024
272 .align 0x40000
273alias15:
274 .skip 1024
275 .align 0x40000
276alias16:
277 .skip 1024
278
279user_data_end:
280.end
281
282