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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tso_n1_dekker2.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define addrA_reg %o0 | |
39 | #define addrB_reg %o1 | |
40 | #define addrC_reg %o2 | |
41 | #define data_base_reg %o3 | |
42 | #define to_reg %o4 | |
43 | #define my_id_reg %o5 | |
44 | #define global_cnt_reg %o6 | |
45 | ||
46 | #define test_reg1 %i0 | |
47 | #define test_reg2 %i1 | |
48 | ||
49 | #define backoff_cnt %i4 | |
50 | #define backoff_hlp1 %i5 | |
51 | ||
52 | ||
53 | #define TIMEOUT 0x100 | |
54 | #define ITERATIONS 0x2 | |
55 | ||
56 | #include "hboot.s" | |
57 | ||
58 | .global main | |
59 | main: | |
60 | ||
61 | th_fork(th_main,%l0) | |
62 | ||
63 | th_main_0: | |
64 | setx addrA, %l0, addrA_reg | |
65 | setx addrB, %l0, addrB_reg | |
66 | setx addrC, %l0, addrC_reg | |
67 | set TIMEOUT, to_reg ! set timeout count | |
68 | inc to_reg | |
69 | mov to_reg, backoff_hlp1 | |
70 | dec to_reg | |
71 | set ITERATIONS, global_cnt_reg ! number of iterations | |
72 | mov %g0, my_id_reg | |
73 | ||
74 | add my_id_reg, 0x20, my_id_reg ! this is my ID address | |
75 | ||
76 | getlock0: | |
77 | set 1, test_reg1 ! | |
78 | set 0x20, test_reg2 ! | |
79 | st test_reg1, [addrA_reg] ! try to acquire lock | |
80 | st test_reg2, [addrC_reg] ! the ID register | |
81 | membar 0x40 | |
82 | ld [addrC_reg], test_reg2 | |
83 | ld [addrB_reg], test_reg1 ! try to acquire lock | |
84 | tst test_reg1 | |
85 | be gotlock0 | |
86 | nop | |
87 | ||
88 | st %g0, [addrA_reg] ! release | |
89 | ||
90 | deccc to_reg ! dec timeout count | |
91 | bne getlock0 ! branch if no timeout | |
92 | nop | |
93 | ba,a bad_end | |
94 | nop | |
95 | ||
96 | gotlock0: | |
97 | ||
98 | subcc test_reg2, 0x20, %g0 | |
99 | bne bad_end | |
100 | nop | |
101 | ||
102 | clearlock0: | |
103 | st %g0, [addrA_reg] ! unlock | |
104 | ||
105 | mov to_reg, backoff_cnt | |
106 | backoff_loop01: | |
107 | nop;nop;nop;nop; ! backoff | |
108 | deccc backoff_cnt | |
109 | bne backoff_loop01 | |
110 | nop | |
111 | ||
112 | set TIMEOUT, to_reg ! set timeout count again | |
113 | ||
114 | check_done0: | |
115 | deccc global_cnt_reg | |
116 | be good_end | |
117 | nop | |
118 | ba getlock0 | |
119 | nop | |
120 | ||
121 | th_main_1: | |
122 | th_main_4: | |
123 | setx addrA, %l0, addrA_reg | |
124 | setx addrB, %l0, addrB_reg | |
125 | setx addrC, %l0, addrC_reg | |
126 | set TIMEOUT, to_reg ! set timeout count | |
127 | inc to_reg | |
128 | mov to_reg, backoff_hlp1 | |
129 | dec to_reg | |
130 | set ITERATIONS, global_cnt_reg ! set number of iterations | |
131 | mov %g0, my_id_reg | |
132 | ||
133 | add my_id_reg, 0x24, my_id_reg | |
134 | ||
135 | getlock1: | |
136 | set 1, test_reg1 | |
137 | set 0x21, test_reg2 ! the ID register | |
138 | st test_reg1, [addrB_reg] ! try to acquire lock | |
139 | st test_reg2, [addrC_reg] ! | |
140 | membar 0x40 | |
141 | ld [addrC_reg], test_reg2 | |
142 | ld [addrA_reg], test_reg1 ! try to acquire lock | |
143 | tst test_reg1 | |
144 | be gotlock1 | |
145 | nop | |
146 | ||
147 | st %g0, [addrB_reg] ! release | |
148 | ||
149 | sub backoff_hlp1, to_reg, backoff_cnt | |
150 | backoff_loop10: | |
151 | nop;nop;nop;nop; ! quasi exponential backoff | |
152 | deccc backoff_cnt ! well, kinda linear. | |
153 | bne backoff_loop10 | |
154 | nop | |
155 | ||
156 | deccc to_reg ! dec timeout count | |
157 | bne getlock1 ! branch if no timeout | |
158 | nop | |
159 | ba,a bad_end | |
160 | nop | |
161 | ||
162 | gotlock1: ! do something | |
163 | subcc test_reg2, 0x21, %g0 | |
164 | bne bad_end | |
165 | nop | |
166 | ||
167 | clearlock1: | |
168 | st %g0, [addrB_reg] ! unlock | |
169 | ||
170 | set TIMEOUT, to_reg ! set timeout count again | |
171 | ||
172 | check_done1: ! iterate or finish | |
173 | deccc global_cnt_reg | |
174 | be good_end | |
175 | nop | |
176 | ba getlock1 | |
177 | nop | |
178 | ||
179 | good_end: | |
180 | ta T_GOOD_TRAP | |
181 | bad_end: | |
182 | ta T_BAD_TRAP | |
183 | ||
184 | !========================== | |
185 | ||
186 | ||
187 | SECTION .MY_DATA0 TEXT_VA=0xf0100000, DATA_VA=0xd0100000 | |
188 | attr_data { | |
189 | Name = .MY_DATA0, | |
190 | VA= 0x0d0100000 | |
191 | RA= 0x1d0100000 | |
192 | PA= ra2pa(0x1d0100000,0), | |
193 | part_0_ctx_nonzero_tsb_config_0, | |
194 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
195 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
196 | TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1 | |
197 | } | |
198 | ||
199 | attr_text { | |
200 | Name = .MY_DATA0, | |
201 | VA= 0x0f0100000 | |
202 | RA= 0x1f0100000 | |
203 | PA= ra2pa(0x1f0100000,0), | |
204 | part_0_ctx_nonzero_tsb_config_0, | |
205 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
206 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
207 | TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1 | |
208 | } | |
209 | ||
210 | .data | |
211 | ||
212 | .global addrA | |
213 | .global addrB | |
214 | .global addrC | |
215 | .align 0x4 | |
216 | addrA: | |
217 | .word 0x0 | |
218 | ||
219 | .skip 0x1000 | |
220 | .align 0x4 | |
221 | addrB: | |
222 | .word 0x0 | |
223 | ||
224 | .skip 0x1000 | |
225 | .align 0x4 | |
226 | addrC: | |
227 | .word 0x0 | |
228 | ||
229 | SECTION .MY_DATA1 TEXT_VA=0xf1110000, DATA_VA=0xd1110000 | |
230 | attr_data { | |
231 | Name = .MY_DATA1, | |
232 | VA= 0x0d1110000, | |
233 | RA= 0x1d1110000, | |
234 | PA= ra2pa(0x1d1110000,0), | |
235 | part_0_ctx_nonzero_tsb_config_0, | |
236 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
237 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
238 | TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1 | |
239 | } | |
240 | ||
241 | attr_text { | |
242 | Name = .MY_DATA1, | |
243 | VA= 0x0f1110000, | |
244 | RA= 0x1f1110000, | |
245 | PA= ra2pa(0x1f1110000,0), | |
246 | part_0_ctx_nonzero_tsb_config_0, | |
247 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
248 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
249 | TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1 | |
250 | } | |
251 | ||
252 | .data | |
253 | .global protected_area | |
254 | protected_area: | |
255 | .word 0xbeef | |
256 | .skip 0x1000 | |
257 | .word 0xbeef | |
258 | ||
259 | .end |