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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / tso / tso_directed / tso_n1_evict_fanout_ic1_8c.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: tso_n1_evict_fanout_ic1_8c.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_BASE_DATA_ADDR 0x160000
39#define MAIN_BASE_TEXT_ADDR 0x150000
40#define MAIN_BASE_DATA_ADDR_RA 0x100160000
41#define MAIN_BASE_TEXT_ADDR_RA 0x100150000
42
43#define DATA2_BASE_DATA_ADDR 0x950000
44#define DATA2_BASE_DATA_ADDR_RA 0x100950000
45
46#define USER_PAGE_CUSTOM_MAP
47
48#define data_base_reg1 %o1
49#define data_base_reg2 %o2
50
51#define my_id_reg %l1
52#define test_reg %l2
53#define counter_reg %l3
54#define tmp1 %l4
55#define tmp2 %l5
56#define tmp3 %l6
57
58#define ITERATIONS 0x1
59
60#include "hboot.s"
61
62SECTION .MAIN TEXT_VA=0x150000, DATA_VA=0x160000
63
64attr_text {
65 Name = .MAIN,
66 VA=MAIN_BASE_TEXT_ADDR,
67 RA=MAIN_BASE_TEXT_ADDR_RA,
68 PA=ra2pa(MAIN_BASE_TEXT_ADDR_RA,0),
69part_0_ctx_nonzero_tsb_config_0,
70 TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_NFO=0,
71 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
72 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
73 }
74attr_data {
75 Name = .MAIN,
76 VA=MAIN_BASE_DATA_ADDR,
77 RA=MAIN_BASE_DATA_ADDR_RA,
78 PA=ra2pa(MAIN_BASE_DATA_ADDR_RA,0),
79part_0_ctx_nonzero_tsb_config_0,
80 TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_NFO=0,
81 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
82 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
83 }
84
85.text
86.global main
87main:
88 set ITERATIONS, counter_reg
89 add %g0, 0x100, my_id_reg
90loop: ! get the lines in I$
91 nop;nop;nop;nop;
92 nop;nop;nop;nop;
93 nop;nop;nop;nop;
94 nop;nop;nop;nop;
95
96
97th_fork(th_main,%l0)
98
99th_main_0:
100 add my_id_reg, 0x00, my_id_reg ! this is my ID address
101 ba go; nop
102th_main_1:
103 add my_id_reg, 0x04, my_id_reg
104 ba go; nop
105th_main_2:
106 add my_id_reg, 0x08, my_id_reg
107 ba go; nop
108th_main_3:
109 add my_id_reg, 0x0c, my_id_reg
110 ba go; nop
111th_main_4:
112 add my_id_reg, 0x10, my_id_reg
113 ba go; nop
114th_main_5:
115 add my_id_reg, 0x14, my_id_reg
116 ba go; nop
117th_main_6:
118 add my_id_reg, 0x18, my_id_reg
119 ba go; nop
120th_main_7:
121 add my_id_reg, 0x1c, my_id_reg
122 ba go; nop
123th_main_8:
124 add my_id_reg, 0x20, my_id_reg
125 ba go; nop
126th_main_9:
127 add my_id_reg, 0x24, my_id_reg
128 ba go; nop
129th_main_10:
130 add my_id_reg, 0x28, my_id_reg
131 ba go; nop
132th_main_11:
133 add my_id_reg, 0x2c, my_id_reg
134 ba go; nop
135th_main_12:
136 add my_id_reg, 0x30, my_id_reg
137 ba go; nop
138th_main_13:
139 add my_id_reg, 0x34, my_id_reg
140 ba go; nop
141th_main_14:
142 add my_id_reg, 0x38, my_id_reg
143 ba go; nop
144th_main_15:
145 add my_id_reg, 0x3c, my_id_reg
146 ba go; nop
147th_main_16:
148 add my_id_reg, 0x40, my_id_reg
149 ba go; nop
150th_main_17:
151 add my_id_reg, 0x44, my_id_reg
152 ba go; nop
153th_main_18:
154 add my_id_reg, 0x48, my_id_reg
155 ba go; nop
156th_main_19:
157 add my_id_reg, 0x4c, my_id_reg
158 ba go; nop
159th_main_20:
160 add my_id_reg, 0x50, my_id_reg
161 ba go; nop
162th_main_21:
163 add my_id_reg, 0x54, my_id_reg
164 ba go; nop
165th_main_22:
166 add my_id_reg, 0x58, my_id_reg
167 ba go; nop
168th_main_23:
169 add my_id_reg, 0x5c, my_id_reg
170 ba go; nop
171th_main_24:
172 add my_id_reg, 0x60, my_id_reg
173 ba go; nop
174th_main_25:
175 add my_id_reg, 0x64, my_id_reg
176 ba go; nop
177th_main_26:
178 add my_id_reg, 0x68, my_id_reg
179 ba go; nop
180th_main_27:
181 add my_id_reg, 0x6c, my_id_reg
182 ba go; nop
183th_main_28:
184 add my_id_reg, 0x70, my_id_reg
185 ba go; nop
186th_main_29:
187 add my_id_reg, 0x74, my_id_reg
188 ba go; nop
189th_main_30:
190 add my_id_reg, 0x78, my_id_reg
191 ba go; nop
192th_main_31:
193 add my_id_reg, 0x7c, my_id_reg
194 ba go; nop
195
196go:
197 setx protected_area2,%l0, data_base_reg2 ! the data area2
198 ! it aliases area1
199
200 set barrier_code,tmp1 ! meet all threads
201 jmpl tmp1,%o7 ! at the barrier
202 nop
203
204 sub my_id_reg, 0x100, tmp1 ! if I am thread 0
205 brz tmp1, evict
206 nop
207goon: ! do it again or end
208 dec counter_reg
209 brz counter_reg, good_end
210 nop
211 ba loop
212 nop
213
214evict:
215 ba goon
216 ld [data_base_reg2], test_reg ! read from data area2
217
218!=======================================================
219
220barrier_code:
221 setx barrier_data, tmp1, tmp2
222bloop1: ! lock the barrier
223 mov my_id_reg, tmp1 ! counter
224 cas [tmp2], %g0, tmp1
225 brnz tmp1, bloop1
226#ifdef PREFETCH
227 prefetch [tmp2], #n_reads
228#else
229 nop
230#endif
231
232 ld [tmp2 + 4], tmp3 ! increment
233 inc tmp3
234 st tmp3, [tmp2 + 4]
235
236 st %g0, [tmp2] ! unlock
237
238bloop3:
239 ld [tmp2 + 4], tmp3
240 brz tmp3, bout2 ! if 0 we are out.
241 sub tmp3, THREAD_COUNT, tmp3 ! subtract THREAD_COUNT
242 brnz tmp3, bloop3 ! if 0 we are also out.
243#ifdef PREFETCH
244 prefetch [tmp2], #n_reads
245#else
246 nop
247#endif
248
249bout2:
250 st %g0, [tmp2 + 4] ! clear barrier counter
251 jmpl %o7+8, %g0 ! return
252 nop
253
254good_end:
255 ta T_GOOD_TRAP
256bad_end:
257 ta T_BAD_TRAP
258
259!==========================
260
261 .data
262.global protected_area
263protected_area:
264 .word 0xbee1
265 .skip 0x1000
266 .word 0xbee1
267
268SECTION .DATA2 DATA_VA=0x950000
269
270attr_data {
271 Name = .DATA2,
272 VA=DATA2_BASE_DATA_ADDR,
273 RA=DATA2_BASE_DATA_ADDR_RA,
274 PA=ra2pa(DATA2_BASE_DATA_ADDR_RA,0),
275part_0_ctx_nonzero_tsb_config_0,
276 TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_NFO=0,
277 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
278 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
279 }
280
281.data
282.global protected_area2
283protected_area2:
284 .word 0xbee2
285 .skip 0x400
286.global barrier_data
287barrier_data:
288 .word 0x0
289 .word 0x0
290
291
292
Full OpenSPARC design & verification tarball including full HDL.