[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / tso / tso_directed / tso_n1_mutex2_ldstub.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: tso_n1_mutex2_ldstub.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define spinlock_addr_reg  		%o0
#define data_base_reg	  		%o1
#define to_reg	  			%o2
#define my_id_reg	  		%o3
#define test_reg	  		%o4
#define global_cnt_reg	  		%o5
#define tmp1	  			%l7

#define TIMEOUT 	  		0x2000
#define ITERATIONS 	  		0x2

#if defined CREGS_LSU_CTL_REG_DC  && CREGS_LSU_CTL_REG_DC == 0
#define TIMEOUT 	  		0x4000
#define ITERATIONS 	  		0x1
#endif

#if defined CREGS_LSU_CTL_REG_IC  && CREGS_LSU_CTL_REG_IC == 0
#define TIMEOUT 	  		0x4000
#define ITERATIONS 	  		0x1
#endif

#if defined CREGS_L2_CTL_REG_DIS  && CREGS_L2_CTL_REG_DIS == 1
#define TIMEOUT 	  		0x4000
#define ITERATIONS 	  		0x1
#endif


#include "hboot.s"

.global main

main:
	setx    spinlock_address, %l0, spinlock_addr_reg ! spinlock address
        set     TIMEOUT,	to_reg         		 ! set timeout count 
        set     ITERATIONS,	global_cnt_reg 

        or      spinlock_addr_reg, %g0, my_id_reg

th_fork(th_main,%l0)

th_main_0:
        add     my_id_reg, 0x20, my_id_reg		!  my ID address
	stb	%g0, [my_id_reg]			! clear it 
	ba	getlock
	nop

th_main_1:
        add     my_id_reg, 0x24, my_id_reg
	stb	%g0, [my_id_reg]
	ba	getlock
	nop


th_main_2:
        add     my_id_reg, 0x28, my_id_reg
	stb	%g0, [my_id_reg]
	ba	getlock
	nop

th_main_3:
        add     my_id_reg, 0x2c, my_id_reg
	stb	%g0, [my_id_reg]
	ba	getlock
	nop

th_main_4:
        add     my_id_reg, 0x30, my_id_reg
	stb	%g0, [my_id_reg]
	ba	getlock
	nop

th_main_5:
        add     my_id_reg, 0x34, my_id_reg
	stb	%g0, [my_id_reg]
	ba	getlock
	nop

th_main_6:
        add     my_id_reg, 0x38, my_id_reg
	stb	%g0, [my_id_reg]
	ba	getlock
	nop

th_main_7:
        add     my_id_reg, 0x3c, my_id_reg
	stb	%g0, [my_id_reg]
	ba	getlock
	nop

getlock:
        deccc   to_reg          			! dec timeout count
        be      bad_end                 		! branch if no timeout
        nop
        or      %g0, my_id_reg, test_reg       		! ldstub
        ldstub  [spinlock_addr_reg], test_reg		! try to acquire lock
        tst     test_reg                       		! did we get it?
        bne     getlock
        nop

gotlock:						! do something
        set     TIMEOUT, to_reg         		! set to count again
	setx    protected_area,	%l0, data_base_reg

	set 	100, %l0
	add	%l0, my_id_reg, %l0 			! initial value 
	stx 	%l0, [data_base_reg]  			! store my ID in there
	set 	200, %l0
	add	%l0, my_id_reg, %l0 			! initial value 
	stx 	%l0, [data_base_reg+8] 			! store my ID in there
	set 	300, %l0
	add	%l0, my_id_reg, %l0 			! initial value 
	stx 	%l0, [data_base_reg+16] 		! store my ID in there
	set 	400, %l0
	add	%l0, my_id_reg, %l0 			! initial value 
	stx 	%l0, [data_base_reg+24] 		! store my ID in there
	set 	500, %l0
	add	%l0, my_id_reg, %l0 			! initial value 
	stx 	%l0, [data_base_reg+32] 		! store my ID in there
	set 	600, %l0
	add	%l0, my_id_reg, %l0 			! initial value 
	stx 	%l0, [data_base_reg+40] 		! store my ID in there
	set 	700, %l0
	add	%l0, my_id_reg, %l0 			! initial value 
	stx 	%l0, [data_base_reg+48] 		! store my ID in there
	set 	800, %l0
	add	%l0, my_id_reg, %l0 			! initial value 
	stx 	%l0, [data_base_reg+56] 		! store my ID in there
	set 	900, %l0
	add	%l0, my_id_reg, %l0 			! initial value 
	stx 	%l0, [data_base_reg+64] 		! store my ID in there

	set 	20, %l0
loop1:
	ldx 	[data_base_reg],    %i0			! read the data area
	add	%i0, 1, %i0
	stx 	%i0, [data_base_reg]  			! store my ID in there
	ldx 	[data_base_reg+8],  %i0			! read the data area
	add	%i0, 1, %i0
	stx 	%i0, [data_base_reg+8] 			! store my ID in there
	ldx 	[data_base_reg+16], %i0			! read the data area
	add	%i0, 1, %i0
	stx 	%i0, [data_base_reg+16] 		! store my ID in there
	ldx 	[data_base_reg+24], %i0			! read the data area
	add	%i0, 1, %i0
	stx 	%i0, [data_base_reg+24] 		! store my ID in there
	ldx 	[data_base_reg+32], %i0			! read the data area
	add	%i0, 1, %i0
	stx 	%i0, [data_base_reg+32] 		! store my ID in there
	ldx 	[data_base_reg+40], %i0			! read the data area
	add	%i0, 1, %i0
	stx 	%i0, [data_base_reg+40] 		! store my ID in there
	ldx 	[data_base_reg+48], %i0			! read the data area
	add	%i0, 1, %i0
	stx 	%i0, [data_base_reg+48] 		! store my ID in there
	ldx 	[data_base_reg+56], %i0			! read the data area
	add	%i0, 1, %i0
	stx 	%i0, [data_base_reg+56] 		! store my ID in there
	ldx 	[data_base_reg+64], %i0			! read the data area
	add	%i0, 1, %i0
	stx 	%i0, [data_base_reg+64] 		! store my ID in there

	deccc	%l0
	bne 	loop1					! repeat
	nop

	set 	120, %l0
	add	%l0, my_id_reg, %i0 			! initial value 
	ldx 	[data_base_reg], tmp1			! read the data area
	subcc	tmp1, %i0, %g0
	bne	bad_end
	nop

	set 	220, %l0
	add	%l0, my_id_reg, %i0 			! initial value 
	ldx 	[data_base_reg+8], tmp1			! read the data area
	subcc	tmp1, %i0, %g0
	bne	bad_end
	nop

	set 	320, %l0
	add	%l0, my_id_reg, %i0 			! initial value 
	ldx 	[data_base_reg+16], tmp1		! read the data area
	subcc	tmp1, %i0, %g0
	bne	bad_end
	nop

	set 	420, %l0
	add	%l0, my_id_reg, %i0 			! initial value 
	ldx 	[data_base_reg+24], tmp1		! read the data area
	subcc	tmp1, %i0, %g0
	bne	bad_end
	nop


	set 	520, %l0
	add	%l0, my_id_reg, %i0 			! initial value 
	ldx 	[data_base_reg+32], tmp1		! read the data area
	subcc	tmp1, %i0, %g0
	bne	bad_end
	nop

	set 	620, %l0
	add	%l0, my_id_reg, %i0 			! initial value 
	ldx 	[data_base_reg+40], tmp1		! read the data area
	subcc	tmp1, %i0, %g0
	bne	bad_end
	nop

	set 	720, %l0
	add	%l0, my_id_reg, %i0 			! initial value 
	ldx 	[data_base_reg+48], tmp1		! read the data area
	subcc	tmp1, %i0, %g0
	bne	bad_end
	nop

	set 	820, %l0
	add	%l0, my_id_reg, %i0 			! initial value 
	ldx 	[data_base_reg+56], tmp1		! read the data area
	subcc	tmp1, %i0, %g0
	bne	bad_end
	nop

	set 	920, %l0
	add	%l0, my_id_reg, %i0 			! initial value 
	ldx 	[data_base_reg+64], tmp1		! read the data area
	subcc	tmp1, %i0, %g0
	bne	bad_end
	nop

clearlock:
        stb        %g0, [spinlock_addr_reg]            ! unlock

check_done:
	deccc	global_cnt_reg
        be	good_end
	nop
	ba	getlock
	nop

good_end:
        ta      T_GOOD_TRAP
bad_end:
        ta      T_BAD_TRAP

!==========================
	.data

user_data_start:

	.skip   0x20
.align	0x8
spinlock_address:
	.word	0x0
	.skip   0x800
.align	0x8
protected_area:
	.word	0xbeef
	.skip 0x1000
	.word	0xbeef
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: tso_n1_mutex2_ldstub.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define spinlock_addr_reg %o0
	39	#define data_base_reg %o1
	40	#define to_reg %o2
	41	#define my_id_reg %o3
	42	#define test_reg %o4
	43	#define global_cnt_reg %o5
	44	#define tmp1 %l7
	45
	46	#define TIMEOUT 0x2000
	47	#define ITERATIONS 0x2
	48
	49	#if defined CREGS_LSU_CTL_REG_DC && CREGS_LSU_CTL_REG_DC == 0
	50	#define TIMEOUT 0x4000
	51	#define ITERATIONS 0x1
	52	#endif
	53
	54	#if defined CREGS_LSU_CTL_REG_IC && CREGS_LSU_CTL_REG_IC == 0
	55	#define TIMEOUT 0x4000
	56	#define ITERATIONS 0x1
	57	#endif
	58
	59	#if defined CREGS_L2_CTL_REG_DIS && CREGS_L2_CTL_REG_DIS == 1
	60	#define TIMEOUT 0x4000
	61	#define ITERATIONS 0x1
	62	#endif
	63
	64
65	#include "hboot.s"
66
67	.global main
68
69	main:
70	setx spinlock_address, %l0, spinlock_addr_reg ! spinlock address
71	set TIMEOUT, to_reg ! set timeout count
72	set ITERATIONS, global_cnt_reg
73
74	or spinlock_addr_reg, %g0, my_id_reg
75
76	th_fork(th_main,%l0)
77
78	th_main_0:
79	add my_id_reg, 0x20, my_id_reg ! my ID address
80	stb %g0, [my_id_reg] ! clear it
81	ba getlock
82	nop
83
84	th_main_1:
85	add my_id_reg, 0x24, my_id_reg
86	stb %g0, [my_id_reg]
87	ba getlock
88	nop
89
90
91	th_main_2:
92	add my_id_reg, 0x28, my_id_reg
93	stb %g0, [my_id_reg]
94	ba getlock
95	nop
96
97	th_main_3:
98	add my_id_reg, 0x2c, my_id_reg
99	stb %g0, [my_id_reg]
100	ba getlock
101	nop
102
103	th_main_4:
104	add my_id_reg, 0x30, my_id_reg
105	stb %g0, [my_id_reg]
106	ba getlock
107	nop
108
109	th_main_5:
110	add my_id_reg, 0x34, my_id_reg
111	stb %g0, [my_id_reg]
112	ba getlock
113	nop
114
115	th_main_6:
116	add my_id_reg, 0x38, my_id_reg
117	stb %g0, [my_id_reg]
118	ba getlock
119	nop
120
121	th_main_7:
122	add my_id_reg, 0x3c, my_id_reg
123	stb %g0, [my_id_reg]
124	ba getlock
125	nop
126
127	getlock:
128	deccc to_reg ! dec timeout count
129	be bad_end ! branch if no timeout
130	nop
131	or %g0, my_id_reg, test_reg ! ldstub
132	ldstub [spinlock_addr_reg], test_reg ! try to acquire lock
133	tst test_reg ! did we get it?
134	bne getlock
135	nop
136
137	gotlock: ! do something
138	set TIMEOUT, to_reg ! set to count again
139	setx protected_area, %l0, data_base_reg
140
141	set 100, %l0
142	add %l0, my_id_reg, %l0 ! initial value
143	stx %l0, [data_base_reg] ! store my ID in there
144	set 200, %l0
145	add %l0, my_id_reg, %l0 ! initial value
146	stx %l0, [data_base_reg+8] ! store my ID in there
147	set 300, %l0
148	add %l0, my_id_reg, %l0 ! initial value
149	stx %l0, [data_base_reg+16] ! store my ID in there
150	set 400, %l0
151	add %l0, my_id_reg, %l0 ! initial value
152	stx %l0, [data_base_reg+24] ! store my ID in there
153	set 500, %l0
154	add %l0, my_id_reg, %l0 ! initial value
155	stx %l0, [data_base_reg+32] ! store my ID in there
156	set 600, %l0
157	add %l0, my_id_reg, %l0 ! initial value
158	stx %l0, [data_base_reg+40] ! store my ID in there
159	set 700, %l0
160	add %l0, my_id_reg, %l0 ! initial value
161	stx %l0, [data_base_reg+48] ! store my ID in there
162	set 800, %l0
163	add %l0, my_id_reg, %l0 ! initial value
164	stx %l0, [data_base_reg+56] ! store my ID in there
165	set 900, %l0
166	add %l0, my_id_reg, %l0 ! initial value
167	stx %l0, [data_base_reg+64] ! store my ID in there
168
169	set 20, %l0
170	loop1:
171	ldx [data_base_reg], %i0 ! read the data area
172	add %i0, 1, %i0
173	stx %i0, [data_base_reg] ! store my ID in there
174	ldx [data_base_reg+8], %i0 ! read the data area
175	add %i0, 1, %i0
176	stx %i0, [data_base_reg+8] ! store my ID in there
177	ldx [data_base_reg+16], %i0 ! read the data area
178	add %i0, 1, %i0
179	stx %i0, [data_base_reg+16] ! store my ID in there
180	ldx [data_base_reg+24], %i0 ! read the data area
181	add %i0, 1, %i0
182	stx %i0, [data_base_reg+24] ! store my ID in there
183	ldx [data_base_reg+32], %i0 ! read the data area
184	add %i0, 1, %i0
185	stx %i0, [data_base_reg+32] ! store my ID in there
186	ldx [data_base_reg+40], %i0 ! read the data area
187	add %i0, 1, %i0
188	stx %i0, [data_base_reg+40] ! store my ID in there
189	ldx [data_base_reg+48], %i0 ! read the data area
190	add %i0, 1, %i0
191	stx %i0, [data_base_reg+48] ! store my ID in there
192	ldx [data_base_reg+56], %i0 ! read the data area
193	add %i0, 1, %i0
194	stx %i0, [data_base_reg+56] ! store my ID in there
195	ldx [data_base_reg+64], %i0 ! read the data area
196	add %i0, 1, %i0
197	stx %i0, [data_base_reg+64] ! store my ID in there
198
199	deccc %l0
200	bne loop1 ! repeat
201	nop
202
203	set 120, %l0
204	add %l0, my_id_reg, %i0 ! initial value
205	ldx [data_base_reg], tmp1 ! read the data area
206	subcc tmp1, %i0, %g0
207	bne bad_end
208	nop
209
210	set 220, %l0
211	add %l0, my_id_reg, %i0 ! initial value
212	ldx [data_base_reg+8], tmp1 ! read the data area
213	subcc tmp1, %i0, %g0
214	bne bad_end
215	nop
216
217	set 320, %l0
218	add %l0, my_id_reg, %i0 ! initial value
219	ldx [data_base_reg+16], tmp1 ! read the data area
220	subcc tmp1, %i0, %g0
221	bne bad_end
222	nop
223
224	set 420, %l0
225	add %l0, my_id_reg, %i0 ! initial value
226	ldx [data_base_reg+24], tmp1 ! read the data area
227	subcc tmp1, %i0, %g0
228	bne bad_end
229	nop
230
231
232	set 520, %l0
233	add %l0, my_id_reg, %i0 ! initial value
234	ldx [data_base_reg+32], tmp1 ! read the data area
235	subcc tmp1, %i0, %g0
236	bne bad_end
237	nop
238
239	set 620, %l0
240	add %l0, my_id_reg, %i0 ! initial value
241	ldx [data_base_reg+40], tmp1 ! read the data area
242	subcc tmp1, %i0, %g0
243	bne bad_end
244	nop
245
246	set 720, %l0
247	add %l0, my_id_reg, %i0 ! initial value
248	ldx [data_base_reg+48], tmp1 ! read the data area
249	subcc tmp1, %i0, %g0
250	bne bad_end
251	nop
252
253	set 820, %l0
254	add %l0, my_id_reg, %i0 ! initial value
255	ldx [data_base_reg+56], tmp1 ! read the data area
256	subcc tmp1, %i0, %g0
257	bne bad_end
258	nop
259
260	set 920, %l0
261	add %l0, my_id_reg, %i0 ! initial value
262	ldx [data_base_reg+64], tmp1 ! read the data area
263	subcc tmp1, %i0, %g0
264	bne bad_end
265	nop
266
267	clearlock:
268	stb %g0, [spinlock_addr_reg] ! unlock
269
270	check_done:
271	deccc global_cnt_reg
272	be good_end
273	nop
274	ba getlock
275	nop
276
277	good_end:
278	ta T_GOOD_TRAP
279	bad_end:
280	ta T_BAD_TRAP
281
282	!==========================
283	.data
284
285	user_data_start:
286
287	.skip 0x20
288	.align 0x8
289	spinlock_address:
290	.word 0x0
291	.skip 0x800
292	.align 0x8
293	protected_area:
294	.word 0xbeef
295	.skip 0x1000
296	.word 0xbeef
297
298
299