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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / tso / tso_directed / tso_n1_prod_cons2.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: tso_n1_prod_cons2.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define spinlock_addr_reg %o0
39#define data_base_reg %o1
40#define my_id_reg %o3
41#define test_reg %o4
42#define global_cnt_reg %o5
43#define tmp1 %l1
44
45#define ITERATIONS 0x4
46
47#include "hboot.s"
48
49.global main
50
51main:
52
53 wr %g0, 0x4, %fprs ! make sure fef is 1
54 setx spinlock_address, %l0, spinlock_addr_reg
55 set ITERATIONS, global_cnt_reg
56
57th_fork(th_main,%l0)
58
59th_main_0:
60 add %g0, 0x8, my_id_reg ! this is my ID address
61 ba producer
62 nop
63
64th_main_1:
65 add %g0, 0x10, my_id_reg
66 ba consumer
67 nop
68
69th_main_2:
70 add %g0, 0x18, my_id_reg
71 ba consumer
72 nop
73
74th_main_3:
75 add %g0, 0x20, my_id_reg
76 ba consumer
77 nop
78
79th_main_4:
80 add %g0, 0x28, my_id_reg
81 ba consumer
82 nop
83
84th_main_5:
85 add %g0, 0x30, my_id_reg
86 ba consumer
87 nop
88
89th_main_6:
90 add %g0, 0x38, my_id_reg
91 ba consumer
92 nop
93
94th_main_7:
95 add %g0, 0x40, my_id_reg
96 ba consumer
97 nop
98
99!========================================================
100producer:
101wait1:
102 ld [spinlock_addr_reg + 0x10], test_reg ! try to acquire lock
103 tst test_reg ! did we get it?
104 bne wait1
105 nop
106wait2:
107 ld [spinlock_addr_reg + 0x18], test_reg ! try to acquire lock
108 tst test_reg ! did we get it?
109 bne wait2
110 nop
111wait3:
112 ld [spinlock_addr_reg + 0x20], test_reg ! try to acquire lock
113 tst test_reg ! did we get it?
114 bne wait3
115 nop
116wait4:
117 ld [spinlock_addr_reg + 0x28], test_reg ! try to acquire lock
118 tst test_reg ! did we get it?
119 bne wait4
120 nop
121wait5:
122 ld [spinlock_addr_reg + 0x30], test_reg ! try to acquire lock
123 tst test_reg ! did we get it?
124 bne wait5
125 nop
126wait6:
127 ld [spinlock_addr_reg + 0x38], test_reg ! try to acquire lock
128 tst test_reg ! did we get it?
129 bne wait6
130 nop
131wait7:
132 ld [spinlock_addr_reg + 0x40], test_reg ! try to acquire lock
133 tst test_reg ! did we get it?
134 bne wait7
135 nop
136 ba producer_gotlock
137 nop
138
139!========================================================
140consumer:
141 ld [spinlock_addr_reg + my_id_reg], test_reg ! try to acquire lock
142 sub test_reg, 0x55, %i1 ! check for end of test
143 tst %i1
144 be good_end
145 nop
146 sub test_reg, 0x1, %i1 ! check for available data
147 tst %i1
148 be check_consumer_type
149 nop
150 ba consumer
151 nop
152
153check_consumer_type:
154 andcc my_id_reg, 0x8, %i1
155 bne consumer_gotlock2
156 nop
157 ba consumer_gotlock
158 nop
159
160
161!=========================================================
162producer_gotlock:
163
164 set 0x80, %l0
165 setx protected_area, tmp1, data_base_reg
166producer_loop0:
167 st %g0, [data_base_reg + my_id_reg] ! cleanup
168 add data_base_reg, 0x40, data_base_reg ! increment the address
169 deccc %l0
170 bne producer_loop0 ! repeat
171 nop
172
173 set 0x80, %l0
174 setx protected_area, tmp1, data_base_reg
175producer_loop1:
176 st my_id_reg, [data_base_reg + my_id_reg] ! store my ID in there
177 add data_base_reg, 0x40, data_base_reg ! increment the address
178 deccc %l0
179 bne producer_loop1 ! repeat
180 nop
181
182 deccc global_cnt_reg
183 be cleanup_and_finish
184 nop
185 add %g0, 1 , tmp1
186 st tmp1, [spinlock_addr_reg + 0x10] ! data ready
187 st tmp1, [spinlock_addr_reg + 0x18] ! data ready
188 st tmp1, [spinlock_addr_reg + 0x20] ! data ready
189 st tmp1, [spinlock_addr_reg + 0x28] ! data ready
190 st tmp1, [spinlock_addr_reg + 0x30] ! data ready
191 st tmp1, [spinlock_addr_reg + 0x38] ! data ready
192 st tmp1, [spinlock_addr_reg + 0x40] ! data ready
193 ba producer
194 nop
195
196cleanup_and_finish:
197 add %g0, 0x55 , tmp1
198 st tmp1, [spinlock_addr_reg + 0x10] ! data ready
199 st tmp1, [spinlock_addr_reg + 0x18] ! data ready
200 st tmp1, [spinlock_addr_reg + 0x20] ! data ready
201 st tmp1, [spinlock_addr_reg + 0x28] ! data ready
202 st tmp1, [spinlock_addr_reg + 0x30] ! data ready
203 st tmp1, [spinlock_addr_reg + 0x38] ! data ready
204 st tmp1, [spinlock_addr_reg + 0x40] ! data ready
205 ba good_end
206 nop
207
208!====================================================================
209consumer_gotlock:
210 set 0x80, %l0
211 setx protected_area, tmp1, data_base_reg
212 mov 0x8, %i1
213consumer_loop1:
214 ld [data_base_reg + 0x8], %i2 ! load
215 subcc %i2, %i1, %g0 ! should be producer's
216 bne bad_end ! ID there
217 nop
218 add data_base_reg, 0x40, data_base_reg ! increment the address
219 deccc %l0
220 bne consumer_loop1 ! repeat
221 nop
222
223 st %g0, [spinlock_addr_reg+ my_id_reg] ! consumer ready
224
225 ba consumer
226 nop
227
228consumer_gotlock2: ! uses FP compares
229 set 0x80, %l0
230 setx protected_area, tmp1, data_base_reg
231 mov 0x8, %i1
232 st %i1, [data_base_reg + my_id_reg] ! store producer's ID
233 ld [data_base_reg + my_id_reg], %f2 ! get it in %f2
234consumer_loop2:
235 ld [data_base_reg + 0x8], %f14 ! load data
236 fcmps %fcc0, %f2, %f14 ! is it producer's ID
237 fbne %fcc0, bad_end
238 nop
239 add data_base_reg, 0x40, data_base_reg ! increment the address
240 deccc %l0
241 bne consumer_loop2 ! repeat
242 nop
243
244 st %g0, [spinlock_addr_reg+ my_id_reg] ! consumer ready
245
246 ba consumer
247 nop
248
249good_end:
250 ta T_GOOD_TRAP
251bad_end:
252 ta T_BAD_TRAP
253
254!==========================
255
256
257SECTION .MY_DATA0 TEXT_VA=0xf0100000, DATA_VA=0xd0100000
258attr_data {
259 Name = .MY_DATA0,
260 VA= 0x0d0100000
261 RA= 0x1d0100000
262 PA= ra2pa(0x1d0100000,0),
263 part_0_ctx_nonzero_tsb_config_0,
264 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
265 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
266 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
267 }
268
269attr_text {
270 Name = .MY_DATA0,
271 VA= 0x0f0100000
272 RA= 0x1f0100000
273 PA= ra2pa(0x1f0100000,0),
274 part_0_ctx_nonzero_tsb_config_0,
275 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
276 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
277 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
278 }
279
280 .data
281
282.global spinlock_address
283spinlock_address:
284 .word 0x0
285 .word 0x0
286 .word 0x0
287 .word 0x0
288 .word 0x0
289 .word 0x0
290 .word 0x0
291 .word 0x0
292 .word 0x0
293 .word 0x0
294 .word 0x0
295 .word 0x0
296 .word 0x0
297 .word 0x0
298 .word 0x0
299 .word 0x0
300 .word 0x0
301 .word 0x0
302 .word 0x0
303 .word 0x0
304 .word 0x0
305 .word 0x0
306 .word 0x0
307 .word 0x0
308 .word 0x0
309 .word 0x0
310 .word 0x0
311 .word 0x0
312 .word 0x0
313 .word 0x0
314 .word 0x0
315 .word 0x0
316 .word 0x0
317 .word 0x0
318 .word 0x0
319 .word 0x0
320 .word 0x0
321 .word 0x0
322 .word 0x0
323 .word 0x0
324 .word 0x0
325 .word 0x0
326 .word 0x0
327 .word 0x0
328 .word 0x0
329 .word 0x0
330 .word 0x0
331 .word 0x0
332 .word 0x0
333 .word 0x0
334 .word 0x0
335 .word 0x0
336 .word 0x0
337 .word 0x0
338 .word 0x0
339 .word 0x0
340 .word 0x0
341 .word 0x0
342 .word 0x0
343 .word 0x0
344 .word 0x0
345 .word 0x0
346 .word 0x0
347 .word 0x0
348 .word 0x0
349 .word 0x0
350 .word 0x0
351 .word 0x0
352 .word 0x0
353 .word 0x0
354 .word 0x0
355 .word 0x0
356 .word 0x0
357 .word 0x0
358 .word 0x0
359 .word 0x0
360 .word 0x0
361 .word 0x0
362 .word 0x0
363 .word 0x0
364 .word 0x0
365 .word 0x0
366 .word 0x0
367
368
369SECTION .MY_DATA1 TEXT_VA=0xf1110000, DATA_VA=0xd1110000
370attr_data {
371 Name = .MY_DATA1,
372 VA= 0x0d1110000,
373 RA= 0x1d1110000,
374 PA= ra2pa(0x1d1110000,0),
375 part_0_ctx_nonzero_tsb_config_1,
376 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
377 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
378 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
379 }
380
381attr_text {
382 Name = .MY_DATA1,
383 VA= 0x0f1110000,
384 RA= 0x1f1110000,
385 PA= ra2pa(0x1f1110000,0),
386 part_0_ctx_nonzero_tsb_config_1,
387 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
388 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
389 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
390 }
391
392 .data
393.global protected_area
394protected_area:
395 .word 0xbeef
396 .skip 0x1000
397 .word 0xbeef
398
399.end
Full OpenSPARC design & verification tarball including full HDL.